From de81bd0faa5413602b52ed4b876c79dc785f599b Mon Sep 17 00:00:00 2001 From: Amara Emerson Date: Wed, 24 Jul 2019 23:00:04 +0000 Subject: [PATCH] [AArch64][GlobalISel] Don't try to use GISel if subtarget doesn't have neon or fp. Throughout the legalizerinfo we currently make the assumption that the target has neon and FP target features available. Fixing it will require a refactor of the whole thing, so until then make sure we fall back. Works around PR42734 Differential Revision: https://reviews.llvm.org/D65244 llvm-svn: 366957 --- llvm/lib/Target/AArch64/AArch64LegalizerInfo.cpp | 6 ++++++ llvm/test/CodeGen/AArch64/GlobalISel/no-neon-no-fp.ll | 13 +++++++++++++ 2 files changed, 19 insertions(+) create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/no-neon-no-fp.ll diff --git a/llvm/lib/Target/AArch64/AArch64LegalizerInfo.cpp b/llvm/lib/Target/AArch64/AArch64LegalizerInfo.cpp index 32d5afc..57e522a 100644 --- a/llvm/lib/Target/AArch64/AArch64LegalizerInfo.cpp +++ b/llvm/lib/Target/AArch64/AArch64LegalizerInfo.cpp @@ -52,6 +52,12 @@ AArch64LegalizerInfo::AArch64LegalizerInfo(const AArch64Subtarget &ST) { const LLT v2s64 = LLT::vector(2, 64); const LLT v2p0 = LLT::vector(2, p0); + // FIXME: support subtargets which have neon/fp-armv8 disabled. + if (!ST.hasNEON() || !ST.hasFPARMv8()) { + computeTables(); + return; + } + getActionDefinitionsBuilder(G_IMPLICIT_DEF) .legalFor({p0, s1, s8, s16, s32, s64, v4s32, v2s64}) .clampScalar(0, s1, s64) diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/no-neon-no-fp.ll b/llvm/test/CodeGen/AArch64/GlobalISel/no-neon-no-fp.ll new file mode 100644 index 0000000..f2e6fbc --- /dev/null +++ b/llvm/test/CodeGen/AArch64/GlobalISel/no-neon-no-fp.ll @@ -0,0 +1,13 @@ +; RUN: not llc -o - -verify-machineinstrs -global-isel -global-isel-abort=1 -stop-after=legalizer %s 2>&1 | FileCheck %s +target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128" +target triple = "aarch64-unknown-unknown" + +; CHECK: unable to legalize instruction: G_STORE %1:_(s128), %0:_(p0) :: (store 16 into %ir.ptr) (in function: foo) +define void @foo(i128 *%ptr) #0 align 2 { +entry: + store i128 0, i128* %ptr, align 16 + ret void +} + +attributes #0 = { "use-soft-float"="false" "target-features"="-fp-armv8,-neon" } + -- 2.7.4