From dde61c48303afae6d5db50fc2c9f7199413945e5 Mon Sep 17 00:00:00 2001 From: Conor Dooley Date: Fri, 5 Aug 2022 08:43:46 +0100 Subject: [PATCH] i2c: microchip-corei2c: fix erroneous late ack send A late ack is currently being sent at the end of a transfer due to incorrect logic in mchp_corei2c_empty_rx(). Currently the Assert Ack bit is being written to the controller's control reg after the last byte has been received, causing it to sent another byte with the ack. Instead, the AA flag should be written to the control register when the penultimate byte is read so it is sent out for the last byte. Reported-by: Andreas Buerkler Fixes: 64a6f1c4987e ("i2c: add support for microchip fpga i2c controllers") Tested-by: Lewis Hanly Signed-off-by: Conor Dooley [wsa: fixed typos in commit message] Signed-off-by: Wolfram Sang --- drivers/i2c/busses/i2c-microchip-corei2c.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/i2c/busses/i2c-microchip-corei2c.c b/drivers/i2c/busses/i2c-microchip-corei2c.c index 6df0f1c3..4d7e9b2 100644 --- a/drivers/i2c/busses/i2c-microchip-corei2c.c +++ b/drivers/i2c/busses/i2c-microchip-corei2c.c @@ -206,7 +206,7 @@ static void mchp_corei2c_empty_rx(struct mchp_corei2c_dev *idev) idev->msg_len--; } - if (idev->msg_len == 0) { + if (idev->msg_len <= 1) { ctrl = readb(idev->base + CORE_I2C_CTRL); ctrl &= ~CTRL_AA; writeb(ctrl, idev->base + CORE_I2C_CTRL); -- 2.7.4