From ddc2b453d02f2a9460efcc6c6198f56ba89e87fe Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Tue, 5 Feb 2013 17:39:35 -0800 Subject: [PATCH] i965/gen4: Work around missing sRGB RGB DXT1 support. The hardware just doesn't support it. I suspect this was a regression from the move to fixed MESA_FORMATs for compressed textures and that previously we were storing uncompressed for this or something. Fixes GPU hangs in piglit "texwrap GL_EXT_texture_sRGB-s3tc bordercolor swizzled" on my GM965. Reviewed-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/brw_state.h | 3 ++- src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 18 ++++++++++++++++-- src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | 3 ++- 3 files changed, 20 insertions(+), 4 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_state.h b/src/mesa/drivers/dri/i965/brw_state.h index adc64e3..ecc61c4 100644 --- a/src/mesa/drivers/dri/i965/brw_state.h +++ b/src/mesa/drivers/dri/i965/brw_state.h @@ -197,7 +197,8 @@ uint32_t brw_format_for_mesa_format(gl_format mesa_format); GLuint translate_tex_target(GLenum target); -GLuint translate_tex_format(gl_format mesa_format, +GLuint translate_tex_format(struct intel_context *intel, + gl_format mesa_format, GLenum internal_format, GLenum depth_mode, GLenum srgb_decode); diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c index 77b7ab3..587ad05 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c +++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c @@ -622,7 +622,8 @@ brw_render_target_supported(struct intel_context *intel, } GLuint -translate_tex_format(gl_format mesa_format, +translate_tex_format(struct intel_context *intel, + gl_format mesa_format, GLenum internal_format, GLenum depth_mode, GLenum srgb_decode) @@ -651,6 +652,17 @@ translate_tex_format(gl_format mesa_format, */ return BRW_SURFACEFORMAT_R32G32B32A32_FLOAT; + case MESA_FORMAT_SRGB_DXT1: + if (intel->gen == 4 && !intel->is_g4x) { + /* Work around missing SRGB DXT1 support on original gen4 by just + * skipping SRGB decode. It's not worth not supporting sRGB in + * general to prevent this. + */ + WARN_ONCE(true, "Demoting sRGB DXT1 texture to non-sRGB\n"); + mesa_format = MESA_FORMAT_RGB_DXT1; + } + return brw_format_for_mesa_format(mesa_format); + default: assert(brw_format_for_mesa_format(mesa_format) != 0); return brw_format_for_mesa_format(mesa_format); @@ -829,6 +841,7 @@ brw_update_texture_surface(struct gl_context *ctx, uint32_t *binding_table, unsigned surf_index) { + struct intel_context *intel = intel_context(ctx); struct brw_context *brw = brw_context(ctx); struct gl_texture_object *tObj = ctx->Texture.Unit[unit]._Current; struct intel_texture_object *intelObj = intel_texture_object(tObj); @@ -852,7 +865,8 @@ brw_update_texture_surface(struct gl_context *ctx, surf[0] = (translate_tex_target(tObj->Target) << BRW_SURFACE_TYPE_SHIFT | BRW_SURFACE_MIPMAPLAYOUT_BELOW << BRW_SURFACE_MIPLAYOUT_SHIFT | BRW_SURFACE_CUBEFACE_ENABLES | - (translate_tex_format(mt->format, + (translate_tex_format(intel, + mt->format, firstImage->InternalFormat, tObj->DepthMode, sampler->sRGBDecode) << diff --git a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c index 179024a..d53df20 100644 --- a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c +++ b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c @@ -309,7 +309,8 @@ gen7_update_texture_surface(struct gl_context *ctx, 8 * 4, 32, &binding_table[surf_index]); memset(surf, 0, 8 * 4); - uint32_t tex_format = translate_tex_format(mt->format, + uint32_t tex_format = translate_tex_format(intel, + mt->format, firstImage->InternalFormat, tObj->DepthMode, sampler->sRGBDecode); -- 2.7.4