From dd6b3fc939da6bb4ba17fa86d2a45bf0585dc493 Mon Sep 17 00:00:00 2001 From: aesok Date: Tue, 5 Oct 2010 19:38:27 +0000 Subject: [PATCH] * config/m68hc11/m68hc11.h (CLASS_LIKELY_SPILLED_P): Remove. * config/m68hc11/m68hc11.c (TARGET_CLASS_LIKELY_SPILLED_P): Define. (m68hc11_class_likely_spilled_p): New function. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@165000 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/ChangeLog | 6 ++++++ gcc/config/m68hc11/m68hc11.c | 30 ++++++++++++++++++++++++++++++ gcc/config/m68hc11/m68hc11.h | 28 ---------------------------- 3 files changed, 36 insertions(+), 28 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 5031176..64bf07f 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2010-10-05 Anatoly Sokolov + + * config/m68hc11/m68hc11.h (CLASS_LIKELY_SPILLED_P): Remove. + * config/m68hc11/m68hc11.c (TARGET_CLASS_LIKELY_SPILLED_P): Define. + (m68hc11_class_likely_spilled_p): New function. + 2010-10-05 Nicola Pero * c-parser.c (c_parser_objc_method_definition): Updated comment. diff --git a/gcc/config/m68hc11/m68hc11.c b/gcc/config/m68hc11/m68hc11.c index ea60db6..bf9c26c 100644 --- a/gcc/config/m68hc11/m68hc11.c +++ b/gcc/config/m68hc11/m68hc11.c @@ -76,6 +76,7 @@ static int m68hc11_rtx_costs_1 (rtx, enum rtx_code, enum rtx_code); static bool m68hc11_rtx_costs (rtx, int, int, int *, bool); static tree m68hc11_handle_fntype_attribute (tree *, tree, tree, int, bool *); static tree m68hc11_handle_page0_attribute (tree *, tree, tree, int, bool *); +static bool m68hc11_class_likely_spilled_p (reg_class_t); void create_regs_rtx (void); @@ -291,6 +292,9 @@ static const struct attribute_spec m68hc11_attribute_table[] = #undef TARGET_CAN_ELIMINATE #define TARGET_CAN_ELIMINATE m68hc11_can_eliminate +#undef TARGET_CLASS_LIKELY_SPILLED_P +#define TARGET_CLASS_LIKELY_SPILLED_P m68hc11_class_likely_spilled_p + #undef TARGET_TRAMPOLINE_INIT #define TARGET_TRAMPOLINE_INIT m68hc11_trampoline_init @@ -581,6 +585,32 @@ preferred_reload_class (rtx operand, enum reg_class rclass) return rclass; } +/* Implement TARGET_CLASS_LIKELY_SPILLED_P. */ + +static bool +m68hc11_class_likely_spilled_p (reg_class_t rclass) +{ + switch (rclass) + { + case D_REGS: + case X_REGS: + case Y_REGS: + case A_REGS: + case SP_REGS: + case D_OR_X_REGS: + case D_OR_Y_REGS: + case X_OR_SP_REGS: + case Y_OR_SP_REGS: + case D_OR_SP_REGS: + return true; + + default: + break; + } + + return false; +} + /* Return 1 if the operand is a valid indexed addressing mode. For 68hc11: n,r with n in [0..255] and r in A_REGS class For 68hc12: n,r no constraint on the constant, r in A_REGS class. */ diff --git a/gcc/config/m68hc11/m68hc11.h b/gcc/config/m68hc11/m68hc11.h index f19180d..9e45cb5 100644 --- a/gcc/config/m68hc11/m68hc11.h +++ b/gcc/config/m68hc11/m68hc11.h @@ -704,34 +704,6 @@ extern enum reg_class m68hc11_tmp_regs_class; #define HARD_REGNO_RENAME_OK(REGNO1,REGNO2) \ m68hc11_hard_regno_rename_ok ((REGNO1), (REGNO2)) -/* A C expression whose value is nonzero if pseudos that have been - assigned to registers of class CLASS would likely be spilled - because registers of CLASS are needed for spill registers. - - The default value of this macro returns 1 if CLASS has exactly one - register and zero otherwise. On most machines, this default - should be used. Only define this macro to some other expression - if pseudo allocated by `local-alloc.c' end up in memory because - their hard registers were needed for spill registers. If this - macro returns nonzero for those classes, those pseudos will only - be allocated by `global.c', which knows how to reallocate the - pseudo to another register. If there would not be another - register available for reallocation, you should not change the - definition of this macro since the only effect of such a - definition would be to slow down register allocation. */ - -#define CLASS_LIKELY_SPILLED_P(CLASS) \ - (((CLASS) == D_REGS) \ - || ((CLASS) == X_REGS) \ - || ((CLASS) == Y_REGS) \ - || ((CLASS) == A_REGS) \ - || ((CLASS) == SP_REGS) \ - || ((CLASS) == D_OR_X_REGS) \ - || ((CLASS) == D_OR_Y_REGS) \ - || ((CLASS) == X_OR_SP_REGS) \ - || ((CLASS) == Y_OR_SP_REGS) \ - || ((CLASS) == D_OR_SP_REGS)) - /* Return the maximum number of consecutive registers needed to represent mode MODE in a register of class CLASS. */ #define CLASS_MAX_NREGS(CLASS, MODE) \ -- 2.7.4