From dd1cb5281f9b8d8d9acc941a5c283c32ead4a818 Mon Sep 17 00:00:00 2001 From: "bmeurer@chromium.org" Date: Fri, 31 Oct 2014 09:19:55 +0000 Subject: [PATCH] X64: replace explicit zero-extend with runtime assert Since the input float64 is in the range of [0, 2^32-1], the upper 32 bits of output register should be zero. BUG= R=bmeurer@chromium.org, titzer@chromium.org Review URL: https://codereview.chromium.org/644993002 Patch from Weiliang Lin . Cr-Commit-Position: refs/heads/master@{#25027} git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@25027 ce2b1a6d-e550-0410-aec6-3dcde31c8c00 --- src/compiler/x64/code-generator-x64.cc | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/src/compiler/x64/code-generator-x64.cc b/src/compiler/x64/code-generator-x64.cc index 3e5485942..9e107e20e 100644 --- a/src/compiler/x64/code-generator-x64.cc +++ b/src/compiler/x64/code-generator-x64.cc @@ -441,16 +441,15 @@ void CodeGenerator::AssembleArchInstruction(Instruction* instr) { __ cvttsd2si(i.OutputRegister(), i.InputOperand(0)); } break; - case kSSEFloat64ToUint32: + case kSSEFloat64ToUint32: { if (instr->InputAt(0)->IsDoubleRegister()) { __ cvttsd2siq(i.OutputRegister(), i.InputDoubleRegister(0)); } else { __ cvttsd2siq(i.OutputRegister(), i.InputOperand(0)); } - __ andl(i.OutputRegister(), i.OutputRegister()); // clear upper bits. - // TODO(turbofan): generated code should not look at the upper 32 bits - // of the result, but those bits could escape to the outside world. + __ AssertZeroExtended(i.OutputRegister()); break; + } case kSSEInt32ToFloat64: if (instr->InputAt(0)->IsRegister()) { __ cvtlsi2sd(i.OutputDoubleRegister(), i.InputRegister(0)); -- 2.34.1