From dc9feb5c97ab95cb328406040f47f20f986f0e58 Mon Sep 17 00:00:00 2001 From: Joern Rennecke Date: Tue, 18 Jun 2002 15:54:44 +0000 Subject: [PATCH] * interp.c (sim_resume): Fix setting of bus error for instruction fetch. --- sim/sh/ChangeLog | 5 +++++ sim/sh/interp.c | 2 +- 2 files changed, 6 insertions(+), 1 deletion(-) diff --git a/sim/sh/ChangeLog b/sim/sh/ChangeLog index a18645f..d8a8f70 100644 --- a/sim/sh/ChangeLog +++ b/sim/sh/ChangeLog @@ -1,3 +1,8 @@ +Tue Jun 18 16:53:11 2002 J"orn Rennecke + + * interp.c (sim_resume): Fix setting of bus error for + instruction fetch. + 2002-06-16 Andrew Cagney * configure: Regenerated to track ../common/aclocal.m4 changes. diff --git a/sim/sh/interp.c b/sim/sh/interp.c index 286dd2d..6abff00 100644 --- a/sim/sh/interp.c +++ b/sim/sh/interp.c @@ -1717,7 +1717,7 @@ sim_resume (sd, step, siggnal) } /* Check for SIGBUS due to insn fetch. */ else if (! saved_state.asregs.exception) - saved_state.asregs.exception == SIGBUS; + saved_state.asregs.exception = SIGBUS; saved_state.asregs.ticks += get_now () - tick_start; saved_state.asregs.cycles += cycles; -- 2.7.4