From dc74094398e63c8c9d299ba03bde299bff81bf0f Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Mon, 2 Apr 2018 03:15:02 +0000 Subject: [PATCH] [X86] Fix the SchedRW for AVX512 shift instructions. It was being inadvertently defaulted to an FADD scheduler class. llvm-svn: 328959 --- llvm/lib/Target/X86/X86InstrAVX512.td | 21 +++++++++++++-------- llvm/lib/Target/X86/X86InstrSSE.td | 1 + llvm/test/CodeGen/X86/avx512-schedule.ll | 18 +++++++++--------- 3 files changed, 23 insertions(+), 17 deletions(-) diff --git a/llvm/lib/Target/X86/X86InstrAVX512.td b/llvm/lib/Target/X86/X86InstrAVX512.td index 7eaed32..889f05a 100644 --- a/llvm/lib/Target/X86/X86InstrAVX512.td +++ b/llvm/lib/Target/X86/X86InstrAVX512.td @@ -5697,17 +5697,22 @@ multiclass avx512_var_shift_w opc, string OpcodeStr, } } -defm VPSLLV : avx512_var_shift_types<0x47, "vpsllv", shl, SSE_INTSHIFT_P>, - avx512_var_shift_w<0x12, "vpsllvw", shl, SSE_INTSHIFT_P>; +let Sched = WriteVarVecShift in +def AVX512_VARSHIFT_P : OpndItins< + IIC_SSE_INTSH_P_RR, IIC_SSE_INTSH_P_RM +>; + +defm VPSLLV : avx512_var_shift_types<0x47, "vpsllv", shl, AVX512_VARSHIFT_P>, + avx512_var_shift_w<0x12, "vpsllvw", shl, AVX512_VARSHIFT_P>; -defm VPSRAV : avx512_var_shift_types<0x46, "vpsrav", sra, SSE_INTSHIFT_P>, - avx512_var_shift_w<0x11, "vpsravw", sra, SSE_INTSHIFT_P>; +defm VPSRAV : avx512_var_shift_types<0x46, "vpsrav", sra, AVX512_VARSHIFT_P>, + avx512_var_shift_w<0x11, "vpsravw", sra, AVX512_VARSHIFT_P>; -defm VPSRLV : avx512_var_shift_types<0x45, "vpsrlv", srl, SSE_INTSHIFT_P>, - avx512_var_shift_w<0x10, "vpsrlvw", srl, SSE_INTSHIFT_P>; +defm VPSRLV : avx512_var_shift_types<0x45, "vpsrlv", srl, AVX512_VARSHIFT_P>, + avx512_var_shift_w<0x10, "vpsrlvw", srl, AVX512_VARSHIFT_P>; -defm VPRORV : avx512_var_shift_types<0x14, "vprorv", rotr, SSE_INTSHIFT_P>; -defm VPROLV : avx512_var_shift_types<0x15, "vprolv", rotl, SSE_INTSHIFT_P>; +defm VPRORV : avx512_var_shift_types<0x14, "vprorv", rotr, AVX512_VARSHIFT_P>; +defm VPROLV : avx512_var_shift_types<0x15, "vprolv", rotl, AVX512_VARSHIFT_P>; defm : avx512_var_shift_lowering; defm : avx512_var_shift_lowering; diff --git a/llvm/lib/Target/X86/X86InstrSSE.td b/llvm/lib/Target/X86/X86InstrSSE.td index 986cdf8..bf627ad 100644 --- a/llvm/lib/Target/X86/X86InstrSSE.td +++ b/llvm/lib/Target/X86/X86InstrSSE.td @@ -146,6 +146,7 @@ def SSE_INTMUL_ITINS_P : OpndItins< >; // FIXME: Merge SSE_INTSHIFT_P + SSE_INTSHIFT_ITINS_P. +let Sched = WriteVecShift in def SSE_INTSHIFT_P : OpndItins< IIC_SSE_INTSH_P_RR, IIC_SSE_INTSH_P_RM >; diff --git a/llvm/test/CodeGen/X86/avx512-schedule.ll b/llvm/test/CodeGen/X86/avx512-schedule.ll index 7a1a70c..87baa47 100755 --- a/llvm/test/CodeGen/X86/avx512-schedule.ll +++ b/llvm/test/CodeGen/X86/avx512-schedule.ll @@ -2783,7 +2783,7 @@ define <16 x float> @ubto16f32(<16 x i32> %a) { ; GENERIC: # %bb.0: ; GENERIC-NEXT: vpmovd2m %zmm0, %k0 # sched: [1:0.33] ; GENERIC-NEXT: vpmovm2d %k0, %zmm0 # sched: [1:0.33] -; GENERIC-NEXT: vpsrld $31, %zmm0, %zmm0 # sched: [3:1.00] +; GENERIC-NEXT: vpsrld $31, %zmm0, %zmm0 # sched: [1:1.00] ; GENERIC-NEXT: vcvtdq2ps %zmm0, %zmm0 # sched: [4:1.00] ; GENERIC-NEXT: retq # sched: [1:1.00] ; @@ -2804,7 +2804,7 @@ define <16 x double> @ubto16f64(<16 x i32> %a) { ; GENERIC: # %bb.0: ; GENERIC-NEXT: vpmovd2m %zmm0, %k0 # sched: [1:0.33] ; GENERIC-NEXT: vpmovm2d %k0, %zmm0 # sched: [1:0.33] -; GENERIC-NEXT: vpsrld $31, %zmm0, %zmm1 # sched: [3:1.00] +; GENERIC-NEXT: vpsrld $31, %zmm0, %zmm1 # sched: [1:1.00] ; GENERIC-NEXT: vcvtdq2pd %ymm1, %zmm0 # sched: [4:1.00] ; GENERIC-NEXT: vextracti64x4 $1, %zmm1, %ymm1 # sched: [1:1.00] ; GENERIC-NEXT: vcvtdq2pd %ymm1, %zmm1 # sched: [4:1.00] @@ -4246,7 +4246,7 @@ define <16 x i32> @zext_16i1_to_16xi32(i16 %b) { ; GENERIC: # %bb.0: ; GENERIC-NEXT: kmovd %edi, %k0 # sched: [1:0.33] ; GENERIC-NEXT: vpmovm2d %k0, %zmm0 # sched: [1:0.33] -; GENERIC-NEXT: vpsrld $31, %zmm0, %zmm0 # sched: [3:1.00] +; GENERIC-NEXT: vpsrld $31, %zmm0, %zmm0 # sched: [1:1.00] ; GENERIC-NEXT: retq # sched: [1:1.00] ; ; SKX-LABEL: zext_16i1_to_16xi32: @@ -4265,7 +4265,7 @@ define <8 x i64> @zext_8i1_to_8xi64(i8 %b) { ; GENERIC: # %bb.0: ; GENERIC-NEXT: kmovd %edi, %k0 # sched: [1:0.33] ; GENERIC-NEXT: vpmovm2q %k0, %zmm0 # sched: [1:0.33] -; GENERIC-NEXT: vpsrlq $63, %zmm0, %zmm0 # sched: [3:1.00] +; GENERIC-NEXT: vpsrlq $63, %zmm0, %zmm0 # sched: [1:1.00] ; GENERIC-NEXT: retq # sched: [1:1.00] ; ; SKX-LABEL: zext_8i1_to_8xi64: @@ -4303,7 +4303,7 @@ define i16 @trunc_16i8_to_16i1(<16 x i8> %a) { define i16 @trunc_16i32_to_16i1(<16 x i32> %a) { ; GENERIC-LABEL: trunc_16i32_to_16i1: ; GENERIC: # %bb.0: -; GENERIC-NEXT: vpslld $31, %zmm0, %zmm0 # sched: [3:1.00] +; GENERIC-NEXT: vpslld $31, %zmm0, %zmm0 # sched: [1:1.00] ; GENERIC-NEXT: vpmovd2m %zmm0, %k0 # sched: [1:0.33] ; GENERIC-NEXT: kmovd %k0, %eax # sched: [1:0.33] ; GENERIC-NEXT: # kill: def $ax killed $ax killed $eax @@ -4493,7 +4493,7 @@ define void @extload_v8i64(<8 x i8>* %a, <8 x i64>* %res) { define <64 x i16> @test21(<64 x i16> %x , <64 x i1> %mask) nounwind readnone { ; GENERIC-LABEL: test21: ; GENERIC: # %bb.0: -; GENERIC-NEXT: vpsllw $7, %zmm2, %zmm2 # sched: [3:1.00] +; GENERIC-NEXT: vpsllw $7, %zmm2, %zmm2 # sched: [1:1.00] ; GENERIC-NEXT: vpmovb2m %zmm2, %k1 # sched: [1:0.33] ; GENERIC-NEXT: vmovdqu16 %zmm0, %zmm0 {%k1} {z} # sched: [1:0.33] ; GENERIC-NEXT: kshiftrq $32, %k1, %k1 # sched: [1:1.00] @@ -4659,7 +4659,7 @@ define <32 x i16> @zext_32xi1_to_32xi16(<32 x i16> %x, <32 x i16> %y) #0 { ; GENERIC: # %bb.0: ; GENERIC-NEXT: vpcmpeqw %zmm1, %zmm0, %k0 # sched: [3:1.00] ; GENERIC-NEXT: vpmovm2w %k0, %zmm0 # sched: [1:0.33] -; GENERIC-NEXT: vpsrlw $15, %zmm0, %zmm0 # sched: [3:1.00] +; GENERIC-NEXT: vpsrlw $15, %zmm0, %zmm0 # sched: [1:1.00] ; GENERIC-NEXT: retq # sched: [1:1.00] ; ; SKX-LABEL: zext_32xi1_to_32xi16: @@ -7919,7 +7919,7 @@ define void @store_32i1(<32 x i1>* %a, <32 x i1> %v) { define void @store_32i1_1(<32 x i1>* %a, <32 x i16> %v) { ; GENERIC-LABEL: store_32i1_1: ; GENERIC: # %bb.0: -; GENERIC-NEXT: vpsllw $15, %zmm0, %zmm0 # sched: [3:1.00] +; GENERIC-NEXT: vpsllw $15, %zmm0, %zmm0 # sched: [1:1.00] ; GENERIC-NEXT: vpmovw2m %zmm0, %k0 # sched: [1:0.33] ; GENERIC-NEXT: kmovd %k0, (%rdi) # sched: [1:1.00] ; GENERIC-NEXT: vzeroupper # sched: [100:0.33] @@ -7942,7 +7942,7 @@ define void @store_64i1(<64 x i1>* %a, <64 x i1> %v) { ; ; GENERIC-LABEL: store_64i1: ; GENERIC: # %bb.0: -; GENERIC-NEXT: vpsllw $7, %zmm0, %zmm0 # sched: [3:1.00] +; GENERIC-NEXT: vpsllw $7, %zmm0, %zmm0 # sched: [1:1.00] ; GENERIC-NEXT: vpmovb2m %zmm0, %k0 # sched: [1:0.33] ; GENERIC-NEXT: kmovq %k0, (%rdi) # sched: [1:1.00] ; GENERIC-NEXT: vzeroupper # sched: [100:0.33] -- 2.7.4