From dc2cf57140a8b10ad0846f021e8f1e7a06301931 Mon Sep 17 00:00:00 2001 From: Benjamin Segovia Date: Mon, 21 May 2012 14:52:57 +0000 Subject: [PATCH] Fixed compilation with gcc 4.7 --- backend/src/backend/gen_context.cpp | 5 ++--- backend/src/backend/sim_context.cpp | 2 +- backend/src/ir/lowering.cpp | 2 +- backend/src/ir/lowering.hpp | 5 +++++ 4 files changed, 9 insertions(+), 5 deletions(-) diff --git a/backend/src/backend/gen_context.cpp b/backend/src/backend/gen_context.cpp index 527e03e..613678a 100644 --- a/backend/src/backend/gen_context.cpp +++ b/backend/src/backend/gen_context.cpp @@ -585,7 +585,6 @@ namespace gbe using namespace ir; const uint32_t valueNum = insn.getValueNum(); GenReg src; - //GBE_ASSERT(insn.getAddressSpace() == MEM_GLOBAL); // A scalar address register requires to be aligned if (isScalarReg(insn.getAddress()) == true) { @@ -645,7 +644,6 @@ namespace gbe GenReg value) { using namespace ir; - // GBE_ASSERT(insn.getAddressSpace() == MEM_GLOBAL); GBE_ASSERT(insn.getValueNum() == 1); const Type type = insn.getValueType(); const uint32_t elemSize = getByteScatterGatherSize(type); @@ -684,7 +682,8 @@ namespace gbe void GenContext::emitLoadInstruction(const ir::LoadInstruction &insn) { using namespace ir; const GenReg address = this->genReg(insn.getAddress()); - // GBE_ASSERT(insn.getAddressSpace() == MEM_GLOBAL); + GBE_ASSERT(insn.getAddressSpace() == MEM_GLOBAL || + insn.getAddressSpace() == MEM_PRIVATE); GBE_ASSERT(this->isScalarReg(insn.getValue(0)) == false); if (insn.isAligned() == true) this->emitUntypedRead(insn, address); diff --git a/backend/src/backend/sim_context.cpp b/backend/src/backend/sim_context.cpp index 1b40b51..91073b4 100644 --- a/backend/src/backend/sim_context.cpp +++ b/backend/src/backend/sim_context.cpp @@ -46,7 +46,7 @@ namespace gbe GBE_ASSERT(fn.getProfile() == ir::PROFILE_OCL); // First we build the set of all used registers - fn.foreachInstruction([&usedRegs](const ir::Instruction &insn) { + fn.foreachInstruction([&](const ir::Instruction &insn) { const uint32_t srcNum = insn.getSrcNum(), dstNum = insn.getDstNum(); for (uint32_t srcID = 0; srcID < srcNum; ++srcID) usedRegs.insert(insn.getSrc(srcID)); diff --git a/backend/src/ir/lowering.cpp b/backend/src/ir/lowering.cpp index 311a99f..d16cf0d 100644 --- a/backend/src/ir/lowering.cpp +++ b/backend/src/ir/lowering.cpp @@ -18,7 +18,7 @@ */ /** - * \file lowering.hpp + * \file lowering.cpp * \author Benjamin Segovia */ diff --git a/backend/src/ir/lowering.hpp b/backend/src/ir/lowering.hpp index a334146..ba0c87b 100644 --- a/backend/src/ir/lowering.hpp +++ b/backend/src/ir/lowering.hpp @@ -24,6 +24,9 @@ * handling returns or unsupported vector scatters / gathers */ +#ifndef __GBE_IR_LOWERING_HPP__ +#define __GBE_IR_LOWERING_HPP__ + namespace gbe { namespace ir { @@ -87,3 +90,5 @@ namespace ir { } /* namespace ir */ } /* namespace gbe */ +#endif /* __GBE_IR_LOWERING_HPP__ */ + -- 2.7.4