From dbff03b85840592fcfc97d1a10d4fad5f70e6aee Mon Sep 17 00:00:00 2001
From: =?utf8?q?Amaury=20S=C3=A9chet?= <deadalnix@gmail.com>
Date: Sun, 7 Aug 2022 15:55:14 +0000
Subject: [PATCH] [X86] Add test case to recombine LEA from OR.

---
 llvm/test/CodeGen/X86/or-lea.ll | 91 +++++++++++++++++++++++++++++++++++++++++
 1 file changed, 91 insertions(+)

diff --git a/llvm/test/CodeGen/X86/or-lea.ll b/llvm/test/CodeGen/X86/or-lea.ll
index 9ea15ee..8cc1a45 100644
--- a/llvm/test/CodeGen/X86/or-lea.ll
+++ b/llvm/test/CodeGen/X86/or-lea.ll
@@ -333,3 +333,94 @@ entry:
   %inc = add i64 %or, 1
   ret i64 %inc
 }
+
+define i32 @or_sext1(i32 %x) {
+; CHECK-LABEL: or_sext1:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    xorl %eax, %eax
+; CHECK-NEXT:    cmpl $43, %edi
+; CHECK-NEXT:    setge %al
+; CHECK-NEXT:    negl %eax
+; CHECK-NEXT:    orl $1, %eax
+; CHECK-NEXT:    retq
+  %cmp = icmp sgt i32 %x, 42
+  %sext = sext i1 %cmp to i32
+  %or = or i32 %sext, 1
+  ret i32 %or
+}
+
+define i32 @or_sext2(i32 %x) {
+; CHECK-LABEL: or_sext2:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    xorl %eax, %eax
+; CHECK-NEXT:    cmpl $43, %edi
+; CHECK-NEXT:    setge %al
+; CHECK-NEXT:    negl %eax
+; CHECK-NEXT:    orl $2, %eax
+; CHECK-NEXT:    retq
+  %cmp = icmp sgt i32 %x, 42
+  %sext = sext i1 %cmp to i32
+  %or = or i32 %sext, 2
+  ret i32 %or
+}
+
+define i32 @or_sext3(i32 %x) {
+; CHECK-LABEL: or_sext3:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    xorl %eax, %eax
+; CHECK-NEXT:    cmpl $43, %edi
+; CHECK-NEXT:    setge %al
+; CHECK-NEXT:    negl %eax
+; CHECK-NEXT:    orl $3, %eax
+; CHECK-NEXT:    retq
+  %cmp = icmp sgt i32 %x, 42
+  %sext = sext i1 %cmp to i32
+  %or = or i32 %sext, 3
+  ret i32 %or
+}
+
+define i32 @or_sext4(i32 %x) {
+; CHECK-LABEL: or_sext4:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    xorl %eax, %eax
+; CHECK-NEXT:    cmpl $43, %edi
+; CHECK-NEXT:    setge %al
+; CHECK-NEXT:    negl %eax
+; CHECK-NEXT:    orl $4, %eax
+; CHECK-NEXT:    retq
+  %cmp = icmp sgt i32 %x, 42
+  %sext = sext i1 %cmp to i32
+  %or = or i32 %sext, 4
+  ret i32 %or
+}
+
+define i32 @or_sext7(i32 %x) {
+; CHECK-LABEL: or_sext7:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    xorl %eax, %eax
+; CHECK-NEXT:    cmpl $43, %edi
+; CHECK-NEXT:    setge %al
+; CHECK-NEXT:    negl %eax
+; CHECK-NEXT:    orl $7, %eax
+; CHECK-NEXT:    retq
+  %cmp = icmp sgt i32 %x, 42
+  %sext = sext i1 %cmp to i32
+  %or = or i32 %sext, 7
+  ret i32 %or
+}
+
+define i32 @or_sext8(i32 %x) {
+; CHECK-LABEL: or_sext8:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    xorl %eax, %eax
+; CHECK-NEXT:    cmpl $43, %edi
+; CHECK-NEXT:    setge %al
+; CHECK-NEXT:    negl %eax
+; CHECK-NEXT:    orl $8, %eax
+; CHECK-NEXT:    retq
+  %cmp = icmp sgt i32 %x, 42
+  %sext = sext i1 %cmp to i32
+  %or = or i32 %sext, 8
+  ret i32 %or
+}
+
-- 
2.7.4