From da147ef0a5c6d31c21d31a52b97235a629830c15 Mon Sep 17 00:00:00 2001 From: David Green Date: Sat, 15 Feb 2020 10:41:14 +0000 Subject: [PATCH] [AArch64] Fixup kill flags on BSL generation This hopefully fixes up the expensive checks bot. --- llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp | 4 ++-- llvm/test/CodeGen/AArch64/arm64-promote-const.ll | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp b/llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp index 010cfe5..491f049 100644 --- a/llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp +++ b/llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp @@ -464,14 +464,14 @@ bool AArch64ExpandPseudo::expandMI(MachineBasicBlock &MBB, BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(Opcode == AArch64::BSPv8i8 ? AArch64::ORRv8i8 : AArch64::ORRv16i8)) - .addReg(DstReg) + .addReg(DstReg, RegState::Define) .add(MI.getOperand(1)) .add(MI.getOperand(1)); BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(Opcode == AArch64::BSPv8i8 ? AArch64::BSLv8i8 : AArch64::BSLv16i8)) .add(MI.getOperand(0)) - .addReg(DstReg) + .addReg(DstReg, RegState::Kill) .add(MI.getOperand(2)) .add(MI.getOperand(3)); } diff --git a/llvm/test/CodeGen/AArch64/arm64-promote-const.ll b/llvm/test/CodeGen/AArch64/arm64-promote-const.ll index 2b7c782..06c3cb9 100644 --- a/llvm/test/CodeGen/AArch64/arm64-promote-const.ll +++ b/llvm/test/CodeGen/AArch64/arm64-promote-const.ll @@ -1,9 +1,9 @@ ; Disable machine cse to stress the different path of the algorithm. ; Otherwise, we always fall in the simple case, i.e., only one definition. -; RUN: llc < %s -mtriple=arm64-apple-ios7.0 -disable-machine-cse -aarch64-stress-promote-const -mcpu=cyclone | FileCheck -check-prefix=PROMOTED %s +; RUN: llc < %s -mtriple=arm64-apple-ios7.0 -disable-machine-cse -aarch64-stress-promote-const -mcpu=cyclone -verify-machineinstrs | FileCheck -check-prefix=PROMOTED %s ; The REGULAR run just checks that the inputs passed to promote const expose ; the appropriate patterns. -; RUN: llc < %s -mtriple=arm64-apple-ios7.0 -disable-machine-cse -aarch64-enable-promote-const=false -mcpu=cyclone | FileCheck -check-prefix=REGULAR %s +; RUN: llc < %s -mtriple=arm64-apple-ios7.0 -disable-machine-cse -aarch64-enable-promote-const=false -mcpu=cyclone -verify-machineinstrs | FileCheck -check-prefix=REGULAR %s %struct.uint8x16x4_t = type { [4 x <16 x i8>] } -- 2.7.4