From d902180054f1d43e02888702f848a2d8cc97a559 Mon Sep 17 00:00:00 2001 From: Richard Sandiford Date: Mon, 6 Oct 2003 17:52:37 +0000 Subject: [PATCH] mips.h (PREDICATE_CODES): Add stack_operand. * config/mips/mips.h (PREDICATE_CODES): Add stack_operand. * config/mips/mips.c (stack_operand): New predicate. * config/mips/mips.md: Use it for the destination of mips16 insns that store $31. From-SVN: r72158 --- gcc/ChangeLog | 7 +++++++ gcc/config/mips/mips.c | 16 ++++++++++++++++ gcc/config/mips/mips.h | 1 + gcc/config/mips/mips.md | 20 +++++--------------- 4 files changed, 29 insertions(+), 15 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 681f677..4e45933 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,12 @@ 2003-10-06 Richard Sandiford + * config/mips/mips.h (PREDICATE_CODES): Add stack_operand. + * config/mips/mips.c (stack_operand): New predicate. + * config/mips/mips.md: Use it for the destination of mips16 insns + that store $31. + +2003-10-06 Richard Sandiford + * config/mips/mips.md (*lowsi): Renamed from lowsi. (*lowdi): Likewise lowdi. (*lowsi_mips16, *lowdi_mips16): New patterns. diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c index 304cf1d..6c9d5ec 100644 --- a/gcc/config/mips/mips.c +++ b/gcc/config/mips/mips.c @@ -1543,6 +1543,22 @@ symbolic_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED) } +/* Return true if OP is a memory reference that uses the stack pointer + as a base register. */ + +int +stack_operand (rtx op, enum machine_mode mode) +{ + struct mips_address_info addr; + + return ((mode == VOIDmode || mode == GET_MODE (op)) + && GET_CODE (op) == MEM + && mips_classify_address (&addr, XEXP (op, 0), + GET_MODE (op), false, true) == ADDRESS_REG + && addr.reg == stack_pointer_rtx); +} + + /* This function is used to implement GO_IF_LEGITIMATE_ADDRESS. It returns a nonzero value if X is a legitimate address for a memory operand of the indicated MODE. STRICT is nonzero if this function diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h index f728777..ad13b82 100644 --- a/gcc/config/mips/mips.h +++ b/gcc/config/mips/mips.h @@ -2806,6 +2806,7 @@ typedef struct mips_args { {"move_operand", { CONST_INT, CONST_DOUBLE, CONST, \ SYMBOL_REF, LABEL_REF, SUBREG, \ REG, MEM}}, \ + {"stack_operand", { MEM }}, \ {"consttable_operand", { LABEL_REF, SYMBOL_REF, CONST_INT, \ CONST_DOUBLE, CONST }}, \ {"fcc_register_operand", { REG, SUBREG }}, \ diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md index c6227eb..3bdc06a 100644 --- a/gcc/config/mips/mips.md +++ b/gcc/config/mips/mips.md @@ -4257,7 +4257,7 @@ dsrl\t%3,%3,1\n\ ;; instruction can be generated by save_restore_insns. (define_insn "" - [(set (match_operand:DI 0 "memory_operand" "=m") + [(set (match_operand:DI 0 "stack_operand" "=m") (reg:DI 31))] "TARGET_MIPS16 && TARGET_64BIT" "sd\t$31,%0" @@ -4401,25 +4401,15 @@ dsrl\t%3,%3,1\n\ } }) -;; We can only store $ra directly into a small sp offset. Should the -;; offset be too wide, non-constant or not sp-based, leave it up to -;; reload to choose a scratch register. +;; We can only store $ra directly into a small sp offset. (define_insn "" - [(set (mem:SI (plus:SI (reg:SI 29) - (match_operand:SI 0 "small_int" "n"))) + [(set (match_operand:SI 0 "stack_operand" "=m") (reg:SI 31))] "TARGET_MIPS16" - "sw\t$31,%0($sp)" + "sw\t$31,%0" [(set_attr "type" "store") - (set_attr "mode" "SI") - (set_attr_alternative - "length" - [(if_then_else - (lt (symbol_ref "(unsigned HOST_WIDE_INT) INTVAL (operands[0])") - (const_int 1024)) - (const_int 4) - (const_int 8))])]) + (set_attr "mode" "SI")]) ;; The difference between these two is whether or not ints are allowed ;; in FP registers (off by default, use -mdebugh to enable). -- 2.7.4