From d8e1cc580d01eb1271961a39999f6afbb19218ec Mon Sep 17 00:00:00 2001 From: Yang Rong Date: Tue, 13 Aug 2013 15:06:30 +0800 Subject: [PATCH] Add bool move imm support. Signed-off-by: Yang Rong Reviewed-by: Zhigang Gong --- backend/src/backend/gen_insn_selection.cpp | 17 +++++++++++++++++ backend/src/ir/instruction.cpp | 3 ++- 2 files changed, 19 insertions(+), 1 deletion(-) diff --git a/backend/src/backend/gen_insn_selection.cpp b/backend/src/backend/gen_insn_selection.cpp index 929a3bd..1e72937 100644 --- a/backend/src/backend/gen_insn_selection.cpp +++ b/backend/src/backend/gen_insn_selection.cpp @@ -1934,15 +1934,32 @@ namespace gbe const Type type = insn.getType(); const Immediate imm = insn.getImmediate(); const GenRegister dst = sel.selReg(insn.getDst(0), type); + GenRegister flagReg; sel.push(); if (sel.isScalarOrBool(insn.getDst(0)) == true) { sel.curr.execWidth = 1; + if(type == TYPE_BOOL) { + if(imm.data.b) { + if(sel.curr.predicate == GEN_PREDICATE_NONE) + flagReg = GenRegister::immuw(0xffff); + else { + if(sel.curr.physicalFlag) + flagReg = GenRegister::flag(sel.curr.flag, sel.curr.subFlag); + else + flagReg = sel.selReg(Register(sel.curr.flagIndex), TYPE_U16); + } + } else + flagReg = GenRegister::immuw(0x0); + } sel.curr.predicate = GEN_PREDICATE_NONE; sel.curr.noMask = 1; } switch (type) { + case TYPE_BOOL: + sel.MOV(dst, flagReg); + break; case TYPE_U32: case TYPE_S32: case TYPE_FLOAT: diff --git a/backend/src/ir/instruction.cpp b/backend/src/ir/instruction.cpp index 45095db..3b5ff08 100644 --- a/backend/src/ir/instruction.cpp +++ b/backend/src/ir/instruction.cpp @@ -861,7 +861,8 @@ namespace ir { return false; if (UNLIKELY(checkRegisterData(family, dst[0], fn, whyNot) == false)) return false; - CHECK_TYPE(this->type, allButBool); + //Support all type IMM, disable check + //CHECK_TYPE(this->type, allButBool); return true; } -- 2.7.4