From d8df90dc6bce77842c781aa0907147cecce4b5f6 Mon Sep 17 00:00:00 2001 From: Daniel Vetter Date: Sat, 1 Dec 2012 00:51:53 +0100 Subject: [PATCH] tests/gem_exec_bad_domains: add more bad domains - mulitple write domains - conflicting write domains - not-yet-defined gpu domains Also convert to subtests while at it. Signed-off-by: Daniel Vetter --- tests/Makefile.am | 2 +- tests/gem_exec_bad_domains.c | 181 +++++++++++++++++++++++++++++++++++-------- 2 files changed, 150 insertions(+), 33 deletions(-) diff --git a/tests/Makefile.am b/tests/Makefile.am index d0c3451..1c4412c 100644 --- a/tests/Makefile.am +++ b/tests/Makefile.am @@ -17,6 +17,7 @@ TESTS_progs_M = \ gem_cacheing \ gem_cpu_concurrent_blit \ gem_cs_tlb \ + gem_exec_bad_domains \ gem_flink \ gem_gtt_concurrent_blit \ gem_mmap_gtt \ @@ -34,7 +35,6 @@ TESTS_progs = \ gem_exec_nop \ gem_exec_big \ gem_exec_blt \ - gem_exec_bad_domains \ gem_exec_faulting_reloc \ gem_readwrite \ gem_mmap \ diff --git a/tests/gem_exec_bad_domains.c b/tests/gem_exec_bad_domains.c index f3ee08b..a39012e 100644 --- a/tests/gem_exec_bad_domains.c +++ b/tests/gem_exec_bad_domains.c @@ -83,11 +83,81 @@ run_batch(void) return ret; } +#define I915_GEM_GPU_DOMAINS \ + (I915_GEM_DOMAIN_RENDER | \ + I915_GEM_DOMAIN_SAMPLER | \ + I915_GEM_DOMAIN_COMMAND | \ + I915_GEM_DOMAIN_INSTRUCTION | \ + I915_GEM_DOMAIN_VERTEX) + +static void multi_write_domain(int fd) +{ + struct drm_i915_gem_execbuffer2 execbuf; + struct drm_i915_gem_exec_object2 exec[2]; + struct drm_i915_gem_relocation_entry reloc[1]; + uint32_t handle, handle_target; + int ret; + + handle = gem_create(fd, 4096); + handle_target = gem_create(fd, 4096); + + exec[0].handle = handle_target; + exec[0].relocation_count = 0; + exec[0].relocs_ptr = 0; + exec[0].alignment = 0; + exec[0].offset = 0; + exec[0].flags = 0; + exec[0].rsvd1 = 0; + exec[0].rsvd2 = 0; + + exec[1].handle = handle; + exec[1].relocation_count = 1; + exec[1].relocs_ptr = (uintptr_t) reloc; + exec[1].alignment = 0; + exec[1].offset = 0; + exec[1].flags = 0; + exec[1].rsvd1 = 0; + exec[1].rsvd2 = 0; + + reloc[0].offset = 4; + reloc[0].delta = 0; + reloc[0].target_handle = handle_target; + reloc[0].read_domains = I915_GEM_DOMAIN_RENDER | I915_GEM_DOMAIN_INSTRUCTION; + reloc[0].write_domain = I915_GEM_DOMAIN_RENDER | I915_GEM_DOMAIN_INSTRUCTION; + reloc[0].presumed_offset = 0; + + execbuf.buffers_ptr = (uintptr_t)exec; + execbuf.buffer_count = 2; + execbuf.batch_start_offset = 0; + execbuf.batch_len = 8; + execbuf.cliprects_ptr = 0; + execbuf.num_cliprects = 0; + execbuf.DR1 = 0; + execbuf.DR4 = 0; + execbuf.flags = 0; + i915_execbuffer2_set_context_id(execbuf, 0); + execbuf.rsvd2 = 0; + + ret = drmIoctl(fd, + DRM_IOCTL_I915_GEM_EXECBUFFER2, + &execbuf); + + gem_close(fd, handle); + gem_close(fd, handle_target); + + if (ret == 0 || errno != EINVAL) { + fprintf(stderr, "multiple write domains not rejected\n"); + exit(1); + } +} + int main(int argc, char **argv) { int fd, ret; drm_intel_bo *tmp; + drmtest_subtest_init(argc, argv); + fd = drm_open_any(); bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); @@ -96,44 +166,91 @@ int main(int argc, char **argv) tmp = drm_intel_bo_alloc(bufmgr, "tmp", 128 * 128, 4096); - BEGIN_BATCH(2); - OUT_BATCH(0); - OUT_RELOC(tmp, I915_GEM_DOMAIN_CPU, 0, 0); - ADVANCE_BATCH(); - ret = run_batch(); - if (ret != -EINVAL) { - fprintf(stderr, "(cpu, 0) reloc not rejected\n"); - exit(1); + if (drmtest_run_subtest("cpu-domain")) { + BEGIN_BATCH(2); + OUT_BATCH(0); + OUT_RELOC(tmp, I915_GEM_DOMAIN_CPU, 0, 0); + ADVANCE_BATCH(); + ret = run_batch(); + if (ret != -EINVAL) { + fprintf(stderr, "(cpu, 0) reloc not rejected\n"); + exit(1); + } + + BEGIN_BATCH(2); + OUT_BATCH(0); + OUT_RELOC(tmp, I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU, 0); + ADVANCE_BATCH(); + ret = run_batch(); + if (ret != -EINVAL) { + fprintf(stderr, "(cpu, cpu) reloc not rejected\n"); + exit(1); + } } - BEGIN_BATCH(2); - OUT_BATCH(0); - OUT_RELOC(tmp, I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU, 0); - ADVANCE_BATCH(); - ret = run_batch(); - if (ret != -EINVAL) { - fprintf(stderr, "(cpu, cpu) reloc not rejected\n"); - exit(1); + if (drmtest_run_subtest("gtt-domain")) { + BEGIN_BATCH(2); + OUT_BATCH(0); + OUT_RELOC(tmp, I915_GEM_DOMAIN_GTT, 0, 0); + ADVANCE_BATCH(); + ret = run_batch(); + if (ret != -EINVAL) { + fprintf(stderr, "(gtt, 0) reloc not rejected\n"); + exit(1); + } + + BEGIN_BATCH(2); + OUT_BATCH(0); + OUT_RELOC(tmp, I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT, 0); + ADVANCE_BATCH(); + ret = run_batch(); + if (ret != -EINVAL) { + fprintf(stderr, "(gtt, gtt) reloc not rejected\n"); + exit(1); + } } - BEGIN_BATCH(2); - OUT_BATCH(0); - OUT_RELOC(tmp, I915_GEM_DOMAIN_GTT, 0, 0); - ADVANCE_BATCH(); - ret = run_batch(); - if (ret != -EINVAL) { - fprintf(stderr, "(gtt, 0) reloc not rejected\n"); - exit(1); + if (drmtest_run_subtest("conflicting-write-domain")) { + BEGIN_BATCH(4); + OUT_BATCH(0); + OUT_RELOC(tmp, I915_GEM_DOMAIN_RENDER, + I915_GEM_DOMAIN_RENDER, 0); + OUT_BATCH(0); + OUT_RELOC(tmp, I915_GEM_DOMAIN_INSTRUCTION, + I915_GEM_DOMAIN_INSTRUCTION, 0); + ADVANCE_BATCH(); + ret = run_batch(); + if (ret != -EINVAL) { + fprintf(stderr, "conflicting write domains not rejected\n"); + exit(1); + } } - BEGIN_BATCH(2); - OUT_BATCH(0); - OUT_RELOC(tmp, I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT, 0); - ADVANCE_BATCH(); - ret = run_batch(); - if (ret != -EINVAL) { - fprintf(stderr, "(gtt, gtt) reloc not rejected\n"); - exit(1); + if (drmtest_run_subtest("double-write-domain")) + multi_write_domain(fd); + + if (drmtest_run_subtest("invalid-gpu-domain")) { + BEGIN_BATCH(2); + OUT_BATCH(0); + OUT_RELOC(tmp, ~(I915_GEM_GPU_DOMAINS | I915_GEM_DOMAIN_GTT | I915_GEM_DOMAIN_CPU), + 0, 0); + ADVANCE_BATCH(); + ret = run_batch(); + if (ret != -EINVAL) { + fprintf(stderr, "invalid gpu read domains not rejected\n"); + exit(1); + } + + BEGIN_BATCH(2); + OUT_BATCH(0); + OUT_RELOC(tmp, I915_GEM_DOMAIN_GTT << 1, + I915_GEM_DOMAIN_GTT << 1, 0); + ADVANCE_BATCH(); + ret = run_batch(); + if (ret != -EINVAL) { + fprintf(stderr, "invalid gpu domain not rejected\n"); + exit(1); + } } intel_batchbuffer_free(batch); -- 2.7.4