From d86e90abdd1e9cd1018aa5dc5522b266c6bac937 Mon Sep 17 00:00:00 2001 From: Hal Finkel Date: Thu, 23 Apr 2015 23:05:08 +0000 Subject: [PATCH] [PowerPC] Use sync inst alias when printing So long as the choice between printing msync and sync is not ambiguous, we can print 'sync 0' and just 'sync'. llvm-svn: 235663 --- llvm/lib/Target/PowerPC/PPCInstrInfo.td | 2 +- llvm/test/CodeGen/PowerPC/atomics-fences.ll | 3 +-- llvm/test/CodeGen/PowerPC/atomics-indexed.ll | 7 +++---- llvm/test/CodeGen/PowerPC/atomics.ll | 8 ++++---- llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-bookII.txt | 4 ++-- llvm/test/MC/PowerPC/ppc64-encoding-bookII.s | 8 ++++---- 6 files changed, 15 insertions(+), 17 deletions(-) diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.td b/llvm/lib/Target/PowerPC/PPCInstrInfo.td index b2457b3..566e4e7 100644 --- a/llvm/lib/Target/PowerPC/PPCInstrInfo.td +++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.td @@ -3484,7 +3484,7 @@ class PPCAsmPseudo def : InstAlias<"sc", (SC 0)>; def : InstAlias<"sync", (SYNC 0)>, Requires<[HasSYNC]>; -def : InstAlias<"msync", (SYNC 0)>, Requires<[HasSYNC]>; +def : InstAlias<"msync", (SYNC 0), 0>, Requires<[HasSYNC]>; def : InstAlias<"lwsync", (SYNC 1)>, Requires<[HasSYNC]>; def : InstAlias<"ptesync", (SYNC 2)>, Requires<[HasSYNC]>; diff --git a/llvm/test/CodeGen/PowerPC/atomics-fences.ll b/llvm/test/CodeGen/PowerPC/atomics-fences.ll index 09dd61f..c015fa6 100644 --- a/llvm/test/CodeGen/PowerPC/atomics-fences.ll +++ b/llvm/test/CodeGen/PowerPC/atomics-fences.ll @@ -21,8 +21,7 @@ define void @fence_release() { } define void @fence_seq_cst() { ; CHECK-LABEL: fence_seq_cst -; CHECK: sync 0 -; PPC440-NOT: sync 0 +; CHECK: sync ; PPC440: msync fence seq_cst ret void diff --git a/llvm/test/CodeGen/PowerPC/atomics-indexed.ll b/llvm/test/CodeGen/PowerPC/atomics-indexed.ll index 2f1a0b9..7a0dde0 100644 --- a/llvm/test/CodeGen/PowerPC/atomics-indexed.ll +++ b/llvm/test/CodeGen/PowerPC/atomics-indexed.ll @@ -9,7 +9,7 @@ ; Indexed version of loads define i8 @load_x_i8_seq_cst([100000 x i8]* %mem) { ; CHECK-LABEL: load_x_i8_seq_cst -; CHECK: sync 0 +; CHECK: sync ; CHECK: lbzx ; CHECK: lwsync %ptr = getelementptr inbounds [100000 x i8], [100000 x i8]* %mem, i64 0, i64 90000 @@ -46,7 +46,7 @@ define i64 @load_x_i64_unordered([100000 x i64]* %mem) { ; Indexed version of stores define void @store_x_i8_seq_cst([100000 x i8]* %mem) { ; CHECK-LABEL: store_x_i8_seq_cst -; CHECK: sync 0 +; CHECK: sync ; CHECK: stbx %ptr = getelementptr inbounds [100000 x i8], [100000 x i8]* %mem, i64 0, i64 90000 store atomic i8 42, i8* %ptr seq_cst, align 1 @@ -70,8 +70,7 @@ define void @store_x_i32_monotonic([100000 x i32]* %mem) { } define void @store_x_i64_unordered([100000 x i64]* %mem) { ; CHECK-LABEL: store_x_i64_unordered -; CHECK-NOT: sync 0 -; CHECK-NOT: lwsync +; CHECK-NOT: sync ; PPC32: __sync_ ; PPC64-NOT: __sync_ ; PPC64: stdx diff --git a/llvm/test/CodeGen/PowerPC/atomics.ll b/llvm/test/CodeGen/PowerPC/atomics.ll index 18038d4..2e1eff0 100644 --- a/llvm/test/CodeGen/PowerPC/atomics.ll +++ b/llvm/test/CodeGen/PowerPC/atomics.ll @@ -32,7 +32,7 @@ define i32 @load_i32_acquire(i32* %mem) { } define i64 @load_i64_seq_cst(i64* %mem) { ; CHECK-LABEL: load_i64_seq_cst -; CHECK: sync 0 +; CHECK: sync ; PPC32: __sync_ ; PPC64-NOT: __sync_ ; PPC64: ld @@ -65,7 +65,7 @@ define void @store_i32_release(i32* %mem) { } define void @store_i64_seq_cst(i64* %mem) { ; CHECK-LABEL: store_i64_seq_cst -; CHECK: sync 0 +; CHECK: sync ; PPC32: __sync_ ; PPC64-NOT: __sync_ ; PPC64: std @@ -76,7 +76,7 @@ define void @store_i64_seq_cst(i64* %mem) { ; Atomic CmpXchg define i8 @cas_strong_i8_sc_sc(i8* %mem) { ; CHECK-LABEL: cas_strong_i8_sc_sc -; CHECK: sync 0 +; CHECK: sync %val = cmpxchg i8* %mem, i8 0, i8 1 seq_cst seq_cst ; CHECK: lwsync %loaded = extractvalue { i8, i1} %val, 0 @@ -116,7 +116,7 @@ define i8 @add_i8_monotonic(i8* %mem, i8 %operand) { } define i16 @xor_i16_seq_cst(i16* %mem, i16 %operand) { ; CHECK-LABEL: xor_i16_seq_cst -; CHECK: sync 0 +; CHECK: sync %val = atomicrmw xor i16* %mem, i16 %operand seq_cst ; CHECK: lwsync ret i16 %val diff --git a/llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-bookII.txt b/llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-bookII.txt index 8b8d6a4..480681c 100644 --- a/llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-bookII.txt +++ b/llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-bookII.txt @@ -72,10 +72,10 @@ # CHECK: ldarx 2, 3, 4, 1 0x7c 0x43 0x20 0xa9 -# CHECK: sync 0 +# CHECK: sync 0x7c 0x00 0x04 0xac -# CHECK: sync 0 +# CHECK: sync 0x7c 0x00 0x04 0xac # CHECK: lwsync diff --git a/llvm/test/MC/PowerPC/ppc64-encoding-bookII.s b/llvm/test/MC/PowerPC/ppc64-encoding-bookII.s index 453a371..9b68dcc 100644 --- a/llvm/test/MC/PowerPC/ppc64-encoding-bookII.s +++ b/llvm/test/MC/PowerPC/ppc64-encoding-bookII.s @@ -131,11 +131,11 @@ # CHECK-LE: ldarx 2, 3, 4, 1 # encoding: [0xa9,0x20,0x43,0x7c] ldarx 2, 3, 4, 1 -# CHECK-BE: sync 0 # encoding: [0x7c,0x00,0x04,0xac] -# CHECK-LE: sync 0 # encoding: [0xac,0x04,0x00,0x7c] +# CHECK-BE: sync # encoding: [0x7c,0x00,0x04,0xac] +# CHECK-LE: sync # encoding: [0xac,0x04,0x00,0x7c] sync -# CHECK-BE: sync 0 # encoding: [0x7c,0x00,0x04,0xac] -# CHECK-LE: sync 0 # encoding: [0xac,0x04,0x00,0x7c] +# CHECK-BE: sync # encoding: [0x7c,0x00,0x04,0xac] +# CHECK-LE: sync # encoding: [0xac,0x04,0x00,0x7c] msync # CHECK-BE: lwsync # encoding: [0x7c,0x20,0x04,0xac] # CHECK-LE: lwsync # encoding: [0xac,0x04,0x20,0x7c] -- 2.7.4