From d83a3ee2977233068a6bca0a3bc25a493e47c96a Mon Sep 17 00:00:00 2001 From: yroux Date: Wed, 8 Oct 2014 14:11:32 +0000 Subject: [PATCH] 2014-10-08 Yvan Roux Backport from trunk r215471. 2014-09-22 James Greenhalgh * config/aarch64/geniterators.sh: New. * config/aarch64/iterators.md (VDQF_DF): New. * config/aarch64/t-aarch64: Generate aarch64-builtin-iterators.h. * config/aarch64/aarch64-builtins.c (BUILTIN_*) Remove. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@216004 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/ChangeLog.linaro | 10 +++ gcc/config/aarch64/aarch64-builtins.c | 123 +--------------------------------- gcc/config/aarch64/geniterators.sh | 45 +++++++++++++ gcc/config/aarch64/iterators.md | 3 + gcc/config/aarch64/t-aarch64 | 9 ++- 5 files changed, 67 insertions(+), 123 deletions(-) create mode 100644 gcc/config/aarch64/geniterators.sh diff --git a/gcc/ChangeLog.linaro b/gcc/ChangeLog.linaro index bd72db9..f5a2dfe 100644 --- a/gcc/ChangeLog.linaro +++ b/gcc/ChangeLog.linaro @@ -1,5 +1,15 @@ 2014-10-08 Yvan Roux + Backport from trunk r215471. + 2014-09-22 James Greenhalgh + + * config/aarch64/geniterators.sh: New. + * config/aarch64/iterators.md (VDQF_DF): New. + * config/aarch64/t-aarch64: Generate aarch64-builtin-iterators.h. + * config/aarch64/aarch64-builtins.c (BUILTIN_*) Remove. + +2014-10-08 Yvan Roux + Backport from trunk r215206, r215207, r215208. 2014-09-12 Wilco Dijkstra diff --git a/gcc/config/aarch64/aarch64-builtins.c b/gcc/config/aarch64/aarch64-builtins.c index 3f7d50e..677ea58 100644 --- a/gcc/config/aarch64/aarch64-builtins.c +++ b/gcc/config/aarch64/aarch64-builtins.c @@ -292,93 +292,7 @@ aarch64_types_storestruct_lane_qualifiers[SIMD_MAX_BUILTIN_ARGS] VAR11 (T, N, MAP, A, B, C, D, E, F, G, H, I, J, K) \ VAR1 (T, N, MAP, L) -/* BUILTIN_ macros should expand to cover the same range of - modes as is given for each define_mode_iterator in - config/aarch64/iterators.md. */ - -#define BUILTIN_DX(T, N, MAP) \ - VAR2 (T, N, MAP, di, df) -#define BUILTIN_GPF(T, N, MAP) \ - VAR2 (T, N, MAP, sf, df) -#define BUILTIN_SDQ_I(T, N, MAP) \ - VAR4 (T, N, MAP, qi, hi, si, di) -#define BUILTIN_SD_HSI(T, N, MAP) \ - VAR2 (T, N, MAP, hi, si) -#define BUILTIN_V2F(T, N, MAP) \ - VAR2 (T, N, MAP, v2sf, v2df) -#define BUILTIN_VALL(T, N, MAP) \ - VAR10 (T, N, MAP, v8qi, v16qi, v4hi, v8hi, v2si, \ - v4si, v2di, v2sf, v4sf, v2df) -#define BUILTIN_VALLDI(T, N, MAP) \ - VAR11 (T, N, MAP, v8qi, v16qi, v4hi, v8hi, v2si, \ - v4si, v2di, v2sf, v4sf, v2df, di) -#define BUILTIN_VALLDIF(T, N, MAP) \ - VAR12 (T, N, MAP, v8qi, v16qi, v4hi, v8hi, v2si, \ - v4si, v2di, v2sf, v4sf, v2df, di, df) -#define BUILTIN_VB(T, N, MAP) \ - VAR2 (T, N, MAP, v8qi, v16qi) -#define BUILTIN_VD(T, N, MAP) \ - VAR4 (T, N, MAP, v8qi, v4hi, v2si, v2sf) -#define BUILTIN_VDC(T, N, MAP) \ - VAR6 (T, N, MAP, v8qi, v4hi, v2si, v2sf, di, df) -#define BUILTIN_VDIC(T, N, MAP) \ - VAR3 (T, N, MAP, v8qi, v4hi, v2si) -#define BUILTIN_VDN(T, N, MAP) \ - VAR3 (T, N, MAP, v4hi, v2si, di) -#define BUILTIN_VDQ(T, N, MAP) \ - VAR7 (T, N, MAP, v8qi, v16qi, v4hi, v8hi, v2si, v4si, v2di) -#define BUILTIN_VDQF(T, N, MAP) \ - VAR3 (T, N, MAP, v2sf, v4sf, v2df) -#define BUILTIN_VDQF_DF(T, N, MAP) \ - VAR4 (T, N, MAP, v2sf, v4sf, v2df, df) -#define BUILTIN_VDQH(T, N, MAP) \ - VAR2 (T, N, MAP, v4hi, v8hi) -#define BUILTIN_VDQHS(T, N, MAP) \ - VAR4 (T, N, MAP, v4hi, v8hi, v2si, v4si) -#define BUILTIN_VDQIF(T, N, MAP) \ - VAR9 (T, N, MAP, v8qi, v16qi, v4hi, v8hi, v2si, v4si, v2sf, v4sf, v2df) -#define BUILTIN_VDQM(T, N, MAP) \ - VAR6 (T, N, MAP, v8qi, v16qi, v4hi, v8hi, v2si, v4si) -#define BUILTIN_VDQV(T, N, MAP) \ - VAR5 (T, N, MAP, v8qi, v16qi, v4hi, v8hi, v4si) -#define BUILTIN_VDQQH(T, N, MAP) \ - VAR4 (T, N, MAP, v8qi, v16qi, v4hi, v8hi) -#define BUILTIN_VDQ_BHSI(T, N, MAP) \ - VAR6 (T, N, MAP, v8qi, v16qi, v4hi, v8hi, v2si, v4si) -#define BUILTIN_VDQ_I(T, N, MAP) \ - VAR7 (T, N, MAP, v8qi, v16qi, v4hi, v8hi, v2si, v4si, v2di) -#define BUILTIN_VDW(T, N, MAP) \ - VAR3 (T, N, MAP, v8qi, v4hi, v2si) -#define BUILTIN_VD_BHSI(T, N, MAP) \ - VAR3 (T, N, MAP, v8qi, v4hi, v2si) -#define BUILTIN_VD_HSI(T, N, MAP) \ - VAR2 (T, N, MAP, v4hi, v2si) -#define BUILTIN_VD_RE(T, N, MAP) \ - VAR6 (T, N, MAP, v8qi, v4hi, v2si, v2sf, di, df) -#define BUILTIN_VQ(T, N, MAP) \ - VAR6 (T, N, MAP, v16qi, v8hi, v4si, v2di, v4sf, v2df) -#define BUILTIN_VQN(T, N, MAP) \ - VAR3 (T, N, MAP, v8hi, v4si, v2di) -#define BUILTIN_VQW(T, N, MAP) \ - VAR3 (T, N, MAP, v16qi, v8hi, v4si) -#define BUILTIN_VQ_HSI(T, N, MAP) \ - VAR2 (T, N, MAP, v8hi, v4si) -#define BUILTIN_VQ_S(T, N, MAP) \ - VAR6 (T, N, MAP, v8qi, v16qi, v4hi, v8hi, v2si, v4si) -#define BUILTIN_VSDQ_HSI(T, N, MAP) \ - VAR6 (T, N, MAP, v4hi, v8hi, v2si, v4si, hi, si) -#define BUILTIN_VSDQ_I(T, N, MAP) \ - VAR11 (T, N, MAP, v8qi, v16qi, v4hi, v8hi, v2si, v4si, v2di, qi, hi, si, di) -#define BUILTIN_VSDQ_I_BHSI(T, N, MAP) \ - VAR10 (T, N, MAP, v8qi, v16qi, v4hi, v8hi, v2si, v4si, v2di, qi, hi, si) -#define BUILTIN_VSDQ_I_DI(T, N, MAP) \ - VAR8 (T, N, MAP, v8qi, v16qi, v4hi, v8hi, v2si, v4si, v2di, di) -#define BUILTIN_VSD_HSI(T, N, MAP) \ - VAR4 (T, N, MAP, v4hi, v2si, hi, si) -#define BUILTIN_VSQN_HSDI(T, N, MAP) \ - VAR6 (T, N, MAP, v8hi, v4si, v2di, hi, si, di) -#define BUILTIN_VSTRUCT(T, N, MAP) \ - VAR3 (T, N, MAP, oi, ci, xi) +#include "aarch64-builtin-iterators.h" static aarch64_simd_builtin_datum aarch64_simd_builtin_data[] = { #include "aarch64-simd-builtins.def" @@ -1494,41 +1408,6 @@ aarch64_atomic_assign_expand_fenv (tree *hold, tree *clear, tree *update) #undef AARCH64_CHECK_BUILTIN_MODE #undef AARCH64_FIND_FRINT_VARIANT -#undef BUILTIN_DX -#undef BUILTIN_SDQ_I -#undef BUILTIN_SD_HSI -#undef BUILTIN_V2F -#undef BUILTIN_VALL -#undef BUILTIN_VB -#undef BUILTIN_VD -#undef BUILTIN_VDC -#undef BUILTIN_VDIC -#undef BUILTIN_VDN -#undef BUILTIN_VDQ -#undef BUILTIN_VDQF -#undef BUILTIN_VDQH -#undef BUILTIN_VDQHS -#undef BUILTIN_VDQIF -#undef BUILTIN_VDQM -#undef BUILTIN_VDQV -#undef BUILTIN_VDQ_BHSI -#undef BUILTIN_VDQ_I -#undef BUILTIN_VDW -#undef BUILTIN_VD_BHSI -#undef BUILTIN_VD_HSI -#undef BUILTIN_VD_RE -#undef BUILTIN_VQ -#undef BUILTIN_VQN -#undef BUILTIN_VQW -#undef BUILTIN_VQ_HSI -#undef BUILTIN_VQ_S -#undef BUILTIN_VSDQ_HSI -#undef BUILTIN_VSDQ_I -#undef BUILTIN_VSDQ_I_BHSI -#undef BUILTIN_VSDQ_I_DI -#undef BUILTIN_VSD_HSI -#undef BUILTIN_VSQN_HSDI -#undef BUILTIN_VSTRUCT #undef CF0 #undef CF1 #undef CF2 diff --git a/gcc/config/aarch64/geniterators.sh b/gcc/config/aarch64/geniterators.sh new file mode 100644 index 0000000..a5bd690 --- /dev/null +++ b/gcc/config/aarch64/geniterators.sh @@ -0,0 +1,45 @@ +#!/bin/sh +# +# Copyright (C) 2014 Free Software Foundation, Inc. +# Contributed by ARM Ltd. +# +# This file is part of GCC. +# +# GCC is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 3, or (at your option) +# any later version. +# +# GCC is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with GCC; see the file COPYING3. If not see +# . + +# Generate aarch64-builtin-iterators.h, a file containing a series of +# BUILTIN_ macros, which expand to VAR Macros covering the +# same set of modes as the iterator in iterators.md + +echo "/* -*- buffer-read-only: t -*- */" +echo "/* Generated automatically by geniterators.sh from iterators.md. */" +echo "#ifndef GCC_AARCH64_ITERATORS_H" +echo "#define GCC_AARCH64_ITERATORS_H" + +# Strip newlines, create records marked ITERATOR, and strip junk (anything +# which does not have a matching brace because it contains characters we +# don't want to or can't handle (e.g P, PTR iterators change depending on +# Pmode and ptr_mode). +cat $1 | tr "\n" " " \ + | sed 's/(define_mode_iterator \([A-Za-z0-9_]*\) \([]\[A-Z0-9 \t]*\)/\n#define BUILTIN_\1(T, N, MAP) \\ \2\n/g' \ + | grep '#define [A-Z0-9_(), \\]* \[[A-Z0-9[:space:]]*]' \ + | sed 's/\t//g' \ + | sed 's/ \+/ /g' \ + | sed 's/ \[\([A-Z0-9 ]*\)]/\n\L\1/' \ + | awk ' BEGIN { FS = " " ; OFS = ", "} \ + /#/ { print } \ + ! /#/ { $1 = $1 ; printf " VAR%d (T, N, MAP, %s)\n", NF, $0 }' + +echo "#endif /* GCC_AARCH64_ITERATORS_H */" diff --git a/gcc/config/aarch64/iterators.md b/gcc/config/aarch64/iterators.md index ac2c29e..36e1aa5 100644 --- a/gcc/config/aarch64/iterators.md +++ b/gcc/config/aarch64/iterators.md @@ -89,6 +89,9 @@ ;; Vector Float modes. (define_mode_iterator VDQF [V2SF V4SF V2DF]) +;; Vector Float modes, and DF. +(define_mode_iterator VDQF_DF [V2SF V4SF V2DF DF]) + ;; Vector single Float modes. (define_mode_iterator VDQSF [V2SF V4SF]) diff --git a/gcc/config/aarch64/t-aarch64 b/gcc/config/aarch64/t-aarch64 index 158fbb5..ea2b3e9 100644 --- a/gcc/config/aarch64/t-aarch64 +++ b/gcc/config/aarch64/t-aarch64 @@ -31,10 +31,17 @@ aarch64-builtins.o: $(srcdir)/config/aarch64/aarch64-builtins.c $(CONFIG_H) \ $(SYSTEM_H) coretypes.h $(TM_H) \ $(RTL_H) $(TREE_H) expr.h $(TM_P_H) $(RECOG_H) langhooks.h \ $(DIAGNOSTIC_CORE_H) $(OPTABS_H) \ - $(srcdir)/config/aarch64/aarch64-simd-builtins.def + $(srcdir)/config/aarch64/aarch64-simd-builtins.def \ + aarch64-builtin-iterators.h $(COMPILER) -c $(ALL_COMPILERFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) \ $(srcdir)/config/aarch64/aarch64-builtins.c +aarch64-builtin-iterators.h: $(srcdir)/config/aarch64/geniterators.sh \ + $(srcdir)/config/aarch64/iterators.md + $(SHELL) $(srcdir)/config/aarch64/geniterators.sh \ + $(srcdir)/config/aarch64/iterators.md > \ + aarch64-builtin-iterators.h + aarch-common.o: $(srcdir)/config/arm/aarch-common.c $(CONFIG_H) $(SYSTEM_H) \ coretypes.h $(TM_H) $(TM_P_H) $(RTL_H) $(TREE_H) output.h $(C_COMMON_H) $(COMPILER) -c $(ALL_COMPILERFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) \ -- 2.7.4