From d77052881bc8f8a79f195a3859719c517d5aa9ad Mon Sep 17 00:00:00 2001 From: Thomas Schwinge Date: Wed, 18 Feb 2015 09:31:18 +0100 Subject: [PATCH] Begin documenting the nvptx backend. gcc/ * doc/install.texi (nvptx-*-none): New section. * doc/invoke.texi (Nvidia PTX Options): Likewise. * config/nvptx/nvptx.opt: Update. From-SVN: r220783 --- gcc/ChangeLog | 4 ++++ gcc/config/nvptx/nvptx.opt | 10 +++++----- gcc/doc/install.texi | 23 +++++++++++++++++++++++ gcc/doc/invoke.texi | 26 ++++++++++++++++++++++++++ 4 files changed, 58 insertions(+), 5 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 0f144f5..16153ae 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,9 @@ 2015-02-18 Thomas Schwinge + * doc/install.texi (nvptx-*-none): New section. + * doc/invoke.texi (Nvidia PTX Options): Likewise. + * config/nvptx/nvptx.opt: Update. + * config/nvptx/mkoffload.c (parse_env_var, free_array_of_ptrs) (access_check): New functions, copied from config/i386/intelmic-mkoffload.c. diff --git a/gcc/config/nvptx/nvptx.opt b/gcc/config/nvptx/nvptx.opt index 1448dfc..249a61d 100644 --- a/gcc/config/nvptx/nvptx.opt +++ b/gcc/config/nvptx/nvptx.opt @@ -17,13 +17,13 @@ ; along with GCC; see the file COPYING3. If not see ; . -m64 -Target Report RejectNegative Mask(ABI64) -Generate code for a 64 bit ABI - m32 Target Report RejectNegative InverseMask(ABI64) -Generate code for a 32 bit ABI +Generate code for a 32-bit ABI + +m64 +Target Report RejectNegative Mask(ABI64) +Generate code for a 64-bit ABI mmainkernel Target Report RejectNegative diff --git a/gcc/doc/install.texi b/gcc/doc/install.texi index 47380a3..dca0d85 100644 --- a/gcc/doc/install.texi +++ b/gcc/doc/install.texi @@ -3304,6 +3304,8 @@ information have to. @item @uref{#nds32be-x-elf,,nds32be-*-elf} @item +@uref{#nvptx-x-none,,nvptx-*-none} +@item @uref{#powerpc-x-x,,powerpc*-*-*} @item @uref{#powerpc-x-darwin,,powerpc-*-darwin*} @@ -4271,6 +4273,27 @@ Andes NDS32 target in big endian mode. @html
@end html +@anchor{nvptx-x-none} +@heading nvptx-*-none +Nvidia PTX target. + +Instead of GNU binutils, you will need to install +@uref{https://github.com/MentorEmbedded/nvptx-tools/,,nvptx-tools}. +Tell GCC where to find it: +@option{--with-build-time-tools=[install-nvptx-tools]/nvptx-none/bin}. + +A nvptx port of newlib is available at +@uref{https://github.com/MentorEmbedded/nvptx-newlib/,,nvptx-newlib}. +It can be automatically built together with GCC@. For this, add a +symbolic link to nvptx-newlib's @file{newlib} directory to the +directory containing the GCC sources. + +Use the @option{--disable-sjlj-exceptions} and +@option{--enable-newlib-io-long-long} options when configuring. + +@html +
+@end html @anchor{powerpc-x-x} @heading powerpc-*-* You can specify a default version for the @option{-mcpu=@var{cpu_type}} diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index d009cb2..4a79b48 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -840,6 +840,9 @@ Objective-C and Objective-C++ Dialects}. -mcustom-fpu-cfg=@var{name} @gol -mhal -msmallc -msys-crt0=@var{name} -msys-lib=@var{name}} +@emph{Nvidia PTX Options} +@gccoptlist{-m32 -m64 -mmainkernel} + @emph{PDP-11 Options} @gccoptlist{-mfpu -msoft-float -mac0 -mno-ac0 -m40 -m45 -m10 @gol -mbcopy -mbcopy-builtin -mint32 -mno-int16 @gol @@ -11989,6 +11992,7 @@ platform. * MSP430 Options:: * NDS32 Options:: * Nios II Options:: +* Nvidia PTX Options:: * PDP-11 Options:: * picoChip Options:: * PowerPC Options:: @@ -18301,6 +18305,28 @@ This option is typically used to link with a library provided by a HAL BSP. @end table +@node Nvidia PTX Options +@subsection Nvidia PTX Options +@cindex Nvidia PTX options +@cindex nvptx options + +These options are defined for Nvidia PTX: + +@table @gcctabopt + +@item -m32 +@itemx -m64 +@opindex m32 +@opindex m64 +Generate code for 32-bit or 64-bit ABI. + +@item -mmainkernel +@opindex mmainkernel +Link in code for a __main kernel. This is for stand-alone instead of +offloading execution. + +@end table + @node PDP-11 Options @subsection PDP-11 Options @cindex PDP-11 Options -- 2.7.4