From d6beb90e130e3dcb08429add3fe336b4c2d6603d Mon Sep 17 00:00:00 2001 From: Xuepeng Guo Date: Thu, 28 Aug 2008 19:36:58 +0000 Subject: [PATCH] vector-1b_main.c: New. 2008-08-28 Xuepeng Guo Joey Ye H.J. Lu * gcc.dg/compat/vector-1b_main.c: New. * gcc.dg/compat/vector-1b_x.c: Likewise. * gcc.dg/compat/vector-1b_y.c: Likewise. * gcc.dg/compat/vector-2b_main.c: Likewise. * gcc.dg/compat/vector-2b_x.c: Likewise. * gcc.dg/compat/vector-2b_y.c: Likewise. * gcc.target/i386/aes-avx-check.h: Likewise. * gcc.target/i386/avx-1.c: Likewise. * gcc.target/i386/avx-2.c: Likewise. * gcc.target/i386/avx-3.c: Likewise. * gcc.target/i386/avx-check.h: Likewise. * gcc.target/i386/avx-set1-epi32-1.c: Likewise. * gcc.target/i386/avx-set1-pd-256-1.c: Likewise. * gcc.target/i386/avx-set1-ps-256-1.c: Likewise. * gcc.target/i386/avx-set-v16hi-1.c: Likewise. * gcc.target/i386/avx-set-v16hi-2.c: Likewise. * gcc.target/i386/avx-set-v16hi-3.c: Likewise. * gcc.target/i386/avx-set-v16hi-4.c: Likewise. * gcc.target/i386/avx-set-v16hi-5.c: Likewise. * gcc.target/i386/avx-set-v32qi-1.c: Likewise. * gcc.target/i386/avx-set-v32qi-2.c: Likewise. * gcc.target/i386/avx-set-v32qi-3.c: Likewise. * gcc.target/i386/avx-set-v32qi-4.c: Likewise. * gcc.target/i386/avx-set-v32qi-5.c: Likewise. * gcc.target/i386/avx-set-v4df-1.c: Likewise. * gcc.target/i386/avx-set-v4df-2.c: Likewise. * gcc.target/i386/avx-set-v4df-3.c: Likewise. * gcc.target/i386/avx-set-v4df-4.c: Likewise. * gcc.target/i386/avx-set-v4df-5.c: Likewise. * gcc.target/i386/avx-set-v4di-1.c: Likewise. * gcc.target/i386/avx-set-v4di-2.c: Likewise. * gcc.target/i386/avx-set-v4di-3.c: Likewise. * gcc.target/i386/avx-set-v4di-4.c: Likewise. * gcc.target/i386/avx-set-v4di-5.c: Likewise. * gcc.target/i386/avx-set-v8sf-1.c: Likewise. * gcc.target/i386/avx-set-v8sf-2.c: Likewise. * gcc.target/i386/avx-set-v8sf-3.c: Likewise. * gcc.target/i386/avx-set-v8sf-4.c: Likewise. * gcc.target/i386/avx-set-v8sf-5.c: Likewise. * gcc.target/i386/avx-set-v8si-1.c: Likewise. * gcc.target/i386/avx-set-v8si-2.c: Likewise. * gcc.target/i386/avx-set-v8si-3.c: Likewise. * gcc.target/i386/avx-set-v8si-4.c: Likewise. * gcc.target/i386/avx-set-v8si-5.c: Likewise. * gcc.target/i386/avx-setzero-pd-256-1.c: Likewise. * gcc.target/i386/avx-setzero-ps-256-1.c: Likewise. * gcc.target/i386/avx-setzero-si256-1.c: Likewise. * gcc.target/i386/avx-vaddpd-1.c: Likewise. * gcc.target/i386/avx-vaddpd-256-1.c: Likewise. * gcc.target/i386/avx-vaddps-1.c: Likewise. * gcc.target/i386/avx-vaddps-256-1.c: Likewise. * gcc.target/i386/avx-vaddsd-1.c: Likewise. * gcc.target/i386/avx-vaddss-1.c: Likewise. * gcc.target/i386/avx-vaddsubpd-1.c: Likewise. * gcc.target/i386/avx-vaddsubpd-256-1.c: Likewise. * gcc.target/i386/avx-vaddsubps-1.c: Likewise. * gcc.target/i386/avx-vaddsubps-256-1.c: Likewise. * gcc.target/i386/avx-vaesdec-1.c: Likewise. * gcc.target/i386/avx-vaesdeclast-1.c: Likewise. * gcc.target/i386/avx-vaesenc-1.c: Likewise. * gcc.target/i386/avx-vaesenclast-1.c: Likewise. * gcc.target/i386/avx-vaesimc-1.c: Likewise. * gcc.target/i386/avx-vaeskeygenassist-1.c: Likewise. * gcc.target/i386/avx-vandnpd-1.c: Likewise. * gcc.target/i386/avx-vandnpd-256-1.c: Likewise. * gcc.target/i386/avx-vandnps-1.c: Likewise. * gcc.target/i386/avx-vandnps-256-1.c: Likewise. * gcc.target/i386/avx-vandpd-1.c: Likewise. * gcc.target/i386/avx-vandpd-256-1.c: Likewise. * gcc.target/i386/avx-vandps-1.c: Likewise. * gcc.target/i386/avx-vandps-256-1.c: Likewise. * gcc.target/i386/avx-vblendpd-1.c: Likewise. * gcc.target/i386/avx-vblendpd-256-1.c: Likewise. * gcc.target/i386/avx-vblendps-256-1.c: Likewise. * gcc.target/i386/avx-vblendvpd-256-1.c: Likewise. * gcc.target/i386/avx-vblendvps-256-1.c: Likewise. * gcc.target/i386/avx-vbroadcastf128-256-1.c: Likewise. * gcc.target/i386/avx-vbroadcastf128-256-2.c: Likewise. * gcc.target/i386/avx-vbroadcastsd-1.c: Likewise. * gcc.target/i386/avx-vbroadcastss-1.c: Likewise. * gcc.target/i386/avx-vbroadcastss-2.c: Likewise. * gcc.target/i386/avx-vcmppd-1.c: Likewise. * gcc.target/i386/avx-vcmppd-256-1.c: Likewise. * gcc.target/i386/avx-vcmpps-1.c: Likewise. * gcc.target/i386/avx-vcmpps-256-1.c: Likewise. * gcc.target/i386/avx-vcmpsd-1.c: Likewise. * gcc.target/i386/avx-vcmpss-1.c: Likewise. * gcc.target/i386/avx-vcomisd-1.c: Likewise. * gcc.target/i386/avx-vcomisd-2.c: Likewise. * gcc.target/i386/avx-vcomisd-3.c: Likewise. * gcc.target/i386/avx-vcomisd-4.c: Likewise. * gcc.target/i386/avx-vcomisd-5.c: Likewise. * gcc.target/i386/avx-vcomisd-6.c: Likewise. * gcc.target/i386/avx-vcomiss-1.c: Likewise. * gcc.target/i386/avx-vcomiss-2.c: Likewise. * gcc.target/i386/avx-vcomiss-3.c: Likewise. * gcc.target/i386/avx-vcomiss-4.c: Likewise. * gcc.target/i386/avx-vcomiss-5.c: Likewise. * gcc.target/i386/avx-vcomiss-6.c: Likewise. * gcc.target/i386/avx-vcvtdq2pd-1.c: Likewise. * gcc.target/i386/avx-vcvtdq2pd-256-1.c: Likewise. * gcc.target/i386/avx-vcvtdq2ps-1.c: Likewise. * gcc.target/i386/avx-vcvtpd2dq-1.c: Likewise. * gcc.target/i386/avx-vcvtpd2dq-256-1.c: Likewise. * gcc.target/i386/avx-vcvtpd2ps-1.c: Likewise. * gcc.target/i386/avx-vcvtpd2ps-256-1.c: Likewise. * gcc.target/i386/avx-vcvtps2dq-1.c: Likewise. * gcc.target/i386/avx-vcvtps2dq-256-1.c: Likewise. * gcc.target/i386/avx-vcvtps2pd-1.c: Likewise. * gcc.target/i386/avx-vcvtps2pd-256-1.c: Likewise. * gcc.target/i386/avx-vcvtsd2si-1.c: Likewise. * gcc.target/i386/avx-vcvtsd2si-2.c: Likewise. * gcc.target/i386/avx-vcvtsd2ss-1.c: Likewise. * gcc.target/i386/avx-vcvtsi2sd-1.c: Likewise. * gcc.target/i386/avx-vcvtsi2sd-2.c: Likewise. * gcc.target/i386/avx-vcvtsi2ss-1.c: Likewise. * gcc.target/i386/avx-vcvtsi2ss-2.c: Likewise. * gcc.target/i386/avx-vcvtss2sd-1.c: Likewise. * gcc.target/i386/avx-vcvtss2si-1.c: Likewise. * gcc.target/i386/avx-vcvtss2si-2.c: Likewise. * gcc.target/i386/avx-vcvttpd2dq-1.c: Likewise. * gcc.target/i386/avx-vcvttpd2dq-256-1.c: Likewise. * gcc.target/i386/avx-vcvttps2dq-1.c: Likewise. * gcc.target/i386/avx-vcvttps2dq-256-1.c: Likewise. * gcc.target/i386/avx-vcvttsd2si-1.c: Likewise. * gcc.target/i386/avx-vcvttsd2si-2.c: Likewise. * gcc.target/i386/avx-vcvttss2si-1.c: Likewise. * gcc.target/i386/avx-vcvttss2si-2.c: Likewise. * gcc.target/i386/avx-vdivpd-1.c: Likewise. * gcc.target/i386/avx-vdivpd-256-1.c: Likewise. * gcc.target/i386/avx-vdivps-1.c: Likewise. * gcc.target/i386/avx-vdivps-256-1.c: Likewise. * gcc.target/i386/avx-vdivsd-1.c: Likewise. * gcc.target/i386/avx-vdivss-1.c: Likewise. * gcc.target/i386/avx-vdppd-1.c: Likewise. * gcc.target/i386/avx-vdppd-2.c: Likewise. * gcc.target/i386/avx-vdpps-1.c: Likewise. * gcc.target/i386/avx-vdpps-2.c: Likewise. * gcc.target/i386/avx-vextractf128-256-1.c: Likewise. * gcc.target/i386/avx-vextractf128-256-2.c: Likewise. * gcc.target/i386/avx-vextractps-1.c: Likewise. * gcc.target/i386/avx-vhaddpd-1.c: Likewise. * gcc.target/i386/avx-vhaddpd-256-1.c: Likewise. * gcc.target/i386/avx-vhaddps-1.c: Likewise. * gcc.target/i386/avx-vhaddps-256-1.c: Likewise. * gcc.target/i386/avx-vhsubpd-1.c: Likewise. * gcc.target/i386/avx-vhsubpd-256-1.c: Likewise. * gcc.target/i386/avx-vhsubps-1.c: Likewise. * gcc.target/i386/avx-vhsubps-256-1.c: Likewise. * gcc.target/i386/avx-vinsertf128-256-1.c: Likewise. * gcc.target/i386/avx-vinsertf128-256-2.c: Likewise. * gcc.target/i386/avx-vinsertf128-256-3.c: Likewise. * gcc.target/i386/avx-vinsertps-1.c: Likewise. * gcc.target/i386/avx-vinsertps-2.c: Likewise. * gcc.target/i386/avx-vlddqu-1.c: Likewise. * gcc.target/i386/avx-vlddqu-256-1.c: Likewise. * gcc.target/i386/avx-vmaskmovpd-256-1.c: Likewise. * gcc.target/i386/avx-vmaskmovpd-256-2.c: Likewise. * gcc.target/i386/avx-vmaskmovps-256-1.c: Likewise. * gcc.target/i386/avx-vmaskmovps-256-2.c: Likewise. * gcc.target/i386/avx-vmaxpd-1.c: Likewise. * gcc.target/i386/avx-vmaxpd-256-1.c: Likewise. * gcc.target/i386/avx-vmaxps-1.c: Likewise. * gcc.target/i386/avx-vmaxps-256-1.c: Likewise. * gcc.target/i386/avx-vmaxsd-1.c: Likewise. * gcc.target/i386/avx-vmaxss-1.c: Likewise. * gcc.target/i386/avx-vminpd-1.c: Likewise. * gcc.target/i386/avx-vminpd-256-1.c: Likewise. * gcc.target/i386/avx-vminps-1.c: Likewise. * gcc.target/i386/avx-vminps-256-1.c: Likewise. * gcc.target/i386/avx-vminsd-1.c: Likewise. * gcc.target/i386/avx-vminss-1.c: Likewise. * gcc.target/i386/avx-vmovapd-1.c: Likewise. * gcc.target/i386/avx-vmovapd-256-1.c: Likewise. * gcc.target/i386/avx-vmovapd-256-2.c: Likewise. * gcc.target/i386/avx-vmovapd-2.c: Likewise. * gcc.target/i386/avx-vmovaps-1.c: Likewise. * gcc.target/i386/avx-vmovaps-256-1.c: Likewise. * gcc.target/i386/avx-vmovaps-256-2.c: Likewise. * gcc.target/i386/avx-vmovaps-2.c: Likewise. * gcc.target/i386/avx-vmovd-1.c: Likewise. * gcc.target/i386/avx-vmovd-2.c: Likewise. * gcc.target/i386/avx-vmovddup-1.c: Likewise. * gcc.target/i386/avx-vmovddup-256-1.c: Likewise. * gcc.target/i386/avx-vmovdqa-1.c: Likewise. * gcc.target/i386/avx-vmovdqa-256-1.c: Likewise. * gcc.target/i386/avx-vmovdqa-256-2.c: Likewise. * gcc.target/i386/avx-vmovdqa-2.c: Likewise. * gcc.target/i386/avx-vmovdqu-1.c: Likewise. * gcc.target/i386/avx-vmovdqu-256-1.c: Likewise. * gcc.target/i386/avx-vmovdqu-256-2.c: Likewise. * gcc.target/i386/avx-vmovdqu-2.c: Likewise. * gcc.target/i386/avx-vmovhlps-1.c: Likewise. * gcc.target/i386/avx-vmovhpd-1.c: Likewise. * gcc.target/i386/avx-vmovhpd-2.c: Likewise. * gcc.target/i386/avx-vmovhps-1.c: Likewise. * gcc.target/i386/avx-vmovhps-2.c: Likewise. * gcc.target/i386/avx-vmovlhps-1.c: Likewise. * gcc.target/i386/avx-vmovlpd-1.c: Likewise. * gcc.target/i386/avx-vmovlpd-2.c: Likewise. * gcc.target/i386/avx-vmovmskpd-1.c: Likewise. * gcc.target/i386/avx-vmovmskpd-256-1.c: Likewise. * gcc.target/i386/avx-vmovmskps-1.c: Likewise. * gcc.target/i386/avx-vmovmskps-256-1.c: Likewise. * gcc.target/i386/avx-vmovntdq-1.c: Likewise. * gcc.target/i386/avx-vmovntdqa-1.c: Likewise. * gcc.target/i386/avx-vmovntpd-1.c: Likewise. * gcc.target/i386/avx-vmovntps-1.c: Likewise. * gcc.target/i386/avx-vmovq-1.c: Likewise. * gcc.target/i386/avx-vmovq-2.c: Likewise. * gcc.target/i386/avx-vmovq-3.c: Likewise. * gcc.target/i386/avx-vmovsd-1.c: Likewise. * gcc.target/i386/avx-vmovsd-2.c: Likewise. * gcc.target/i386/avx-vmovshdup-1.c: Likewise. * gcc.target/i386/avx-vmovshdup-256-1.c: Likewise. * gcc.target/i386/avx-vmovsldup-1.c: Likewise. * gcc.target/i386/avx-vmovsldup-256-1.c: Likewise. * gcc.target/i386/avx-vmovss-1.c: Likewise. * gcc.target/i386/avx-vmovss-2.c: Likewise. * gcc.target/i386/avx-vmovss-3.c: Likewise. * gcc.target/i386/avx-vmovupd-1.c: Likewise. * gcc.target/i386/avx-vmovupd-256-1.c: Likewise. * gcc.target/i386/avx-vmovupd-256-2.c: Likewise. * gcc.target/i386/avx-vmovupd-2.c: Likewise. * gcc.target/i386/avx-vmovups-1.c: Likewise. * gcc.target/i386/avx-vmovups-256-1.c: Likewise. * gcc.target/i386/avx-vmovups-256-2.c: Likewise. * gcc.target/i386/avx-vmovups-2.c: Likewise. * gcc.target/i386/avx-vmpsadbw-1.c: Likewise. * gcc.target/i386/avx-vmulpd-1.c: Likewise. * gcc.target/i386/avx-vmulpd-256-1.c: Likewise. * gcc.target/i386/avx-vmulps-1.c: Likewise. * gcc.target/i386/avx-vmulps-256-1.c: Likewise. * gcc.target/i386/avx-vmulsd-1.c: Likewise. * gcc.target/i386/avx-vmulss-1.c: Likewise. * gcc.target/i386/avx-vorpd-1.c: Likewise. * gcc.target/i386/avx-vorpd-256-1.c: Likewise. * gcc.target/i386/avx-vorps-1.c: Likewise. * gcc.target/i386/avx-vorps-256-1.c: Likewise. * gcc.target/i386/avx-vpabsb-1.c: Likewise. * gcc.target/i386/avx-vpabsd-1.c: Likewise. * gcc.target/i386/avx-vpabsw-1.c: Likewise. * gcc.target/i386/avx-vpackssdw-1.c: Likewise. * gcc.target/i386/avx-vpacksswb-1.c: Likewise. * gcc.target/i386/avx-vpackusdw-1.c: Likewise. * gcc.target/i386/avx-vpackuswb-1.c: Likewise. * gcc.target/i386/avx-vpaddb-1.c: Likewise. * gcc.target/i386/avx-vpaddd-1.c: Likewise. * gcc.target/i386/avx-vpaddq-1.c: Likewise. * gcc.target/i386/avx-vpaddsb-1.c: Likewise. * gcc.target/i386/avx-vpaddsw-1.c: Likewise. * gcc.target/i386/avx-vpaddusb-1.c: Likewise. * gcc.target/i386/avx-vpaddusw-1.c: Likewise. * gcc.target/i386/avx-vpaddw-1.c: Likewise. * gcc.target/i386/avx-vpalignr-1.c: Likewise. * gcc.target/i386/avx-vpand-1.c: Likewise. * gcc.target/i386/avx-vpandn-1.c: Likewise. * gcc.target/i386/avx-vpavgb-1.c: Likewise. * gcc.target/i386/avx-vpavgw-1.c: Likewise. * gcc.target/i386/avx-vpblendvb-1.c: Likewise. * gcc.target/i386/avx-vpblendw-1.c: Likewise. * gcc.target/i386/avx-vpcmpeqb-1.c: Likewise. * gcc.target/i386/avx-vpcmpeqd-1.c: Likewise. * gcc.target/i386/avx-vpcmpeqq-1.c: Likewise. * gcc.target/i386/avx-vpcmpeqw-1.c: Likewise. * gcc.target/i386/avx-vpcmpestri-1.c: Likewise. * gcc.target/i386/avx-vpcmpestri-2.c: Likewise. * gcc.target/i386/avx-vpcmpestrm-1.c: Likewise. * gcc.target/i386/avx-vpcmpestrm-2.c: Likewise. * gcc.target/i386/avx-vpcmpgtb-1.c: Likewise. * gcc.target/i386/avx-vpcmpgtd-1.c: Likewise. * gcc.target/i386/avx-vpcmpgtq-1.c: Likewise. * gcc.target/i386/avx-vpcmpgtw-1.c: Likewise. * gcc.target/i386/avx-vpcmpistri-1.c: Likewise. * gcc.target/i386/avx-vpcmpistri-2.c: Likewise. * gcc.target/i386/avx-vpcmpistrm-1.c: Likewise. * gcc.target/i386/avx-vpcmpistrm-2.c: Likewise. * gcc.target/i386/avx-vperm2f128-256-1.c: Likewise. * gcc.target/i386/avx-vperm2f128-256-2.c: Likewise. * gcc.target/i386/avx-vperm2f128-256-3.c: Likewise. * gcc.target/i386/avx-vpermil2pd-1.c: Likewise. * gcc.target/i386/avx-vpermil2pd-256-1.c: Likewise. * gcc.target/i386/avx-vpermil2ps-1.c: Likewise. * gcc.target/i386/avx-vpermil2ps-256-1.c: Likewise. * gcc.target/i386/avx-vpermilpd-1.c: Likewise. * gcc.target/i386/avx-vpermilpd-256-1.c: Likewise. * gcc.target/i386/avx-vpermilpd-256-2.c: Likewise. * gcc.target/i386/avx-vpermilpd-2.c: Likewise. * gcc.target/i386/avx-vpermilps-1.c: Likewise. * gcc.target/i386/avx-vpermilps-256-1.c: Likewise. * gcc.target/i386/avx-vpermilps-256-2.c: Likewise. * gcc.target/i386/avx-vpermilps-2.c: Likewise. * gcc.target/i386/avx-vpextrb-1.c: Likewise. * gcc.target/i386/avx-vpextrd-1.c: Likewise. * gcc.target/i386/avx-vpextrq-1.c: Likewise. * gcc.target/i386/avx-vpextrw-1.c: Likewise. * gcc.target/i386/avx-vphaddd-1.c: Likewise. * gcc.target/i386/avx-vphaddsw-1.c: Likewise. * gcc.target/i386/avx-vphaddw-1.c: Likewise. * gcc.target/i386/avx-vphminposuw-1.c: Likewise. * gcc.target/i386/avx-vphsubd-1.c: Likewise. * gcc.target/i386/avx-vphsubsw-1.c: Likewise. * gcc.target/i386/avx-vphsubw-1.c: Likewise. * gcc.target/i386/avx-vpinsrb-1.c: Likewise. * gcc.target/i386/avx-vpinsrd-1.c: Likewise. * gcc.target/i386/avx-vpinsrq-1.c: Likewise. * gcc.target/i386/avx-vpmaddubsw-1.c: Likewise. * gcc.target/i386/avx-vpmaxsb-1.c: Likewise. * gcc.target/i386/avx-vpmaxsd-1.c: Likewise. * gcc.target/i386/avx-vpmaxsw-1.c: Likewise. * gcc.target/i386/avx-vpmaxub-1.c: Likewise. * gcc.target/i386/avx-vpmaxud-1.c: Likewise. * gcc.target/i386/avx-vpmaxuw-1.c: Likewise. * gcc.target/i386/avx-vpminsb-1.c: Likewise. * gcc.target/i386/avx-vpminsd-1.c: Likewise. * gcc.target/i386/avx-vpminsw-1.c: Likewise. * gcc.target/i386/avx-vpminub-1.c: Likewise. * gcc.target/i386/avx-vpminud-1.c: Likewise. * gcc.target/i386/avx-vpminuw-1.c: Likewise. * gcc.target/i386/avx-vpmovmskb-1.c: Likewise. * gcc.target/i386/avx-vpmovsxbd-1.c: Likewise. * gcc.target/i386/avx-vpmovsxbq-1.c: Likewise. * gcc.target/i386/avx-vpmovsxbw-1.c: Likewise. * gcc.target/i386/avx-vpmovsxdq-1.c: Likewise. * gcc.target/i386/avx-vpmovsxwd-1.c: Likewise. * gcc.target/i386/avx-vpmovsxwq-1.c: Likewise. * gcc.target/i386/avx-vpmovzxbd-1.c: Likewise. * gcc.target/i386/avx-vpmovzxbq-1.c: Likewise. * gcc.target/i386/avx-vpmovzxbw-1.c: Likewise. * gcc.target/i386/avx-vpmovzxdq-1.c: Likewise. * gcc.target/i386/avx-vpmovzxwd-1.c: Likewise. * gcc.target/i386/avx-vpmovzxwq-1.c: Likewise. * gcc.target/i386/avx-vpmuldq-1.c: Likewise. * gcc.target/i386/avx-vpmulhrsw-1.c: Likewise. * gcc.target/i386/avx-vpmulhuw-1.c: Likewise. * gcc.target/i386/avx-vpmulhw-1.c: Likewise. * gcc.target/i386/avx-vpmulld-1.c: Likewise. * gcc.target/i386/avx-vpmullw-1.c: Likewise. * gcc.target/i386/avx-vpmuludq-1.c: Likewise. * gcc.target/i386/avx-vpor-1.c: Likewise. * gcc.target/i386/avx-vpsadbw-1.c: Likewise. * gcc.target/i386/avx-vpshufb-1.c: Likewise. * gcc.target/i386/avx-vpshufd-1.c: Likewise. * gcc.target/i386/avx-vpshufhw-1.c: Likewise. * gcc.target/i386/avx-vpshuflw-1.c: Likewise. * gcc.target/i386/avx-vpsignb-1.c: Likewise. * gcc.target/i386/avx-vpsignd-1.c: Likewise. * gcc.target/i386/avx-vpsignw-1.c: Likewise. * gcc.target/i386/avx-vpslld-1.c: Likewise. * gcc.target/i386/avx-vpslld-2.c: Likewise. * gcc.target/i386/avx-vpslldq-1.c: Likewise. * gcc.target/i386/avx-vpsllq-1.c: Likewise. * gcc.target/i386/avx-vpsllq-2.c: Likewise. * gcc.target/i386/avx-vpsllw-1.c: Likewise. * gcc.target/i386/avx-vpsllw-2.c: Likewise. * gcc.target/i386/avx-vpsrad-1.c: Likewise. * gcc.target/i386/avx-vpsrad-2.c: Likewise. * gcc.target/i386/avx-vpsraw-1.c: Likewise. * gcc.target/i386/avx-vpsraw-2.c: Likewise. * gcc.target/i386/avx-vpsrld-1.c: Likewise. * gcc.target/i386/avx-vpsrld-2.c: Likewise. * gcc.target/i386/avx-vpsrldq-1.c: Likewise. * gcc.target/i386/avx-vpsrlq-1.c: Likewise. * gcc.target/i386/avx-vpsrlq-2.c: Likewise. * gcc.target/i386/avx-vpsrlw-1.c: Likewise. * gcc.target/i386/avx-vpsrlw-2.c: Likewise. * gcc.target/i386/avx-vpsubb-1.c: Likewise. * gcc.target/i386/avx-vpsubd-1.c: Likewise. * gcc.target/i386/avx-vpsubq-1.c: Likewise. * gcc.target/i386/avx-vpsubsb-1.c: Likewise. * gcc.target/i386/avx-vpsubsw-1.c: Likewise. * gcc.target/i386/avx-vpsubw-1.c: Likewise. * gcc.target/i386/avx-vptest-1.c: Likewise. * gcc.target/i386/avx-vptest-256-1.c: Likewise. * gcc.target/i386/avx-vptest-256-2.c: Likewise. * gcc.target/i386/avx-vptest-256-3.c: Likewise. * gcc.target/i386/avx-vptest-2.c: Likewise. * gcc.target/i386/avx-vptest-3.c: Likewise. * gcc.target/i386/avx-vpunpckhbw-1.c: Likewise. * gcc.target/i386/avx-vpunpckhdq-1.c: Likewise. * gcc.target/i386/avx-vpunpckhqdq-1.c: Likewise. * gcc.target/i386/avx-vpunpckhwd-1.c: Likewise. * gcc.target/i386/avx-vpunpcklbw-1.c: Likewise. * gcc.target/i386/avx-vpunpckldq-1.c: Likewise. * gcc.target/i386/avx-vpunpcklqdq-1.c: Likewise. * gcc.target/i386/avx-vpunpcklwd-1.c: Likewise. * gcc.target/i386/avx-vpxor-1.c: Likewise. * gcc.target/i386/avx-vrcpps-1.c: Likewise. * gcc.target/i386/avx-vrcpps-256-1.c: Likewise. * gcc.target/i386/avx-vroundpd-1.c: Likewise. * gcc.target/i386/avx-vroundpd-256-1.c: Likewise. * gcc.target/i386/avx-vroundpd-256-2.c: Likewise. * gcc.target/i386/avx-vroundpd-256-3.c: Likewise. * gcc.target/i386/avx-vroundpd-2.c: Likewise. * gcc.target/i386/avx-vroundpd-3.c: Likewise. * gcc.target/i386/avx-vroundps-256-1.c: Likewise. * gcc.target/i386/avx-vrsqrtps-1.c: Likewise. * gcc.target/i386/avx-vrsqrtps-256-1.c: Likewise. * gcc.target/i386/avx-vshufpd-1.c: Likewise. * gcc.target/i386/avx-vshufpd-256-1.c: Likewise. * gcc.target/i386/avx-vshufps-1.c: Likewise. * gcc.target/i386/avx-vshufps-256-1.c: Likewise. * gcc.target/i386/avx-vsqrtpd-1.c: Likewise. * gcc.target/i386/avx-vsqrtpd-256-1.c: Likewise. * gcc.target/i386/avx-vsqrtps-1.c: Likewise. * gcc.target/i386/avx-vsqrtps-256-1.c: Likewise. * gcc.target/i386/avx-vsubpd-1.c: Likewise. * gcc.target/i386/avx-vsubpd-256-1.c: Likewise. * gcc.target/i386/avx-vsubps-1.c: Likewise. * gcc.target/i386/avx-vsubps-256-1.c: Likewise. * gcc.target/i386/avx-vsubsd-1.c: Likewise. * gcc.target/i386/avx-vsubss-1.c: Likewise. * gcc.target/i386/avx-vtestpd-1.c: Likewise. * gcc.target/i386/avx-vtestpd-256-1.c: Likewise. * gcc.target/i386/avx-vtestpd-256-2.c: Likewise. * gcc.target/i386/avx-vtestpd-256-3.c: Likewise. * gcc.target/i386/avx-vtestpd-2.c: Likewise. * gcc.target/i386/avx-vtestpd-3.c: Likewise. * gcc.target/i386/avx-vtestps-1.c: Likewise. * gcc.target/i386/avx-vtestps-256-1.c: Likewise. * gcc.target/i386/avx-vtestps-256-2.c: Likewise. * gcc.target/i386/avx-vtestps-256-3.c: Likewise. * gcc.target/i386/avx-vtestps-2.c: Likewise. * gcc.target/i386/avx-vtestps-3.c: Likewise. * gcc.target/i386/avx-vucomisd-1.c: Likewise. * gcc.target/i386/avx-vucomisd-2.c: Likewise. * gcc.target/i386/avx-vucomisd-3.c: Likewise. * gcc.target/i386/avx-vucomisd-4.c: Likewise. * gcc.target/i386/avx-vucomisd-5.c: Likewise. * gcc.target/i386/avx-vucomisd-6.c: Likewise. * gcc.target/i386/avx-vucomiss-1.c: Likewise. * gcc.target/i386/avx-vucomiss-2.c: Likewise. * gcc.target/i386/avx-vucomiss-3.c: Likewise. * gcc.target/i386/avx-vucomiss-4.c: Likewise. * gcc.target/i386/avx-vucomiss-5.c: Likewise. * gcc.target/i386/avx-vucomiss-6.c: Likewise. * gcc.target/i386/avx-vunpckhpd-1.c: Likewise. * gcc.target/i386/avx-vunpckhpd-256-1.c: Likewise. * gcc.target/i386/avx-vunpckhps-1.c: Likewise. * gcc.target/i386/avx-vunpckhps-256-1.c: Likewise. * gcc.target/i386/avx-vunpcklpd-1.c: Likewise. * gcc.target/i386/avx-vunpcklpd-256-1.c: Likewise. * gcc.target/i386/avx-vunpcklps-1.c: Likewise. * gcc.target/i386/avx-vunpcklps-256-1.c: Likewise. * gcc.target/i386/avx-vxorpd-1.c: Likewise. * gcc.target/i386/avx-vxorpd-256-1.c: Likewise. * gcc.target/i386/avx-vxorps-1.c: Likewise. * gcc.target/i386/avx-vxorps-256-1.c: Likewise. * gcc.target/i386/avx-vzeroall-1.c: Likewise. * gcc.target/i386/avx-vzeroall-2.c: Likewise. * gcc.target/i386/avx-vzeroupper-1.c: Likewise. * gcc.target/i386/avx-vzeroupper-2.c: Likewise. * gcc.target/i386/m256-1.c: Likewise. * gcc.target/i386/m256-2.c: Likewise. * gcc.target/i386/m256-check.h: Likewise. * gcc.target/i386/sse2-addpd-1.c: Likewise. * gcc.target/i386/sse2-addsd-1.c: Likewise. * gcc.target/i386/sse2-andnpd-1.c: Likewise. * gcc.target/i386/sse2-andpd-1.c: Likewise. * gcc.target/i386/sse2-comisd-1.c: Likewise. * gcc.target/i386/sse2-comisd-2.c: Likewise. * gcc.target/i386/sse2-comisd-3.c: Likewise. * gcc.target/i386/sse2-comisd-4.c: Likewise. * gcc.target/i386/sse2-comisd-5.c: Likewise. * gcc.target/i386/sse2-comisd-6.c: Likewise. * gcc.target/i386/sse2-cvtdq2pd-1.c: Likewise. * gcc.target/i386/sse2-cvtdq2ps-1.c: Likewise. * gcc.target/i386/sse2-cvtpd2dq-1.c: Likewise. * gcc.target/i386/sse2-cvtpd2ps-1.c: Likewise. * gcc.target/i386/sse2-cvtps2dq-1.c: Likewise. * gcc.target/i386/sse2-cvtps2pd-1.c: Likewise. * gcc.target/i386/sse2-cvtsd2si-1.c: Likewise. * gcc.target/i386/sse2-cvtsd2si-2.c: Likewise. * gcc.target/i386/sse2-cvtsd2ss-1.c: Likewise. * gcc.target/i386/sse2-cvtsi2sd-1.c: Likewise. * gcc.target/i386/sse2-cvtsi2sd-2.c: Likewise. * gcc.target/i386/sse2-cvtss2sd-1.c: Likewise. * gcc.target/i386/sse2-cvttpd2dq-1.c: Likewise. * gcc.target/i386/sse2-cvttps2dq-1.c: Likewise. * gcc.target/i386/sse2-cvttsd2si-1.c: Likewise. * gcc.target/i386/sse2-cvttsd2si-2.c: Likewise. * gcc.target/i386/sse2-divpd-1.c: Likewise. * gcc.target/i386/sse2-divsd-1.c: Likewise. * gcc.target/i386/sse2-maxpd-1.c: Likewise. * gcc.target/i386/sse2-maxsd-1.c: Likewise. * gcc.target/i386/sse2-minpd-1.c: Likewise. * gcc.target/i386/sse2-minsd-1.c: Likewise. * gcc.target/i386/sse2-movapd-1.c: Likewise. * gcc.target/i386/sse2-movapd-2.c: Likewise. * gcc.target/i386/sse2-movd-1.c: Likewise. * gcc.target/i386/sse2-movd-2.c: Likewise. * gcc.target/i386/sse2-movdqa-1.c: Likewise. * gcc.target/i386/sse2-movdqa-2.c: Likewise. * gcc.target/i386/sse2-movdqu-1.c: Likewise. * gcc.target/i386/sse2-movdqu-2.c: Likewise. * gcc.target/i386/sse2-movhpd-1.c: Likewise. * gcc.target/i386/sse2-movhpd-2.c: Likewise. * gcc.target/i386/sse2-movlpd-1.c: Likewise. * gcc.target/i386/sse2-movlpd-2.c: Likewise. * gcc.target/i386/sse2-movmskpd-1.c: Likewise. * gcc.target/i386/sse2-movntdq-1.c: Likewise. * gcc.target/i386/sse2-movntpd-1.c: Likewise. * gcc.target/i386/sse2-movq-1.c: Likewise. * gcc.target/i386/sse2-movq-2.c: Likewise. * gcc.target/i386/sse2-movq-3.c: Likewise. * gcc.target/i386/sse2-movsd-1.c: Likewise. * gcc.target/i386/sse2-movsd-2.c: Likewise. * gcc.target/i386/sse2-movupd-1.c: Likewise. * gcc.target/i386/sse2-movupd-2.c: Likewise. * gcc.target/i386/sse2-mulpd-1.c: Likewise. * gcc.target/i386/sse2-mulsd-1.c: Likewise. * gcc.target/i386/sse2-orpd-1.c: Likewise. * gcc.target/i386/sse2-packssdw-1.c: Likewise. * gcc.target/i386/sse2-packsswb-1.c: Likewise. * gcc.target/i386/sse2-packuswb-1.c: Likewise. * gcc.target/i386/sse2-paddb-1.c: Likewise. * gcc.target/i386/sse2-paddd-1.c: Likewise. * gcc.target/i386/sse2-paddq-1.c: Likewise. * gcc.target/i386/sse2-paddsb-1.c: Likewise. * gcc.target/i386/sse2-paddsw-1.c: Likewise. * gcc.target/i386/sse2-paddusb-1.c: Likewise. * gcc.target/i386/sse2-paddusw-1.c: Likewise. * gcc.target/i386/sse2-paddw-1.c: Likewise. * gcc.target/i386/sse2-pand-1.c: Likewise. * gcc.target/i386/sse2-pandn-1.c: Likewise. * gcc.target/i386/sse2-pavgb-1.c: Likewise. * gcc.target/i386/sse2-pavgw-1.c: Likewise. * gcc.target/i386/sse2-pcmpeqb-1.c: Likewise. * gcc.target/i386/sse2-pcmpeqd-1.c: Likewise. * gcc.target/i386/sse2-pcmpeqw-1.c: Likewise. * gcc.target/i386/sse2-pcmpgtb-1.c: Likewise. * gcc.target/i386/sse2-pcmpgtd-1.c: Likewise. * gcc.target/i386/sse2-pcmpgtw-1.c: Likewise. * gcc.target/i386/sse2-pmaddwd-1.c: Likewise. * gcc.target/i386/sse2-pmaxsw-1.c: Likewise. * gcc.target/i386/sse2-pmaxub-1.c: Likewise. * gcc.target/i386/sse2-pminsw-1.c: Likewise. * gcc.target/i386/sse2-pminub-1.c: Likewise. * gcc.target/i386/sse2-pmovmskb-1.c: Likewise. * gcc.target/i386/sse2-pmulhuw-1.c: Likewise. * gcc.target/i386/sse2-pmulhw-1.c: Likewise. * gcc.target/i386/sse2-pmullw-1.c: Likewise. * gcc.target/i386/sse2-pmuludq-1.c: Likewise. * gcc.target/i386/sse2-por-1.c: Likewise. * gcc.target/i386/sse2-psadbw-1.c: Likewise. * gcc.target/i386/sse2-pshufd-1.c: Likewise. * gcc.target/i386/sse2-pshufhw-1.c: Likewise. * gcc.target/i386/sse2-pshuflw-1.c: Likewise. * gcc.target/i386/sse2-pslld-1.c: Likewise. * gcc.target/i386/sse2-pslld-2.c: Likewise. * gcc.target/i386/sse2-pslldq-1.c: Likewise. * gcc.target/i386/sse2-psllq-1.c: Likewise. * gcc.target/i386/sse2-psllq-2.c: Likewise. * gcc.target/i386/sse2-psllw-1.c: Likewise. * gcc.target/i386/sse2-psllw-2.c: Likewise. * gcc.target/i386/sse2-psrad-1.c: Likewise. * gcc.target/i386/sse2-psrad-2.c: Likewise. * gcc.target/i386/sse2-psraw-1.c: Likewise. * gcc.target/i386/sse2-psraw-2.c: Likewise. * gcc.target/i386/sse2-psrld-1.c: Likewise. * gcc.target/i386/sse2-psrld-2.c: Likewise. * gcc.target/i386/sse2-psrldq-1.c: Likewise. * gcc.target/i386/sse2-psrlq-1.c: Likewise. * gcc.target/i386/sse2-psrlq-2.c: Likewise. * gcc.target/i386/sse2-psrlw-1.c: Likewise. * gcc.target/i386/sse2-psrlw-2.c: Likewise. * gcc.target/i386/sse2-psubb-1.c: Likewise. * gcc.target/i386/sse2-psubd-1.c: Likewise. * gcc.target/i386/sse2-psubq-1.c: Likewise. * gcc.target/i386/sse2-psubsb-1.c: Likewise. * gcc.target/i386/sse2-psubsw-1.c: Likewise. * gcc.target/i386/sse2-psubw-1.c: Likewise. * gcc.target/i386/sse2-punpckhbw-1.c: Likewise. * gcc.target/i386/sse2-punpckhdq-1.c: Likewise. * gcc.target/i386/sse2-punpckhqdq-1.c: Likewise. * gcc.target/i386/sse2-punpckhwd-1.c: Likewise. * gcc.target/i386/sse2-punpcklbw-1.c: Likewise. * gcc.target/i386/sse2-punpckldq-1.c: Likewise. * gcc.target/i386/sse2-punpcklqdq-1.c: Likewise. * gcc.target/i386/sse2-punpcklwd-1.c: Likewise. * gcc.target/i386/sse2-pxor-1.c: Likewise. * gcc.target/i386/sse2-shufpd-1.c: Likewise. * gcc.target/i386/sse2-shufps-1.c: Likewise. * gcc.target/i386/sse2-sqrtpd-1.c: Likewise. * gcc.target/i386/sse2-subpd-1.c: Likewise. * gcc.target/i386/sse2-subsd-1.c: Likewise. * gcc.target/i386/sse2-ucomisd-1.c: Likewise. * gcc.target/i386/sse2-ucomisd-2.c: Likewise. * gcc.target/i386/sse2-ucomisd-3.c: Likewise. * gcc.target/i386/sse2-ucomisd-4.c: Likewise. * gcc.target/i386/sse2-ucomisd-5.c: Likewise. * gcc.target/i386/sse2-ucomisd-6.c: Likewise. * gcc.target/i386/sse2-unpckhpd-1.c: Likewise. * gcc.target/i386/sse2-unpcklpd-1.c: Likewise. * gcc.target/i386/sse2-xorpd-1.c: Likewise. * gcc.target/i386/sse-addps-1.c: Likewise. * gcc.target/i386/sse-addss-1.c: Likewise. * gcc.target/i386/sse-andnps-1.c: Likewise. * gcc.target/i386/sse-andps-1.c: Likewise. * gcc.target/i386/sse-comiss-1.c: Likewise. * gcc.target/i386/sse-comiss-2.c: Likewise. * gcc.target/i386/sse-comiss-3.c: Likewise. * gcc.target/i386/sse-comiss-4.c: Likewise. * gcc.target/i386/sse-comiss-5.c: Likewise. * gcc.target/i386/sse-comiss-6.c: Likewise. * gcc.target/i386/sse-cvtsi2ss-1.c: Likewise. * gcc.target/i386/sse-cvtsi2ss-2.c: Likewise. * gcc.target/i386/sse-cvtss2si-1.c: Likewise. * gcc.target/i386/sse-cvtss2si-2.c: Likewise. * gcc.target/i386/sse-cvttss2si-1.c: Likewise. * gcc.target/i386/sse-cvttss2si-2.c: Likewise. * gcc.target/i386/sse-divps-1.c: Likewise. * gcc.target/i386/sse-divss-1.c: Likewise. * gcc.target/i386/sse-maxps-1.c: Likewise. * gcc.target/i386/sse-maxss-1.c: Likewise. * gcc.target/i386/sse-minps-1.c: Likewise. * gcc.target/i386/sse-minss-1.c: Likewise. * gcc.target/i386/sse-movaps-1.c: Likewise. * gcc.target/i386/sse-movaps-2.c: Likewise. * gcc.target/i386/sse-movhlps-1.c: Likewise. * gcc.target/i386/sse-movhps-1.c: Likewise. * gcc.target/i386/sse-movhps-2.c: Likewise. * gcc.target/i386/sse-movlhps-1.c: Likewise. * gcc.target/i386/sse-movmskps-1.c: Likewise. * gcc.target/i386/sse-movntps-1.c: Likewise. * gcc.target/i386/sse-movss-1.c: Likewise. * gcc.target/i386/sse-movss-2.c: Likewise. * gcc.target/i386/sse-movss-3.c: Likewise. * gcc.target/i386/sse-movups-1.c: Likewise. * gcc.target/i386/sse-movups-2.c: Likewise. * gcc.target/i386/sse-mulps-1.c: Likewise. * gcc.target/i386/sse-mulss-1.c: Likewise. * gcc.target/i386/sse-orps-1.c: Likewise. * gcc.target/i386/sse-rcpps-1.c: Likewise. * gcc.target/i386/sse-rsqrtps-1.c: Likewise. * gcc.target/i386/sse-sqrtps-1.c: Likewise. * gcc.target/i386/sse-subps-1.c: Likewise. * gcc.target/i386/sse-subss-1.c: Likewise. * gcc.target/i386/sse-ucomiss-1.c: Likewise. * gcc.target/i386/sse-ucomiss-2.c: Likewise. * gcc.target/i386/sse-ucomiss-3.c: Likewise. * gcc.target/i386/sse-ucomiss-4.c: Likewise. * gcc.target/i386/sse-ucomiss-5.c: Likewise. * gcc.target/i386/sse-ucomiss-6.c: Likewise. * gcc.target/i386/sse-unpckhps-1.c: Likewise. * gcc.target/i386/sse-unpcklps-1.c: Likewise. * gcc.target/i386/sse-xorps-1.c: Likewise. * gcc.target/i386/vararg-10.c: Likewise. * gcc.target/i386/vararg-3.c: Likewise. * gcc.target/i386/vararg-4.c: Likewise. * gcc.target/i386/vararg-5.c: Likewise. * gcc.target/i386/vararg-6.c: Likewise. * gcc.target/i386/vararg-7.c: Likewise. * gcc.target/i386/vararg-8.c: Likewise. * gcc.target/i386/vararg-9.c: Likewise. * g++.dg/other/i386-5.C: Likewise. * g++.dg/other/i386-6.C: Likewise. * gcc.target/i386/aesdec.c (CHECK_H): New. (TEST): New. Include CHECK_H instead of "XXX-check.h" and run TEST instead of XXX_test. * gcc.target/i386/aesdeclast.c: Likewise. * gcc.target/i386/aesenc.c: Likewise. * gcc.target/i386/aesenclast.c: Likewise. * gcc.target/i386/aesimc.c: Likewise. * gcc.target/i386/aeskeygenassist.c: Likewise. * gcc.target/i386/sse3-addsubpd.c: Likewise. * gcc.target/i386/sse3-addsubps.c: Likewise. * gcc.target/i386/sse3-haddpd.c: Likewise. * gcc.target/i386/sse3-haddps.c: Likewise. * gcc.target/i386/sse3-hsubpd.c: Likewise. * gcc.target/i386/sse3-hsubps.c: Likewise. * gcc.target/i386/sse3-lddqu.c: Likewise. * gcc.target/i386/sse3-movddup.c: Likewise. * gcc.target/i386/sse3-movshdup.c: Likewise. * gcc.target/i386/sse3-movsldup.c: Likewise. * gcc.target/i386/sse4_1-blendpd.c: Likewise. * gcc.target/i386/sse4_1-blendps.c: Likewise. * gcc.target/i386/sse4_1-dppd-1.c: Likewise. * gcc.target/i386/sse4_1-dppd-2.c: Likewise. * gcc.target/i386/sse4_1-dpps-1.c: Likewise. * gcc.target/i386/sse4_1-dpps-2.c: Likewise. * gcc.target/i386/sse4_1-extractps.c: Likewise. * gcc.target/i386/sse4_1-insertps-1.c: Likewise. * gcc.target/i386/sse4_1-insertps-2.c: Likewise. * gcc.target/i386/sse4_1-movntdqa.c: Likewise. * gcc.target/i386/sse4_1-mpsadbw.c: Likewise. * gcc.target/i386/sse4_1-packusdw.c: Likewise. * gcc.target/i386/sse4_1-pblendvb.c: Likewise. * gcc.target/i386/sse4_1-pblendw.c: Likewise. * gcc.target/i386/sse4_1-pcmpeqq.c: Likewise. * gcc.target/i386/sse4_1-pextrb.c: Likewise. * gcc.target/i386/sse4_1-pextrd.c: Likewise. * gcc.target/i386/sse4_1-pextrq.c: Likewise. * gcc.target/i386/sse4_1-pextrw.c: Likewise. * gcc.target/i386/sse4_1-phminposuw.c: Likewise. * gcc.target/i386/sse4_1-pinsrb.c: Likewise. * gcc.target/i386/sse4_1-pinsrd.c: Likewise. * gcc.target/i386/sse4_1-pinsrq.c: Likewise. * gcc.target/i386/sse4_1-pmaxsb.c: Likewise. * gcc.target/i386/sse4_1-pmaxsd.c: Likewise. * gcc.target/i386/sse4_1-pmaxud.c: Likewise. * gcc.target/i386/sse4_1-pmaxuw.c: Likewise. * gcc.target/i386/sse4_1-pminsb.c: Likewise. * gcc.target/i386/sse4_1-pminsd.c: Likewise. * gcc.target/i386/sse4_1-pminud.c: Likewise. * gcc.target/i386/sse4_1-pminuw.c: Likewise. * gcc.target/i386/sse4_1-pmovsxbd.c: Likewise. * gcc.target/i386/sse4_1-pmovsxbq.c: Likewise. * gcc.target/i386/sse4_1-pmovsxbw.c: Likewise. * gcc.target/i386/sse4_1-pmovsxdq.c: Likewise. * gcc.target/i386/sse4_1-pmovsxwd.c: Likewise. * gcc.target/i386/sse4_1-pmovsxwq.c: Likewise. * gcc.target/i386/sse4_1-pmovzxbd.c: Likewise. * gcc.target/i386/sse4_1-pmovzxbq.c: Likewise. * gcc.target/i386/sse4_1-pmovzxbw.c: Likewise. * gcc.target/i386/sse4_1-pmovzxdq.c: Likewise. * gcc.target/i386/sse4_1-pmovzxwd.c: Likewise. * gcc.target/i386/sse4_1-pmovzxwq.c: Likewise. * gcc.target/i386/sse4_1-pmuldq.c: Likewise. * gcc.target/i386/sse4_1-pmulld.c: Likewise. * gcc.target/i386/sse4_1-ptest-1.c: Likewise. * gcc.target/i386/sse4_1-ptest-2.c: Likewise. * gcc.target/i386/sse4_1-ptest-3.c: Likewise. * gcc.target/i386/sse4_1-roundpd-1.c: Likewise. * gcc.target/i386/sse4_1-roundpd-2.c: Likewise. * gcc.target/i386/sse4_1-roundpd-3.c: Likewise. * gcc.target/i386/sse4_2-pcmpestri-1.c: Likewise. * gcc.target/i386/sse4_2-pcmpestri-2.c: Likewise. * gcc.target/i386/sse4_2-pcmpestrm-1.c: Likewise. * gcc.target/i386/sse4_2-pcmpestrm-2.c: Likewise. * gcc.target/i386/sse4_2-pcmpgtq.c: Likewise. * gcc.target/i386/sse4_2-pcmpistri-1.c: Likewise. * gcc.target/i386/sse4_2-pcmpistri-2.c: Likewise. * gcc.target/i386/sse4_2-pcmpistrm-1.c: Likewise. * gcc.target/i386/sse4_2-pcmpistrm-2.c: Likewise. * gcc.target/i386/ssse3-pabsb.c: Likewise. Don't run MMX tests for AVX. * gcc.target/i386/ssse3-pabsd.c: Likewise. * gcc.target/i386/ssse3-pabsw.c: Likewise. * gcc.target/i386/ssse3-palignr.c: Likewise. * gcc.target/i386/ssse3-phaddd.c: Likewise. * gcc.target/i386/ssse3-phaddsw.c: Likewise. * gcc.target/i386/ssse3-phaddw.c: Likewise. * gcc.target/i386/ssse3-phsubd.c: Likewise. * gcc.target/i386/ssse3-phsubsw.c: Likewise. * gcc.target/i386/ssse3-phsubw.c: Likewise. * gcc.target/i386/ssse3-pmaddubsw.c: Likewise. * gcc.target/i386/ssse3-pmulhrsw.c: Likewise. * gcc.target/i386/ssse3-pshufb.c: Likewise. * gcc.target/i386/ssse3-psignb.c: Likewise. * gcc.target/i386/ssse3-psignd.c: Likewise. * gcc.target/i386/ssse3-psignw.c: Likewise. * gcc.target/i386/i386.exp (check_effective_target_vaes): New. * gcc.target/i386/m128-check.h: Include . Include for SSE2. (union128i_b): Defined only for SSE2. (union128i_w): Likewise. (union128i_d): Likewise. (union128i_q): Likewise. (union128d): Likewise. (check_union128i_b): Likewise. (check_union128i_w): Likewise. (check_union128i_d): Likewise. (check_union128i_q): Likewise. (check_union128d): Likewise. (union128i_ub): New. (union128i_uw): Likewise. (check_union128i_ub): Likewise. (check_union128i_uw): Likewise. (ESP_FLOAT): Likewise. (ESP_DOUBLE): Likewise. (CHECK_ARRAY): Likewise. (checkVd): Likewise. (checkVf): Likewise. (ieee754_float): Likewise. (ieee754_double): Likewise. * gcc.target/i386/sse-check.h: Include "m128-check.h". * gcc.target/x86_64/abi/abi-x86_64.exp: Replace asm-support.s with asm-support.S. * gcc.target/x86_64/abi/asm-support.s: Renamed to ... * gcc.target/x86_64/abi/asm-support.S: This. Add ".sse_check none" if __AVX__ is defined. * lib/target-supports.exp (check_effective_target_avx): New. Co-Authored-By: H.J. Lu Co-Authored-By: Joey Ye From-SVN: r139730 --- gcc/testsuite/ChangeLog | 796 +++++++++++++++++++++ gcc/testsuite/g++.dg/other/i386-5.C | 9 + gcc/testsuite/g++.dg/other/i386-6.C | 11 + gcc/testsuite/gcc.dg/compat/vector-1b_main.c | 27 + gcc/testsuite/gcc.dg/compat/vector-1b_x.c | 3 + gcc/testsuite/gcc.dg/compat/vector-1b_y.c | 3 + gcc/testsuite/gcc.dg/compat/vector-2b_main.c | 27 + gcc/testsuite/gcc.dg/compat/vector-2b_x.c | 3 + gcc/testsuite/gcc.dg/compat/vector-2b_y.c | 3 + gcc/testsuite/gcc.target/i386/aes-avx-check.h | 31 + gcc/testsuite/gcc.target/i386/aesdec.c | 14 +- gcc/testsuite/gcc.target/i386/aesdeclast.c | 14 +- gcc/testsuite/gcc.target/i386/aesenc.c | 14 +- gcc/testsuite/gcc.target/i386/aesenclast.c | 14 +- gcc/testsuite/gcc.target/i386/aesimc.c | 14 +- gcc/testsuite/gcc.target/i386/aeskeygenassist.c | 14 +- gcc/testsuite/gcc.target/i386/avx-1.c | 139 ++++ gcc/testsuite/gcc.target/i386/avx-2.c | 172 +++++ gcc/testsuite/gcc.target/i386/avx-3.c | 8 + gcc/testsuite/gcc.target/i386/avx-check.h | 29 + gcc/testsuite/gcc.target/i386/avx-set-v16hi-1.c | 30 + gcc/testsuite/gcc.target/i386/avx-set-v16hi-2.c | 34 + gcc/testsuite/gcc.target/i386/avx-set-v16hi-3.c | 28 + gcc/testsuite/gcc.target/i386/avx-set-v16hi-4.c | 83 +++ gcc/testsuite/gcc.target/i386/avx-set-v16hi-5.c | 83 +++ gcc/testsuite/gcc.target/i386/avx-set-v32qi-1.c | 36 + gcc/testsuite/gcc.target/i386/avx-set-v32qi-2.c | 46 ++ gcc/testsuite/gcc.target/i386/avx-set-v32qi-3.c | 30 + gcc/testsuite/gcc.target/i386/avx-set-v32qi-4.c | 131 ++++ gcc/testsuite/gcc.target/i386/avx-set-v32qi-5.c | 131 ++++ gcc/testsuite/gcc.target/i386/avx-set-v4df-1.c | 23 + gcc/testsuite/gcc.target/i386/avx-set-v4df-2.c | 23 + gcc/testsuite/gcc.target/i386/avx-set-v4df-3.c | 27 + gcc/testsuite/gcc.target/i386/avx-set-v4df-4.c | 43 ++ gcc/testsuite/gcc.target/i386/avx-set-v4df-5.c | 43 ++ gcc/testsuite/gcc.target/i386/avx-set-v4di-1.c | 25 + gcc/testsuite/gcc.target/i386/avx-set-v4di-2.c | 25 + gcc/testsuite/gcc.target/i386/avx-set-v4di-3.c | 27 + gcc/testsuite/gcc.target/i386/avx-set-v4di-4.c | 43 ++ gcc/testsuite/gcc.target/i386/avx-set-v4di-5.c | 43 ++ gcc/testsuite/gcc.target/i386/avx-set-v8sf-1.c | 24 + gcc/testsuite/gcc.target/i386/avx-set-v8sf-2.c | 25 + gcc/testsuite/gcc.target/i386/avx-set-v8sf-3.c | 27 + gcc/testsuite/gcc.target/i386/avx-set-v8sf-4.c | 51 ++ gcc/testsuite/gcc.target/i386/avx-set-v8sf-5.c | 51 ++ gcc/testsuite/gcc.target/i386/avx-set-v8si-1.c | 26 + gcc/testsuite/gcc.target/i386/avx-set-v8si-2.c | 25 + gcc/testsuite/gcc.target/i386/avx-set-v8si-3.c | 27 + gcc/testsuite/gcc.target/i386/avx-set-v8si-4.c | 51 ++ gcc/testsuite/gcc.target/i386/avx-set-v8si-5.c | 51 ++ gcc/testsuite/gcc.target/i386/avx-set1-epi32-1.c | 22 + gcc/testsuite/gcc.target/i386/avx-set1-pd-256-1.c | 22 + gcc/testsuite/gcc.target/i386/avx-set1-ps-256-1.c | 22 + .../gcc.target/i386/avx-setzero-pd-256-1.c | 21 + .../gcc.target/i386/avx-setzero-ps-256-1.c | 21 + .../gcc.target/i386/avx-setzero-si256-1.c | 21 + gcc/testsuite/gcc.target/i386/avx-vaddpd-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vaddpd-256-1.c | 23 + gcc/testsuite/gcc.target/i386/avx-vaddps-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vaddps-256-1.c | 23 + gcc/testsuite/gcc.target/i386/avx-vaddsd-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vaddss-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vaddsubpd-1.c | 8 + .../gcc.target/i386/avx-vaddsubpd-256-1.c | 26 + gcc/testsuite/gcc.target/i386/avx-vaddsubps-1.c | 8 + .../gcc.target/i386/avx-vaddsubps-256-1.c | 26 + gcc/testsuite/gcc.target/i386/avx-vaesdec-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vaesdeclast-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vaesenc-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vaesenclast-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vaesimc-1.c | 8 + .../gcc.target/i386/avx-vaeskeygenassist-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vandnpd-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vandnpd-256-1.c | 28 + gcc/testsuite/gcc.target/i386/avx-vandnps-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vandnps-256-1.c | 28 + gcc/testsuite/gcc.target/i386/avx-vandpd-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vandpd-256-1.c | 32 + gcc/testsuite/gcc.target/i386/avx-vandps-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vandps-256-1.c | 32 + gcc/testsuite/gcc.target/i386/avx-vblendpd-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vblendpd-256-1.c | 27 + gcc/testsuite/gcc.target/i386/avx-vblendps-256-1.c | 27 + .../gcc.target/i386/avx-vblendvpd-256-1.c | 32 + .../gcc.target/i386/avx-vblendvps-256-1.c | 33 + .../gcc.target/i386/avx-vbroadcastf128-256-1.c | 23 + .../gcc.target/i386/avx-vbroadcastf128-256-2.c | 22 + gcc/testsuite/gcc.target/i386/avx-vbroadcastsd-1.c | 22 + gcc/testsuite/gcc.target/i386/avx-vbroadcastss-1.c | 22 + gcc/testsuite/gcc.target/i386/avx-vbroadcastss-2.c | 22 + gcc/testsuite/gcc.target/i386/avx-vcmppd-1.c | 78 ++ gcc/testsuite/gcc.target/i386/avx-vcmppd-256-1.c | 75 ++ gcc/testsuite/gcc.target/i386/avx-vcmpps-1.c | 74 ++ gcc/testsuite/gcc.target/i386/avx-vcmpps-256-1.c | 74 ++ gcc/testsuite/gcc.target/i386/avx-vcmpsd-1.c | 71 ++ gcc/testsuite/gcc.target/i386/avx-vcmpss-1.c | 73 ++ gcc/testsuite/gcc.target/i386/avx-vcomisd-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vcomisd-2.c | 8 + gcc/testsuite/gcc.target/i386/avx-vcomisd-3.c | 8 + gcc/testsuite/gcc.target/i386/avx-vcomisd-4.c | 8 + gcc/testsuite/gcc.target/i386/avx-vcomisd-5.c | 8 + gcc/testsuite/gcc.target/i386/avx-vcomisd-6.c | 8 + gcc/testsuite/gcc.target/i386/avx-vcomiss-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vcomiss-2.c | 8 + gcc/testsuite/gcc.target/i386/avx-vcomiss-3.c | 8 + gcc/testsuite/gcc.target/i386/avx-vcomiss-4.c | 8 + gcc/testsuite/gcc.target/i386/avx-vcomiss-5.c | 8 + gcc/testsuite/gcc.target/i386/avx-vcomiss-6.c | 8 + gcc/testsuite/gcc.target/i386/avx-vcvtdq2pd-1.c | 8 + .../gcc.target/i386/avx-vcvtdq2pd-256-1.c | 23 + gcc/testsuite/gcc.target/i386/avx-vcvtdq2ps-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vcvtpd2dq-1.c | 8 + .../gcc.target/i386/avx-vcvtpd2dq-256-1.c | 23 + gcc/testsuite/gcc.target/i386/avx-vcvtpd2ps-1.c | 8 + .../gcc.target/i386/avx-vcvtpd2ps-256-1.c | 23 + gcc/testsuite/gcc.target/i386/avx-vcvtps2dq-1.c | 8 + .../gcc.target/i386/avx-vcvtps2dq-256-1.c | 23 + gcc/testsuite/gcc.target/i386/avx-vcvtps2pd-1.c | 8 + .../gcc.target/i386/avx-vcvtps2pd-256-1.c | 23 + gcc/testsuite/gcc.target/i386/avx-vcvtsd2si-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vcvtsd2si-2.c | 9 + gcc/testsuite/gcc.target/i386/avx-vcvtsd2ss-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vcvtsi2sd-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vcvtsi2sd-2.c | 9 + gcc/testsuite/gcc.target/i386/avx-vcvtsi2ss-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vcvtsi2ss-2.c | 9 + gcc/testsuite/gcc.target/i386/avx-vcvtss2sd-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vcvtss2si-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vcvtss2si-2.c | 9 + gcc/testsuite/gcc.target/i386/avx-vcvttpd2dq-1.c | 8 + .../gcc.target/i386/avx-vcvttpd2dq-256-1.c | 23 + gcc/testsuite/gcc.target/i386/avx-vcvttps2dq-1.c | 8 + .../gcc.target/i386/avx-vcvttps2dq-256-1.c | 23 + gcc/testsuite/gcc.target/i386/avx-vcvttsd2si-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vcvttsd2si-2.c | 9 + gcc/testsuite/gcc.target/i386/avx-vcvttss2si-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vcvttss2si-2.c | 9 + gcc/testsuite/gcc.target/i386/avx-vdivpd-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vdivpd-256-1.c | 23 + gcc/testsuite/gcc.target/i386/avx-vdivps-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vdivps-256-1.c | 23 + gcc/testsuite/gcc.target/i386/avx-vdivsd-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vdivss-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vdppd-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vdppd-2.c | 8 + gcc/testsuite/gcc.target/i386/avx-vdpps-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vdpps-2.c | 8 + .../gcc.target/i386/avx-vextractf128-256-1.c | 29 + .../gcc.target/i386/avx-vextractf128-256-2.c | 29 + gcc/testsuite/gcc.target/i386/avx-vextractps-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vhaddpd-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vhaddpd-256-1.c | 24 + gcc/testsuite/gcc.target/i386/avx-vhaddps-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vhaddps-256-1.c | 28 + gcc/testsuite/gcc.target/i386/avx-vhsubpd-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vhsubpd-256-1.c | 24 + gcc/testsuite/gcc.target/i386/avx-vhsubps-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vhsubps-256-1.c | 28 + .../gcc.target/i386/avx-vinsertf128-256-1.c | 35 + .../gcc.target/i386/avx-vinsertf128-256-2.c | 35 + .../gcc.target/i386/avx-vinsertf128-256-3.c | 35 + gcc/testsuite/gcc.target/i386/avx-vinsertps-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vinsertps-2.c | 8 + gcc/testsuite/gcc.target/i386/avx-vlddqu-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vlddqu-256-1.c | 17 + .../gcc.target/i386/avx-vmaskmovpd-256-1.c | 30 + .../gcc.target/i386/avx-vmaskmovpd-256-2.c | 32 + .../gcc.target/i386/avx-vmaskmovps-256-1.c | 30 + .../gcc.target/i386/avx-vmaskmovps-256-2.c | 32 + gcc/testsuite/gcc.target/i386/avx-vmaxpd-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vmaxpd-256-1.c | 23 + gcc/testsuite/gcc.target/i386/avx-vmaxps-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vmaxps-256-1.c | 23 + gcc/testsuite/gcc.target/i386/avx-vmaxsd-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vmaxss-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vminpd-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vminpd-256-1.c | 23 + gcc/testsuite/gcc.target/i386/avx-vminps-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vminps-256-1.c | 23 + gcc/testsuite/gcc.target/i386/avx-vminsd-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vminss-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vmovapd-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vmovapd-2.c | 8 + gcc/testsuite/gcc.target/i386/avx-vmovapd-256-1.c | 24 + gcc/testsuite/gcc.target/i386/avx-vmovapd-256-2.c | 26 + gcc/testsuite/gcc.target/i386/avx-vmovaps-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vmovaps-2.c | 8 + gcc/testsuite/gcc.target/i386/avx-vmovaps-256-1.c | 24 + gcc/testsuite/gcc.target/i386/avx-vmovaps-256-2.c | 26 + gcc/testsuite/gcc.target/i386/avx-vmovd-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vmovd-2.c | 9 + gcc/testsuite/gcc.target/i386/avx-vmovddup-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vmovddup-256-1.c | 22 + gcc/testsuite/gcc.target/i386/avx-vmovdqa-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vmovdqa-2.c | 8 + gcc/testsuite/gcc.target/i386/avx-vmovdqa-256-1.c | 24 + gcc/testsuite/gcc.target/i386/avx-vmovdqa-256-2.c | 18 + gcc/testsuite/gcc.target/i386/avx-vmovdqu-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vmovdqu-2.c | 8 + gcc/testsuite/gcc.target/i386/avx-vmovdqu-256-1.c | 17 + gcc/testsuite/gcc.target/i386/avx-vmovdqu-256-2.c | 18 + gcc/testsuite/gcc.target/i386/avx-vmovhlps-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vmovhpd-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vmovhpd-2.c | 8 + gcc/testsuite/gcc.target/i386/avx-vmovhps-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vmovhps-2.c | 8 + gcc/testsuite/gcc.target/i386/avx-vmovlhps-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vmovlpd-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vmovlpd-2.c | 8 + gcc/testsuite/gcc.target/i386/avx-vmovmskpd-1.c | 8 + .../gcc.target/i386/avx-vmovmskpd-256-1.c | 25 + gcc/testsuite/gcc.target/i386/avx-vmovmskps-1.c | 8 + .../gcc.target/i386/avx-vmovmskps-256-1.c | 25 + gcc/testsuite/gcc.target/i386/avx-vmovntdq-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vmovntdqa-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vmovntpd-1.c | 9 + gcc/testsuite/gcc.target/i386/avx-vmovntps-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vmovq-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vmovq-2.c | 9 + gcc/testsuite/gcc.target/i386/avx-vmovq-3.c | 9 + gcc/testsuite/gcc.target/i386/avx-vmovsd-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vmovsd-2.c | 8 + gcc/testsuite/gcc.target/i386/avx-vmovshdup-1.c | 8 + .../gcc.target/i386/avx-vmovshdup-256-1.c | 22 + gcc/testsuite/gcc.target/i386/avx-vmovsldup-1.c | 8 + .../gcc.target/i386/avx-vmovsldup-256-1.c | 22 + gcc/testsuite/gcc.target/i386/avx-vmovss-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vmovss-2.c | 8 + gcc/testsuite/gcc.target/i386/avx-vmovss-3.c | 8 + gcc/testsuite/gcc.target/i386/avx-vmovupd-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vmovupd-2.c | 8 + gcc/testsuite/gcc.target/i386/avx-vmovupd-256-1.c | 24 + gcc/testsuite/gcc.target/i386/avx-vmovupd-256-2.c | 26 + gcc/testsuite/gcc.target/i386/avx-vmovups-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vmovups-2.c | 8 + gcc/testsuite/gcc.target/i386/avx-vmovups-256-1.c | 24 + gcc/testsuite/gcc.target/i386/avx-vmovups-256-2.c | 26 + gcc/testsuite/gcc.target/i386/avx-vmpsadbw-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vmulpd-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vmulpd-256-1.c | 23 + gcc/testsuite/gcc.target/i386/avx-vmulps-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vmulps-256-1.c | 23 + gcc/testsuite/gcc.target/i386/avx-vmulsd-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vmulss-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vorpd-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vorpd-256-1.c | 32 + gcc/testsuite/gcc.target/i386/avx-vorps-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vorps-256-1.c | 33 + gcc/testsuite/gcc.target/i386/avx-vpabsb-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpabsd-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpabsw-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpackssdw-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpacksswb-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpackusdw-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpackuswb-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpaddb-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpaddd-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpaddq-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpaddsb-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpaddsw-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpaddusb-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpaddusw-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpaddw-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpalignr-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpand-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpandn-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpavgb-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpavgw-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpblendvb-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpblendw-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpcmpeqb-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpcmpeqd-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpcmpeqq-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpcmpeqw-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpcmpestri-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpcmpestri-2.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpcmpestrm-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpcmpestrm-2.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpcmpgtb-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpcmpgtd-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpcmpgtq-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpcmpgtw-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpcmpistri-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpcmpistri-2.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpcmpistrm-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpcmpistrm-2.c | 8 + .../gcc.target/i386/avx-vperm2f128-256-1.c | 63 ++ .../gcc.target/i386/avx-vperm2f128-256-2.c | 39 + .../gcc.target/i386/avx-vperm2f128-256-3.c | 37 + gcc/testsuite/gcc.target/i386/avx-vpermil2pd-1.c | 55 ++ .../gcc.target/i386/avx-vpermil2pd-256-1.c | 57 ++ gcc/testsuite/gcc.target/i386/avx-vpermil2ps-1.c | 62 ++ .../gcc.target/i386/avx-vpermil2ps-256-1.c | 62 ++ gcc/testsuite/gcc.target/i386/avx-vpermilpd-1.c | 27 + gcc/testsuite/gcc.target/i386/avx-vpermilpd-2.c | 33 + .../gcc.target/i386/avx-vpermilpd-256-1.c | 25 + .../gcc.target/i386/avx-vpermilpd-256-2.c | 36 + gcc/testsuite/gcc.target/i386/avx-vpermilps-1.c | 27 + gcc/testsuite/gcc.target/i386/avx-vpermilps-2.c | 33 + .../gcc.target/i386/avx-vpermilps-256-1.c | 31 + .../gcc.target/i386/avx-vpermilps-256-2.c | 37 + gcc/testsuite/gcc.target/i386/avx-vpextrb-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpextrd-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpextrq-1.c | 9 + gcc/testsuite/gcc.target/i386/avx-vpextrw-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vphaddd-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vphaddsw-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vphaddw-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vphminposuw-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vphsubd-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vphsubsw-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vphsubw-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpinsrb-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpinsrd-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpinsrq-1.c | 9 + gcc/testsuite/gcc.target/i386/avx-vpmaddubsw-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpmaxsb-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpmaxsd-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpmaxsw-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpmaxub-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpmaxud-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpmaxuw-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpminsb-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpminsd-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpminsw-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpminub-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpminud-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpminuw-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpmovmskb-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpmovsxbd-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpmovsxbq-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpmovsxbw-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpmovsxdq-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpmovsxwd-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpmovsxwq-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpmovzxbd-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpmovzxbq-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpmovzxbw-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpmovzxdq-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpmovzxwd-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpmovzxwq-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpmuldq-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpmulhrsw-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpmulhuw-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpmulhw-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpmulld-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpmullw-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpmuludq-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpor-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpsadbw-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpshufb-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpshufd-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpshufhw-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpshuflw-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpsignb-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpsignd-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpsignw-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpslld-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpslld-2.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpslldq-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpsllq-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpsllq-2.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpsllw-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpsllw-2.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpsrad-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpsrad-2.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpsraw-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpsraw-2.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpsrld-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpsrld-2.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpsrldq-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpsrlq-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpsrlq-2.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpsrlw-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpsrlw-2.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpsubb-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpsubd-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpsubq-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpsubsb-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpsubsw-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpsubw-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vptest-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vptest-2.c | 8 + gcc/testsuite/gcc.target/i386/avx-vptest-256-1.c | 28 + gcc/testsuite/gcc.target/i386/avx-vptest-256-2.c | 28 + gcc/testsuite/gcc.target/i386/avx-vptest-256-3.c | 33 + gcc/testsuite/gcc.target/i386/avx-vptest-3.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpunpckhbw-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpunpckhdq-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpunpckhqdq-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpunpckhwd-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpunpcklbw-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpunpckldq-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpunpcklqdq-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpunpcklwd-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vpxor-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vrcpps-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vrcpps-256-1.c | 26 + gcc/testsuite/gcc.target/i386/avx-vroundpd-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vroundpd-2.c | 8 + gcc/testsuite/gcc.target/i386/avx-vroundpd-256-1.c | 29 + gcc/testsuite/gcc.target/i386/avx-vroundpd-256-2.c | 27 + gcc/testsuite/gcc.target/i386/avx-vroundpd-256-3.c | 27 + gcc/testsuite/gcc.target/i386/avx-vroundpd-3.c | 8 + gcc/testsuite/gcc.target/i386/avx-vroundps-256-1.c | 19 + gcc/testsuite/gcc.target/i386/avx-vrsqrtps-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vrsqrtps-256-1.c | 26 + gcc/testsuite/gcc.target/i386/avx-vshufpd-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vshufpd-256-1.c | 28 + gcc/testsuite/gcc.target/i386/avx-vshufps-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vshufps-256-1.c | 49 ++ gcc/testsuite/gcc.target/i386/avx-vsqrtpd-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vsqrtpd-256-1.c | 18 + gcc/testsuite/gcc.target/i386/avx-vsqrtps-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vsqrtps-256-1.c | 20 + gcc/testsuite/gcc.target/i386/avx-vsubpd-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vsubpd-256-1.c | 23 + gcc/testsuite/gcc.target/i386/avx-vsubps-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vsubps-256-1.c | 23 + gcc/testsuite/gcc.target/i386/avx-vsubsd-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vsubss-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vtestpd-1.c | 37 + gcc/testsuite/gcc.target/i386/avx-vtestpd-2.c | 35 + gcc/testsuite/gcc.target/i386/avx-vtestpd-256-1.c | 35 + gcc/testsuite/gcc.target/i386/avx-vtestpd-256-2.c | 35 + gcc/testsuite/gcc.target/i386/avx-vtestpd-256-3.c | 40 ++ gcc/testsuite/gcc.target/i386/avx-vtestpd-3.c | 42 ++ gcc/testsuite/gcc.target/i386/avx-vtestps-1.c | 33 + gcc/testsuite/gcc.target/i386/avx-vtestps-2.c | 33 + gcc/testsuite/gcc.target/i386/avx-vtestps-256-1.c | 34 + gcc/testsuite/gcc.target/i386/avx-vtestps-256-2.c | 34 + gcc/testsuite/gcc.target/i386/avx-vtestps-256-3.c | 39 + gcc/testsuite/gcc.target/i386/avx-vtestps-3.c | 39 + gcc/testsuite/gcc.target/i386/avx-vucomisd-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vucomisd-2.c | 8 + gcc/testsuite/gcc.target/i386/avx-vucomisd-3.c | 8 + gcc/testsuite/gcc.target/i386/avx-vucomisd-4.c | 8 + gcc/testsuite/gcc.target/i386/avx-vucomisd-5.c | 8 + gcc/testsuite/gcc.target/i386/avx-vucomisd-6.c | 8 + gcc/testsuite/gcc.target/i386/avx-vucomiss-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vucomiss-2.c | 8 + gcc/testsuite/gcc.target/i386/avx-vucomiss-3.c | 8 + gcc/testsuite/gcc.target/i386/avx-vucomiss-4.c | 8 + gcc/testsuite/gcc.target/i386/avx-vucomiss-5.c | 8 + gcc/testsuite/gcc.target/i386/avx-vucomiss-6.c | 8 + gcc/testsuite/gcc.target/i386/avx-vunpckhpd-1.c | 8 + .../gcc.target/i386/avx-vunpckhpd-256-1.c | 24 + gcc/testsuite/gcc.target/i386/avx-vunpckhps-1.c | 8 + .../gcc.target/i386/avx-vunpckhps-256-1.c | 28 + gcc/testsuite/gcc.target/i386/avx-vunpcklpd-1.c | 8 + .../gcc.target/i386/avx-vunpcklpd-256-1.c | 24 + gcc/testsuite/gcc.target/i386/avx-vunpcklps-1.c | 8 + .../gcc.target/i386/avx-vunpcklps-256-1.c | 28 + gcc/testsuite/gcc.target/i386/avx-vxorpd-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vxorpd-256-1.c | 31 + gcc/testsuite/gcc.target/i386/avx-vxorps-1.c | 8 + gcc/testsuite/gcc.target/i386/avx-vxorps-256-1.c | 31 + gcc/testsuite/gcc.target/i386/avx-vzeroall-1.c | 52 ++ gcc/testsuite/gcc.target/i386/avx-vzeroall-2.c | 21 + gcc/testsuite/gcc.target/i386/avx-vzeroupper-1.c | 56 ++ gcc/testsuite/gcc.target/i386/avx-vzeroupper-2.c | 21 + gcc/testsuite/gcc.target/i386/i386.exp | 13 + gcc/testsuite/gcc.target/i386/m128-check.h | 103 ++- gcc/testsuite/gcc.target/i386/m256-1.c | 63 ++ gcc/testsuite/gcc.target/i386/m256-2.c | 73 ++ gcc/testsuite/gcc.target/i386/m256-check.h | 73 ++ gcc/testsuite/gcc.target/i386/sse-addps-1.c | 39 + gcc/testsuite/gcc.target/i386/sse-addss-1.c | 40 ++ gcc/testsuite/gcc.target/i386/sse-andnps-1.c | 42 ++ gcc/testsuite/gcc.target/i386/sse-andps-1.c | 48 ++ gcc/testsuite/gcc.target/i386/sse-check.h | 1 + gcc/testsuite/gcc.target/i386/sse-comiss-1.c | 37 + gcc/testsuite/gcc.target/i386/sse-comiss-2.c | 37 + gcc/testsuite/gcc.target/i386/sse-comiss-3.c | 37 + gcc/testsuite/gcc.target/i386/sse-comiss-4.c | 37 + gcc/testsuite/gcc.target/i386/sse-comiss-5.c | 37 + gcc/testsuite/gcc.target/i386/sse-comiss-6.c | 37 + gcc/testsuite/gcc.target/i386/sse-cvtsi2ss-1.c | 36 + gcc/testsuite/gcc.target/i386/sse-cvtsi2ss-2.c | 37 + gcc/testsuite/gcc.target/i386/sse-cvtss2si-1.c | 36 + gcc/testsuite/gcc.target/i386/sse-cvtss2si-2.c | 37 + gcc/testsuite/gcc.target/i386/sse-cvttss2si-1.c | 36 + gcc/testsuite/gcc.target/i386/sse-cvttss2si-2.c | 37 + gcc/testsuite/gcc.target/i386/sse-divps-1.c | 40 ++ gcc/testsuite/gcc.target/i386/sse-divss-1.c | 40 ++ gcc/testsuite/gcc.target/i386/sse-maxps-1.c | 39 + gcc/testsuite/gcc.target/i386/sse-maxss-1.c | 40 ++ gcc/testsuite/gcc.target/i386/sse-minps-1.c | 39 + gcc/testsuite/gcc.target/i386/sse-minss-1.c | 40 ++ gcc/testsuite/gcc.target/i386/sse-movaps-1.c | 33 + gcc/testsuite/gcc.target/i386/sse-movaps-2.c | 35 + gcc/testsuite/gcc.target/i386/sse-movhlps-1.c | 40 ++ gcc/testsuite/gcc.target/i386/sse-movhps-1.c | 42 ++ gcc/testsuite/gcc.target/i386/sse-movhps-2.c | 39 + gcc/testsuite/gcc.target/i386/sse-movlhps-1.c | 42 ++ gcc/testsuite/gcc.target/i386/sse-movmskps-1.c | 42 ++ gcc/testsuite/gcc.target/i386/sse-movntps-1.c | 34 + gcc/testsuite/gcc.target/i386/sse-movss-1.c | 39 + gcc/testsuite/gcc.target/i386/sse-movss-2.c | 38 + gcc/testsuite/gcc.target/i386/sse-movss-3.c | 41 ++ gcc/testsuite/gcc.target/i386/sse-movups-1.c | 33 + gcc/testsuite/gcc.target/i386/sse-movups-2.c | 35 + gcc/testsuite/gcc.target/i386/sse-mulps-1.c | 40 ++ gcc/testsuite/gcc.target/i386/sse-mulss-1.c | 40 ++ gcc/testsuite/gcc.target/i386/sse-orps-1.c | 47 ++ gcc/testsuite/gcc.target/i386/sse-rcpps-1.c | 42 ++ gcc/testsuite/gcc.target/i386/sse-rsqrtps-1.c | 42 ++ gcc/testsuite/gcc.target/i386/sse-sqrtps-1.c | 41 ++ gcc/testsuite/gcc.target/i386/sse-subps-1.c | 40 ++ gcc/testsuite/gcc.target/i386/sse-subss-1.c | 40 ++ gcc/testsuite/gcc.target/i386/sse-ucomiss-1.c | 37 + gcc/testsuite/gcc.target/i386/sse-ucomiss-2.c | 37 + gcc/testsuite/gcc.target/i386/sse-ucomiss-3.c | 37 + gcc/testsuite/gcc.target/i386/sse-ucomiss-4.c | 37 + gcc/testsuite/gcc.target/i386/sse-ucomiss-5.c | 37 + gcc/testsuite/gcc.target/i386/sse-ucomiss-6.c | 37 + gcc/testsuite/gcc.target/i386/sse-unpckhps-1.c | 40 ++ gcc/testsuite/gcc.target/i386/sse-unpcklps-1.c | 40 ++ gcc/testsuite/gcc.target/i386/sse-xorps-1.c | 47 ++ gcc/testsuite/gcc.target/i386/sse2-addpd-1.c | 38 + gcc/testsuite/gcc.target/i386/sse2-addsd-1.c | 38 + gcc/testsuite/gcc.target/i386/sse2-andnpd-1.c | 40 ++ gcc/testsuite/gcc.target/i386/sse2-andpd-1.c | 47 ++ gcc/testsuite/gcc.target/i386/sse2-comisd-1.c | 37 + gcc/testsuite/gcc.target/i386/sse2-comisd-2.c | 37 + gcc/testsuite/gcc.target/i386/sse2-comisd-3.c | 37 + gcc/testsuite/gcc.target/i386/sse2-comisd-4.c | 37 + gcc/testsuite/gcc.target/i386/sse2-comisd-5.c | 37 + gcc/testsuite/gcc.target/i386/sse2-comisd-6.c | 37 + gcc/testsuite/gcc.target/i386/sse2-cvtdq2pd-1.c | 39 + gcc/testsuite/gcc.target/i386/sse2-cvtdq2ps-1.c | 41 ++ gcc/testsuite/gcc.target/i386/sse2-cvtpd2dq-1.c | 39 + gcc/testsuite/gcc.target/i386/sse2-cvtpd2ps-1.c | 39 + gcc/testsuite/gcc.target/i386/sse2-cvtps2dq-1.c | 41 ++ gcc/testsuite/gcc.target/i386/sse2-cvtps2pd-1.c | 39 + gcc/testsuite/gcc.target/i386/sse2-cvtsd2si-1.c | 39 + gcc/testsuite/gcc.target/i386/sse2-cvtsd2si-2.c | 39 + gcc/testsuite/gcc.target/i386/sse2-cvtsd2ss-1.c | 41 ++ gcc/testsuite/gcc.target/i386/sse2-cvtsi2sd-1.c | 37 + gcc/testsuite/gcc.target/i386/sse2-cvtsi2sd-2.c | 38 + gcc/testsuite/gcc.target/i386/sse2-cvtss2sd-1.c | 40 ++ gcc/testsuite/gcc.target/i386/sse2-cvttpd2dq-1.c | 39 + gcc/testsuite/gcc.target/i386/sse2-cvttps2dq-1.c | 41 ++ gcc/testsuite/gcc.target/i386/sse2-cvttsd2si-1.c | 37 + gcc/testsuite/gcc.target/i386/sse2-cvttsd2si-2.c | 38 + gcc/testsuite/gcc.target/i386/sse2-divpd-1.c | 38 + gcc/testsuite/gcc.target/i386/sse2-divsd-1.c | 38 + gcc/testsuite/gcc.target/i386/sse2-maxpd-1.c | 38 + gcc/testsuite/gcc.target/i386/sse2-maxsd-1.c | 38 + gcc/testsuite/gcc.target/i386/sse2-minpd-1.c | 38 + gcc/testsuite/gcc.target/i386/sse2-minsd-1.c | 38 + gcc/testsuite/gcc.target/i386/sse2-movapd-1.c | 33 + gcc/testsuite/gcc.target/i386/sse2-movapd-2.c | 35 + gcc/testsuite/gcc.target/i386/sse2-movd-1.c | 36 + gcc/testsuite/gcc.target/i386/sse2-movd-2.c | 33 + gcc/testsuite/gcc.target/i386/sse2-movdqa-1.c | 33 + gcc/testsuite/gcc.target/i386/sse2-movdqa-2.c | 35 + gcc/testsuite/gcc.target/i386/sse2-movdqu-1.c | 33 + gcc/testsuite/gcc.target/i386/sse2-movdqu-2.c | 35 + gcc/testsuite/gcc.target/i386/sse2-movhpd-1.c | 38 + gcc/testsuite/gcc.target/i386/sse2-movhpd-2.c | 37 + gcc/testsuite/gcc.target/i386/sse2-movlpd-1.c | 40 ++ gcc/testsuite/gcc.target/i386/sse2-movlpd-2.c | 37 + gcc/testsuite/gcc.target/i386/sse2-movmskpd-1.c | 44 ++ gcc/testsuite/gcc.target/i386/sse2-movntdq-1.c | 35 + gcc/testsuite/gcc.target/i386/sse2-movntpd-1.c | 34 + gcc/testsuite/gcc.target/i386/sse2-movq-1.c | 35 + gcc/testsuite/gcc.target/i386/sse2-movq-2.c | 37 + gcc/testsuite/gcc.target/i386/sse2-movq-3.c | 34 + gcc/testsuite/gcc.target/i386/sse2-movsd-1.c | 38 + gcc/testsuite/gcc.target/i386/sse2-movsd-2.c | 37 + gcc/testsuite/gcc.target/i386/sse2-movupd-1.c | 33 + gcc/testsuite/gcc.target/i386/sse2-movupd-2.c | 35 + gcc/testsuite/gcc.target/i386/sse2-mulpd-1.c | 38 + gcc/testsuite/gcc.target/i386/sse2-mulsd-1.c | 38 + gcc/testsuite/gcc.target/i386/sse2-orpd-1.c | 47 ++ gcc/testsuite/gcc.target/i386/sse2-packssdw-1.c | 57 ++ gcc/testsuite/gcc.target/i386/sse2-packsswb-1.c | 57 ++ gcc/testsuite/gcc.target/i386/sse2-packuswb-1.c | 48 ++ gcc/testsuite/gcc.target/i386/sse2-paddb-1.c | 39 + gcc/testsuite/gcc.target/i386/sse2-paddd-1.c | 39 + gcc/testsuite/gcc.target/i386/sse2-paddq-1.c | 39 + gcc/testsuite/gcc.target/i386/sse2-paddsb-1.c | 48 ++ gcc/testsuite/gcc.target/i386/sse2-paddsw-1.c | 48 ++ gcc/testsuite/gcc.target/i386/sse2-paddusb-1.c | 48 ++ gcc/testsuite/gcc.target/i386/sse2-paddusw-1.c | 49 ++ gcc/testsuite/gcc.target/i386/sse2-paddw-1.c | 39 + gcc/testsuite/gcc.target/i386/sse2-pand-1.c | 39 + gcc/testsuite/gcc.target/i386/sse2-pandn-1.c | 39 + gcc/testsuite/gcc.target/i386/sse2-pavgb-1.c | 39 + gcc/testsuite/gcc.target/i386/sse2-pavgw-1.c | 39 + gcc/testsuite/gcc.target/i386/sse2-pcmpeqb-1.c | 39 + gcc/testsuite/gcc.target/i386/sse2-pcmpeqd-1.c | 39 + gcc/testsuite/gcc.target/i386/sse2-pcmpeqw-1.c | 39 + gcc/testsuite/gcc.target/i386/sse2-pcmpgtb-1.c | 39 + gcc/testsuite/gcc.target/i386/sse2-pcmpgtd-1.c | 39 + gcc/testsuite/gcc.target/i386/sse2-pcmpgtw-1.c | 39 + gcc/testsuite/gcc.target/i386/sse2-pmaddwd-1.c | 40 ++ gcc/testsuite/gcc.target/i386/sse2-pmaxsw-1.c | 39 + gcc/testsuite/gcc.target/i386/sse2-pmaxub-1.c | 39 + gcc/testsuite/gcc.target/i386/sse2-pminsw-1.c | 39 + gcc/testsuite/gcc.target/i386/sse2-pminub-1.c | 39 + gcc/testsuite/gcc.target/i386/sse2-pmovmskb-1.c | 38 + gcc/testsuite/gcc.target/i386/sse2-pmulhuw-1.c | 43 ++ gcc/testsuite/gcc.target/i386/sse2-pmulhw-1.c | 43 ++ gcc/testsuite/gcc.target/i386/sse2-pmullw-1.c | 43 ++ gcc/testsuite/gcc.target/i386/sse2-pmuludq-1.c | 39 + gcc/testsuite/gcc.target/i386/sse2-por-1.c | 41 ++ gcc/testsuite/gcc.target/i386/sse2-psadbw-1.c | 48 ++ gcc/testsuite/gcc.target/i386/sse2-pshufd-1.c | 40 ++ gcc/testsuite/gcc.target/i386/sse2-pshufhw-1.c | 49 ++ gcc/testsuite/gcc.target/i386/sse2-pshuflw-1.c | 49 ++ gcc/testsuite/gcc.target/i386/sse2-pslld-1.c | 42 ++ gcc/testsuite/gcc.target/i386/sse2-pslld-2.c | 42 ++ gcc/testsuite/gcc.target/i386/sse2-pslldq-1.c | 42 ++ gcc/testsuite/gcc.target/i386/sse2-psllq-1.c | 42 ++ gcc/testsuite/gcc.target/i386/sse2-psllq-2.c | 41 ++ gcc/testsuite/gcc.target/i386/sse2-psllw-1.c | 42 ++ gcc/testsuite/gcc.target/i386/sse2-psllw-2.c | 42 ++ gcc/testsuite/gcc.target/i386/sse2-psrad-1.c | 42 ++ gcc/testsuite/gcc.target/i386/sse2-psrad-2.c | 42 ++ gcc/testsuite/gcc.target/i386/sse2-psraw-1.c | 42 ++ gcc/testsuite/gcc.target/i386/sse2-psraw-2.c | 42 ++ gcc/testsuite/gcc.target/i386/sse2-psrld-1.c | 45 ++ gcc/testsuite/gcc.target/i386/sse2-psrld-2.c | 45 ++ gcc/testsuite/gcc.target/i386/sse2-psrldq-1.c | 42 ++ gcc/testsuite/gcc.target/i386/sse2-psrlq-1.c | 45 ++ gcc/testsuite/gcc.target/i386/sse2-psrlq-2.c | 44 ++ gcc/testsuite/gcc.target/i386/sse2-psrlw-1.c | 46 ++ gcc/testsuite/gcc.target/i386/sse2-psrlw-2.c | 46 ++ gcc/testsuite/gcc.target/i386/sse2-psubb-1.c | 39 + gcc/testsuite/gcc.target/i386/sse2-psubd-1.c | 39 + gcc/testsuite/gcc.target/i386/sse2-psubq-1.c | 39 + gcc/testsuite/gcc.target/i386/sse2-psubsb-1.c | 48 ++ gcc/testsuite/gcc.target/i386/sse2-psubsw-1.c | 48 ++ gcc/testsuite/gcc.target/i386/sse2-psubw-1.c | 39 + gcc/testsuite/gcc.target/i386/sse2-punpckhbw-1.c | 42 ++ gcc/testsuite/gcc.target/i386/sse2-punpckhdq-1.c | 42 ++ gcc/testsuite/gcc.target/i386/sse2-punpckhqdq-1.c | 38 + gcc/testsuite/gcc.target/i386/sse2-punpckhwd-1.c | 42 ++ gcc/testsuite/gcc.target/i386/sse2-punpcklbw-1.c | 42 ++ gcc/testsuite/gcc.target/i386/sse2-punpckldq-1.c | 42 ++ gcc/testsuite/gcc.target/i386/sse2-punpcklqdq-1.c | 38 + gcc/testsuite/gcc.target/i386/sse2-punpcklwd-1.c | 42 ++ gcc/testsuite/gcc.target/i386/sse2-pxor-1.c | 39 + gcc/testsuite/gcc.target/i386/sse2-shufpd-1.c | 40 ++ gcc/testsuite/gcc.target/i386/sse2-shufps-1.c | 57 ++ gcc/testsuite/gcc.target/i386/sse2-sqrtpd-1.c | 43 ++ gcc/testsuite/gcc.target/i386/sse2-subpd-1.c | 38 + gcc/testsuite/gcc.target/i386/sse2-subsd-1.c | 38 + gcc/testsuite/gcc.target/i386/sse2-ucomisd-1.c | 37 + gcc/testsuite/gcc.target/i386/sse2-ucomisd-2.c | 37 + gcc/testsuite/gcc.target/i386/sse2-ucomisd-3.c | 37 + gcc/testsuite/gcc.target/i386/sse2-ucomisd-4.c | 37 + gcc/testsuite/gcc.target/i386/sse2-ucomisd-5.c | 37 + gcc/testsuite/gcc.target/i386/sse2-ucomisd-6.c | 37 + gcc/testsuite/gcc.target/i386/sse2-unpckhpd-1.c | 38 + gcc/testsuite/gcc.target/i386/sse2-unpcklpd-1.c | 38 + gcc/testsuite/gcc.target/i386/sse2-xorpd-1.c | 48 ++ gcc/testsuite/gcc.target/i386/sse3-addsubpd.c | 14 +- gcc/testsuite/gcc.target/i386/sse3-addsubps.c | 12 +- gcc/testsuite/gcc.target/i386/sse3-haddpd.c | 11 +- gcc/testsuite/gcc.target/i386/sse3-haddps.c | 12 +- gcc/testsuite/gcc.target/i386/sse3-hsubpd.c | 11 +- gcc/testsuite/gcc.target/i386/sse3-hsubps.c | 11 +- gcc/testsuite/gcc.target/i386/sse3-lddqu.c | 11 +- gcc/testsuite/gcc.target/i386/sse3-movddup.c | 12 +- gcc/testsuite/gcc.target/i386/sse3-movshdup.c | 12 +- gcc/testsuite/gcc.target/i386/sse3-movsldup.c | 13 +- gcc/testsuite/gcc.target/i386/sse4_1-blendpd.c | 12 +- gcc/testsuite/gcc.target/i386/sse4_1-blendps.c | 12 +- gcc/testsuite/gcc.target/i386/sse4_1-dppd-1.c | 12 +- gcc/testsuite/gcc.target/i386/sse4_1-dppd-2.c | 13 +- gcc/testsuite/gcc.target/i386/sse4_1-dpps-1.c | 12 +- gcc/testsuite/gcc.target/i386/sse4_1-dpps-2.c | 13 +- gcc/testsuite/gcc.target/i386/sse4_1-extractps.c | 12 +- gcc/testsuite/gcc.target/i386/sse4_1-insertps-1.c | 12 +- gcc/testsuite/gcc.target/i386/sse4_1-insertps-2.c | 13 +- gcc/testsuite/gcc.target/i386/sse4_1-movntdqa.c | 12 +- gcc/testsuite/gcc.target/i386/sse4_1-mpsadbw.c | 12 +- gcc/testsuite/gcc.target/i386/sse4_1-packusdw.c | 12 +- gcc/testsuite/gcc.target/i386/sse4_1-pblendvb.c | 12 +- gcc/testsuite/gcc.target/i386/sse4_1-pblendw.c | 12 +- gcc/testsuite/gcc.target/i386/sse4_1-pcmpeqq.c | 12 +- gcc/testsuite/gcc.target/i386/sse4_1-pextrb.c | 11 +- gcc/testsuite/gcc.target/i386/sse4_1-pextrd.c | 12 +- gcc/testsuite/gcc.target/i386/sse4_1-pextrq.c | 13 +- gcc/testsuite/gcc.target/i386/sse4_1-pextrw.c | 12 +- gcc/testsuite/gcc.target/i386/sse4_1-phminposuw.c | 12 +- gcc/testsuite/gcc.target/i386/sse4_1-pinsrb.c | 12 +- gcc/testsuite/gcc.target/i386/sse4_1-pinsrd.c | 12 +- gcc/testsuite/gcc.target/i386/sse4_1-pinsrq.c | 13 +- gcc/testsuite/gcc.target/i386/sse4_1-pmaxsb.c | 12 +- gcc/testsuite/gcc.target/i386/sse4_1-pmaxsd.c | 12 +- gcc/testsuite/gcc.target/i386/sse4_1-pmaxud.c | 12 +- gcc/testsuite/gcc.target/i386/sse4_1-pmaxuw.c | 12 +- gcc/testsuite/gcc.target/i386/sse4_1-pminsb.c | 12 +- gcc/testsuite/gcc.target/i386/sse4_1-pminsd.c | 12 +- gcc/testsuite/gcc.target/i386/sse4_1-pminud.c | 12 +- gcc/testsuite/gcc.target/i386/sse4_1-pminuw.c | 12 +- gcc/testsuite/gcc.target/i386/sse4_1-pmovsxbd.c | 12 +- gcc/testsuite/gcc.target/i386/sse4_1-pmovsxbq.c | 12 +- gcc/testsuite/gcc.target/i386/sse4_1-pmovsxbw.c | 12 +- gcc/testsuite/gcc.target/i386/sse4_1-pmovsxdq.c | 12 +- gcc/testsuite/gcc.target/i386/sse4_1-pmovsxwd.c | 12 +- gcc/testsuite/gcc.target/i386/sse4_1-pmovsxwq.c | 12 +- gcc/testsuite/gcc.target/i386/sse4_1-pmovzxbd.c | 12 +- gcc/testsuite/gcc.target/i386/sse4_1-pmovzxbq.c | 12 +- gcc/testsuite/gcc.target/i386/sse4_1-pmovzxbw.c | 12 +- gcc/testsuite/gcc.target/i386/sse4_1-pmovzxdq.c | 12 +- gcc/testsuite/gcc.target/i386/sse4_1-pmovzxwd.c | 12 +- gcc/testsuite/gcc.target/i386/sse4_1-pmovzxwq.c | 12 +- gcc/testsuite/gcc.target/i386/sse4_1-pmuldq.c | 12 +- gcc/testsuite/gcc.target/i386/sse4_1-pmulld.c | 12 +- gcc/testsuite/gcc.target/i386/sse4_1-ptest-1.c | 12 +- gcc/testsuite/gcc.target/i386/sse4_1-ptest-2.c | 12 +- gcc/testsuite/gcc.target/i386/sse4_1-ptest-3.c | 12 +- gcc/testsuite/gcc.target/i386/sse4_1-roundpd-1.c | 40 +- gcc/testsuite/gcc.target/i386/sse4_1-roundpd-2.c | 38 +- gcc/testsuite/gcc.target/i386/sse4_1-roundpd-3.c | 38 +- gcc/testsuite/gcc.target/i386/sse4_2-pcmpestri-1.c | 13 +- gcc/testsuite/gcc.target/i386/sse4_2-pcmpestri-2.c | 13 +- gcc/testsuite/gcc.target/i386/sse4_2-pcmpestrm-1.c | 13 +- gcc/testsuite/gcc.target/i386/sse4_2-pcmpestrm-2.c | 13 +- gcc/testsuite/gcc.target/i386/sse4_2-pcmpgtq.c | 12 +- gcc/testsuite/gcc.target/i386/sse4_2-pcmpistri-1.c | 13 +- gcc/testsuite/gcc.target/i386/sse4_2-pcmpistri-2.c | 13 +- gcc/testsuite/gcc.target/i386/sse4_2-pcmpistrm-1.c | 13 +- gcc/testsuite/gcc.target/i386/sse4_2-pcmpistrm-2.c | 13 +- gcc/testsuite/gcc.target/i386/ssse3-pabsb.c | 18 +- gcc/testsuite/gcc.target/i386/ssse3-pabsd.c | 17 +- gcc/testsuite/gcc.target/i386/ssse3-pabsw.c | 17 +- gcc/testsuite/gcc.target/i386/ssse3-palignr.c | 19 +- gcc/testsuite/gcc.target/i386/ssse3-phaddd.c | 17 +- gcc/testsuite/gcc.target/i386/ssse3-phaddsw.c | 17 +- gcc/testsuite/gcc.target/i386/ssse3-phaddw.c | 17 +- gcc/testsuite/gcc.target/i386/ssse3-phsubd.c | 17 +- gcc/testsuite/gcc.target/i386/ssse3-phsubsw.c | 17 +- gcc/testsuite/gcc.target/i386/ssse3-phsubw.c | 16 +- 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gcc/testsuite/gcc.target/i386/sse-ucomiss-6.c create mode 100644 gcc/testsuite/gcc.target/i386/sse-unpckhps-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse-unpcklps-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse-xorps-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-addpd-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-addsd-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-andnpd-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-andpd-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-comisd-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-comisd-2.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-comisd-3.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-comisd-4.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-comisd-5.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-comisd-6.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-cvtdq2pd-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-cvtdq2ps-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-cvtpd2dq-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-cvtpd2ps-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-cvtps2dq-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-cvtps2pd-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-cvtsd2si-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-cvtsd2si-2.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-cvtsd2ss-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-cvtsi2sd-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-cvtsi2sd-2.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-cvtss2sd-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-cvttpd2dq-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-cvttps2dq-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-cvttsd2si-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-cvttsd2si-2.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-divpd-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-divsd-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-maxpd-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-maxsd-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-minpd-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-minsd-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-movapd-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-movapd-2.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-movd-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-movd-2.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-movdqa-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-movdqa-2.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-movdqu-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-movdqu-2.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-movhpd-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-movhpd-2.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-movlpd-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-movlpd-2.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-movmskpd-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-movntdq-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-movntpd-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-movq-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-movq-2.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-movq-3.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-movsd-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-movsd-2.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-movupd-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-movupd-2.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mulpd-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mulsd-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-orpd-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-packssdw-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-packsswb-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-packuswb-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-paddb-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-paddd-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-paddq-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-paddsb-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-paddsw-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-paddusb-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-paddusw-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-paddw-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-pand-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-pandn-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-pavgb-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-pavgw-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-pcmpeqb-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-pcmpeqd-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-pcmpeqw-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-pcmpgtb-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-pcmpgtd-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-pcmpgtw-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-pmaddwd-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-pmaxsw-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-pmaxub-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-pminsw-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-pminub-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-pmovmskb-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-pmulhuw-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-pmulhw-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-pmullw-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-pmuludq-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-por-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-psadbw-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-pshufd-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-pshufhw-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-pshuflw-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-pslld-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-pslld-2.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-pslldq-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-psllq-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-psllq-2.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-psllw-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-psllw-2.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-psrad-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-psrad-2.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-psraw-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-psraw-2.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-psrld-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-psrld-2.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-psrldq-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-psrlq-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-psrlq-2.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-psrlw-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-psrlw-2.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-psubb-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-psubd-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-psubq-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-psubsb-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-psubsw-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-psubw-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-punpckhbw-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-punpckhdq-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-punpckhqdq-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-punpckhwd-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-punpcklbw-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-punpckldq-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-punpcklqdq-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-punpcklwd-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-pxor-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-shufpd-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-shufps-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-sqrtpd-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-subpd-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-subsd-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-ucomisd-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-ucomisd-2.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-ucomisd-3.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-ucomisd-4.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-ucomisd-5.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-ucomisd-6.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-unpckhpd-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-unpcklpd-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-xorpd-1.c create mode 100644 gcc/testsuite/gcc.target/i386/vararg-10.c create mode 100644 gcc/testsuite/gcc.target/i386/vararg-3.c create mode 100644 gcc/testsuite/gcc.target/i386/vararg-4.c create mode 100644 gcc/testsuite/gcc.target/i386/vararg-5.c create mode 100644 gcc/testsuite/gcc.target/i386/vararg-6.c create mode 100644 gcc/testsuite/gcc.target/i386/vararg-7.c create mode 100644 gcc/testsuite/gcc.target/i386/vararg-8.c create mode 100644 gcc/testsuite/gcc.target/i386/vararg-9.c rename gcc/testsuite/gcc.target/x86_64/abi/{asm-support.s => asm-support.S} (97%) diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 30b4323..f235712 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,799 @@ +2008-08-28 Xuepeng Guo + Joey Ye + H.J. Lu + + * gcc.dg/compat/vector-1b_main.c: New. + * gcc.dg/compat/vector-1b_x.c: Likewise. + * gcc.dg/compat/vector-1b_y.c: Likewise. + * gcc.dg/compat/vector-2b_main.c: Likewise. + * gcc.dg/compat/vector-2b_x.c: Likewise. + * gcc.dg/compat/vector-2b_y.c: Likewise. + * gcc.target/i386/aes-avx-check.h: Likewise. + * gcc.target/i386/avx-1.c: Likewise. + * gcc.target/i386/avx-2.c: Likewise. + * gcc.target/i386/avx-3.c: Likewise. + * gcc.target/i386/avx-check.h: Likewise. + * gcc.target/i386/avx-set1-epi32-1.c: Likewise. + * gcc.target/i386/avx-set1-pd-256-1.c: Likewise. + * gcc.target/i386/avx-set1-ps-256-1.c: Likewise. + * gcc.target/i386/avx-set-v16hi-1.c: Likewise. + * gcc.target/i386/avx-set-v16hi-2.c: Likewise. + * gcc.target/i386/avx-set-v16hi-3.c: Likewise. + * gcc.target/i386/avx-set-v16hi-4.c: Likewise. + * gcc.target/i386/avx-set-v16hi-5.c: Likewise. + * gcc.target/i386/avx-set-v32qi-1.c: Likewise. + * gcc.target/i386/avx-set-v32qi-2.c: Likewise. + * gcc.target/i386/avx-set-v32qi-3.c: Likewise. + * gcc.target/i386/avx-set-v32qi-4.c: Likewise. + * gcc.target/i386/avx-set-v32qi-5.c: Likewise. + * gcc.target/i386/avx-set-v4df-1.c: Likewise. + * gcc.target/i386/avx-set-v4df-2.c: Likewise. + * gcc.target/i386/avx-set-v4df-3.c: Likewise. + * gcc.target/i386/avx-set-v4df-4.c: Likewise. + * gcc.target/i386/avx-set-v4df-5.c: Likewise. + * gcc.target/i386/avx-set-v4di-1.c: Likewise. + * gcc.target/i386/avx-set-v4di-2.c: Likewise. + * gcc.target/i386/avx-set-v4di-3.c: Likewise. + * gcc.target/i386/avx-set-v4di-4.c: Likewise. + * gcc.target/i386/avx-set-v4di-5.c: Likewise. + * gcc.target/i386/avx-set-v8sf-1.c: Likewise. + * gcc.target/i386/avx-set-v8sf-2.c: Likewise. + * gcc.target/i386/avx-set-v8sf-3.c: Likewise. + * gcc.target/i386/avx-set-v8sf-4.c: Likewise. + * gcc.target/i386/avx-set-v8sf-5.c: Likewise. + * gcc.target/i386/avx-set-v8si-1.c: Likewise. + * gcc.target/i386/avx-set-v8si-2.c: Likewise. + * gcc.target/i386/avx-set-v8si-3.c: Likewise. + * gcc.target/i386/avx-set-v8si-4.c: Likewise. + * gcc.target/i386/avx-set-v8si-5.c: Likewise. + * gcc.target/i386/avx-setzero-pd-256-1.c: Likewise. + * gcc.target/i386/avx-setzero-ps-256-1.c: Likewise. + * gcc.target/i386/avx-setzero-si256-1.c: Likewise. + * gcc.target/i386/avx-vaddpd-1.c: Likewise. + * gcc.target/i386/avx-vaddpd-256-1.c: Likewise. + * gcc.target/i386/avx-vaddps-1.c: Likewise. + * gcc.target/i386/avx-vaddps-256-1.c: Likewise. + * gcc.target/i386/avx-vaddsd-1.c: Likewise. + * gcc.target/i386/avx-vaddss-1.c: Likewise. + * gcc.target/i386/avx-vaddsubpd-1.c: Likewise. + * gcc.target/i386/avx-vaddsubpd-256-1.c: Likewise. + * gcc.target/i386/avx-vaddsubps-1.c: Likewise. + * gcc.target/i386/avx-vaddsubps-256-1.c: Likewise. + * gcc.target/i386/avx-vaesdec-1.c: Likewise. + * gcc.target/i386/avx-vaesdeclast-1.c: Likewise. + * gcc.target/i386/avx-vaesenc-1.c: Likewise. + * gcc.target/i386/avx-vaesenclast-1.c: Likewise. + * gcc.target/i386/avx-vaesimc-1.c: Likewise. + * gcc.target/i386/avx-vaeskeygenassist-1.c: Likewise. + * gcc.target/i386/avx-vandnpd-1.c: Likewise. + * gcc.target/i386/avx-vandnpd-256-1.c: Likewise. + * gcc.target/i386/avx-vandnps-1.c: Likewise. + * gcc.target/i386/avx-vandnps-256-1.c: Likewise. + * gcc.target/i386/avx-vandpd-1.c: Likewise. + * gcc.target/i386/avx-vandpd-256-1.c: Likewise. + * gcc.target/i386/avx-vandps-1.c: Likewise. + * gcc.target/i386/avx-vandps-256-1.c: Likewise. + * gcc.target/i386/avx-vblendpd-1.c: Likewise. + * gcc.target/i386/avx-vblendpd-256-1.c: Likewise. + * gcc.target/i386/avx-vblendps-256-1.c: Likewise. + * gcc.target/i386/avx-vblendvpd-256-1.c: Likewise. + * gcc.target/i386/avx-vblendvps-256-1.c: Likewise. + * gcc.target/i386/avx-vbroadcastf128-256-1.c: Likewise. + * gcc.target/i386/avx-vbroadcastf128-256-2.c: Likewise. + * gcc.target/i386/avx-vbroadcastsd-1.c: Likewise. + * gcc.target/i386/avx-vbroadcastss-1.c: Likewise. + * gcc.target/i386/avx-vbroadcastss-2.c: Likewise. + * gcc.target/i386/avx-vcmppd-1.c: Likewise. + * gcc.target/i386/avx-vcmppd-256-1.c: Likewise. + * gcc.target/i386/avx-vcmpps-1.c: Likewise. + * gcc.target/i386/avx-vcmpps-256-1.c: Likewise. + * gcc.target/i386/avx-vcmpsd-1.c: Likewise. + * gcc.target/i386/avx-vcmpss-1.c: Likewise. + * gcc.target/i386/avx-vcomisd-1.c: Likewise. + * gcc.target/i386/avx-vcomisd-2.c: Likewise. + * gcc.target/i386/avx-vcomisd-3.c: Likewise. + * gcc.target/i386/avx-vcomisd-4.c: Likewise. + * gcc.target/i386/avx-vcomisd-5.c: Likewise. + * gcc.target/i386/avx-vcomisd-6.c: Likewise. + * gcc.target/i386/avx-vcomiss-1.c: Likewise. + * gcc.target/i386/avx-vcomiss-2.c: Likewise. + * gcc.target/i386/avx-vcomiss-3.c: Likewise. + * gcc.target/i386/avx-vcomiss-4.c: Likewise. + * gcc.target/i386/avx-vcomiss-5.c: Likewise. + * gcc.target/i386/avx-vcomiss-6.c: Likewise. + * gcc.target/i386/avx-vcvtdq2pd-1.c: Likewise. + * gcc.target/i386/avx-vcvtdq2pd-256-1.c: Likewise. + * gcc.target/i386/avx-vcvtdq2ps-1.c: Likewise. + * gcc.target/i386/avx-vcvtpd2dq-1.c: Likewise. + * gcc.target/i386/avx-vcvtpd2dq-256-1.c: Likewise. + * gcc.target/i386/avx-vcvtpd2ps-1.c: Likewise. + * gcc.target/i386/avx-vcvtpd2ps-256-1.c: Likewise. + * gcc.target/i386/avx-vcvtps2dq-1.c: Likewise. + * gcc.target/i386/avx-vcvtps2dq-256-1.c: Likewise. + * gcc.target/i386/avx-vcvtps2pd-1.c: Likewise. + * gcc.target/i386/avx-vcvtps2pd-256-1.c: Likewise. + * gcc.target/i386/avx-vcvtsd2si-1.c: Likewise. + * gcc.target/i386/avx-vcvtsd2si-2.c: Likewise. + * gcc.target/i386/avx-vcvtsd2ss-1.c: Likewise. + * gcc.target/i386/avx-vcvtsi2sd-1.c: Likewise. + * gcc.target/i386/avx-vcvtsi2sd-2.c: Likewise. + * gcc.target/i386/avx-vcvtsi2ss-1.c: Likewise. + * gcc.target/i386/avx-vcvtsi2ss-2.c: Likewise. + * gcc.target/i386/avx-vcvtss2sd-1.c: Likewise. + * gcc.target/i386/avx-vcvtss2si-1.c: Likewise. + * gcc.target/i386/avx-vcvtss2si-2.c: Likewise. + * gcc.target/i386/avx-vcvttpd2dq-1.c: Likewise. + * gcc.target/i386/avx-vcvttpd2dq-256-1.c: Likewise. + * gcc.target/i386/avx-vcvttps2dq-1.c: Likewise. + * gcc.target/i386/avx-vcvttps2dq-256-1.c: Likewise. + * gcc.target/i386/avx-vcvttsd2si-1.c: Likewise. + * gcc.target/i386/avx-vcvttsd2si-2.c: Likewise. + * gcc.target/i386/avx-vcvttss2si-1.c: Likewise. + * gcc.target/i386/avx-vcvttss2si-2.c: Likewise. + * gcc.target/i386/avx-vdivpd-1.c: Likewise. + * gcc.target/i386/avx-vdivpd-256-1.c: Likewise. + * gcc.target/i386/avx-vdivps-1.c: Likewise. + * gcc.target/i386/avx-vdivps-256-1.c: Likewise. + * gcc.target/i386/avx-vdivsd-1.c: Likewise. + * gcc.target/i386/avx-vdivss-1.c: Likewise. + * gcc.target/i386/avx-vdppd-1.c: Likewise. + * gcc.target/i386/avx-vdppd-2.c: Likewise. + * gcc.target/i386/avx-vdpps-1.c: Likewise. + * gcc.target/i386/avx-vdpps-2.c: Likewise. + * gcc.target/i386/avx-vextractf128-256-1.c: Likewise. + * gcc.target/i386/avx-vextractf128-256-2.c: Likewise. + * gcc.target/i386/avx-vextractps-1.c: Likewise. + * gcc.target/i386/avx-vhaddpd-1.c: Likewise. + * gcc.target/i386/avx-vhaddpd-256-1.c: Likewise. + * gcc.target/i386/avx-vhaddps-1.c: Likewise. + * gcc.target/i386/avx-vhaddps-256-1.c: Likewise. + * gcc.target/i386/avx-vhsubpd-1.c: Likewise. + * gcc.target/i386/avx-vhsubpd-256-1.c: Likewise. + * gcc.target/i386/avx-vhsubps-1.c: Likewise. + * gcc.target/i386/avx-vhsubps-256-1.c: Likewise. + * gcc.target/i386/avx-vinsertf128-256-1.c: Likewise. + * gcc.target/i386/avx-vinsertf128-256-2.c: Likewise. + * gcc.target/i386/avx-vinsertf128-256-3.c: Likewise. + * gcc.target/i386/avx-vinsertps-1.c: Likewise. + * gcc.target/i386/avx-vinsertps-2.c: Likewise. + * gcc.target/i386/avx-vlddqu-1.c: Likewise. + * gcc.target/i386/avx-vlddqu-256-1.c: Likewise. + * gcc.target/i386/avx-vmaskmovpd-256-1.c: Likewise. + * gcc.target/i386/avx-vmaskmovpd-256-2.c: Likewise. + * gcc.target/i386/avx-vmaskmovps-256-1.c: Likewise. + * gcc.target/i386/avx-vmaskmovps-256-2.c: Likewise. + * gcc.target/i386/avx-vmaxpd-1.c: Likewise. + * gcc.target/i386/avx-vmaxpd-256-1.c: Likewise. + * gcc.target/i386/avx-vmaxps-1.c: Likewise. + * gcc.target/i386/avx-vmaxps-256-1.c: Likewise. + * gcc.target/i386/avx-vmaxsd-1.c: Likewise. + * gcc.target/i386/avx-vmaxss-1.c: Likewise. + * gcc.target/i386/avx-vminpd-1.c: Likewise. + * gcc.target/i386/avx-vminpd-256-1.c: Likewise. + * gcc.target/i386/avx-vminps-1.c: Likewise. + * gcc.target/i386/avx-vminps-256-1.c: Likewise. + * gcc.target/i386/avx-vminsd-1.c: Likewise. + * gcc.target/i386/avx-vminss-1.c: Likewise. + * gcc.target/i386/avx-vmovapd-1.c: Likewise. + * gcc.target/i386/avx-vmovapd-256-1.c: Likewise. + * gcc.target/i386/avx-vmovapd-256-2.c: Likewise. + * gcc.target/i386/avx-vmovapd-2.c: Likewise. + * gcc.target/i386/avx-vmovaps-1.c: Likewise. + * gcc.target/i386/avx-vmovaps-256-1.c: Likewise. + * gcc.target/i386/avx-vmovaps-256-2.c: Likewise. + * gcc.target/i386/avx-vmovaps-2.c: Likewise. + * gcc.target/i386/avx-vmovd-1.c: Likewise. + * gcc.target/i386/avx-vmovd-2.c: Likewise. + * gcc.target/i386/avx-vmovddup-1.c: Likewise. + * gcc.target/i386/avx-vmovddup-256-1.c: Likewise. + * gcc.target/i386/avx-vmovdqa-1.c: Likewise. + * gcc.target/i386/avx-vmovdqa-256-1.c: Likewise. + * gcc.target/i386/avx-vmovdqa-256-2.c: Likewise. + * gcc.target/i386/avx-vmovdqa-2.c: Likewise. + * gcc.target/i386/avx-vmovdqu-1.c: Likewise. + * gcc.target/i386/avx-vmovdqu-256-1.c: Likewise. + * gcc.target/i386/avx-vmovdqu-256-2.c: Likewise. + * gcc.target/i386/avx-vmovdqu-2.c: Likewise. + * gcc.target/i386/avx-vmovhlps-1.c: Likewise. + * gcc.target/i386/avx-vmovhpd-1.c: Likewise. + * gcc.target/i386/avx-vmovhpd-2.c: Likewise. + * gcc.target/i386/avx-vmovhps-1.c: Likewise. + * gcc.target/i386/avx-vmovhps-2.c: Likewise. + * gcc.target/i386/avx-vmovlhps-1.c: Likewise. + * gcc.target/i386/avx-vmovlpd-1.c: Likewise. + * gcc.target/i386/avx-vmovlpd-2.c: Likewise. + * gcc.target/i386/avx-vmovmskpd-1.c: Likewise. + * gcc.target/i386/avx-vmovmskpd-256-1.c: Likewise. + * gcc.target/i386/avx-vmovmskps-1.c: Likewise. + * gcc.target/i386/avx-vmovmskps-256-1.c: Likewise. + * gcc.target/i386/avx-vmovntdq-1.c: Likewise. + * gcc.target/i386/avx-vmovntdqa-1.c: Likewise. + * gcc.target/i386/avx-vmovntpd-1.c: Likewise. + * gcc.target/i386/avx-vmovntps-1.c: Likewise. + * gcc.target/i386/avx-vmovq-1.c: Likewise. + * gcc.target/i386/avx-vmovq-2.c: Likewise. + * gcc.target/i386/avx-vmovq-3.c: Likewise. + * gcc.target/i386/avx-vmovsd-1.c: Likewise. + * gcc.target/i386/avx-vmovsd-2.c: Likewise. + * gcc.target/i386/avx-vmovshdup-1.c: Likewise. + * gcc.target/i386/avx-vmovshdup-256-1.c: Likewise. + * gcc.target/i386/avx-vmovsldup-1.c: Likewise. + * gcc.target/i386/avx-vmovsldup-256-1.c: Likewise. + * gcc.target/i386/avx-vmovss-1.c: Likewise. + * gcc.target/i386/avx-vmovss-2.c: Likewise. + * gcc.target/i386/avx-vmovss-3.c: Likewise. + * gcc.target/i386/avx-vmovupd-1.c: Likewise. + * gcc.target/i386/avx-vmovupd-256-1.c: Likewise. + * gcc.target/i386/avx-vmovupd-256-2.c: Likewise. + * gcc.target/i386/avx-vmovupd-2.c: Likewise. + * gcc.target/i386/avx-vmovups-1.c: Likewise. + * gcc.target/i386/avx-vmovups-256-1.c: Likewise. + * gcc.target/i386/avx-vmovups-256-2.c: Likewise. + * gcc.target/i386/avx-vmovups-2.c: Likewise. + * gcc.target/i386/avx-vmpsadbw-1.c: Likewise. + * gcc.target/i386/avx-vmulpd-1.c: Likewise. + * gcc.target/i386/avx-vmulpd-256-1.c: Likewise. + * gcc.target/i386/avx-vmulps-1.c: Likewise. + * gcc.target/i386/avx-vmulps-256-1.c: Likewise. + * gcc.target/i386/avx-vmulsd-1.c: Likewise. + * gcc.target/i386/avx-vmulss-1.c: Likewise. + * gcc.target/i386/avx-vorpd-1.c: Likewise. + * gcc.target/i386/avx-vorpd-256-1.c: Likewise. + * gcc.target/i386/avx-vorps-1.c: Likewise. + * gcc.target/i386/avx-vorps-256-1.c: Likewise. + * gcc.target/i386/avx-vpabsb-1.c: Likewise. + * gcc.target/i386/avx-vpabsd-1.c: Likewise. + * gcc.target/i386/avx-vpabsw-1.c: Likewise. + * gcc.target/i386/avx-vpackssdw-1.c: Likewise. + * gcc.target/i386/avx-vpacksswb-1.c: Likewise. + * gcc.target/i386/avx-vpackusdw-1.c: Likewise. + * gcc.target/i386/avx-vpackuswb-1.c: Likewise. + * gcc.target/i386/avx-vpaddb-1.c: Likewise. + * gcc.target/i386/avx-vpaddd-1.c: Likewise. + * gcc.target/i386/avx-vpaddq-1.c: Likewise. + * gcc.target/i386/avx-vpaddsb-1.c: Likewise. + * gcc.target/i386/avx-vpaddsw-1.c: Likewise. + * gcc.target/i386/avx-vpaddusb-1.c: Likewise. + * gcc.target/i386/avx-vpaddusw-1.c: Likewise. + * gcc.target/i386/avx-vpaddw-1.c: Likewise. + * gcc.target/i386/avx-vpalignr-1.c: Likewise. + * gcc.target/i386/avx-vpand-1.c: Likewise. + * gcc.target/i386/avx-vpandn-1.c: Likewise. + * gcc.target/i386/avx-vpavgb-1.c: Likewise. + * gcc.target/i386/avx-vpavgw-1.c: Likewise. + * gcc.target/i386/avx-vpblendvb-1.c: Likewise. + * gcc.target/i386/avx-vpblendw-1.c: Likewise. + * gcc.target/i386/avx-vpcmpeqb-1.c: Likewise. + * gcc.target/i386/avx-vpcmpeqd-1.c: Likewise. + * gcc.target/i386/avx-vpcmpeqq-1.c: Likewise. + * gcc.target/i386/avx-vpcmpeqw-1.c: Likewise. + * gcc.target/i386/avx-vpcmpestri-1.c: Likewise. + * gcc.target/i386/avx-vpcmpestri-2.c: Likewise. + * gcc.target/i386/avx-vpcmpestrm-1.c: Likewise. + * gcc.target/i386/avx-vpcmpestrm-2.c: Likewise. + * gcc.target/i386/avx-vpcmpgtb-1.c: Likewise. + * gcc.target/i386/avx-vpcmpgtd-1.c: Likewise. + * gcc.target/i386/avx-vpcmpgtq-1.c: Likewise. + * gcc.target/i386/avx-vpcmpgtw-1.c: Likewise. + * gcc.target/i386/avx-vpcmpistri-1.c: Likewise. + * gcc.target/i386/avx-vpcmpistri-2.c: Likewise. + * gcc.target/i386/avx-vpcmpistrm-1.c: Likewise. + * gcc.target/i386/avx-vpcmpistrm-2.c: Likewise. + * gcc.target/i386/avx-vperm2f128-256-1.c: Likewise. + * gcc.target/i386/avx-vperm2f128-256-2.c: Likewise. + * gcc.target/i386/avx-vperm2f128-256-3.c: Likewise. + * gcc.target/i386/avx-vpermil2pd-1.c: Likewise. + * gcc.target/i386/avx-vpermil2pd-256-1.c: Likewise. + * gcc.target/i386/avx-vpermil2ps-1.c: Likewise. + * gcc.target/i386/avx-vpermil2ps-256-1.c: Likewise. + * gcc.target/i386/avx-vpermilpd-1.c: Likewise. + * gcc.target/i386/avx-vpermilpd-256-1.c: Likewise. + * gcc.target/i386/avx-vpermilpd-256-2.c: Likewise. + * gcc.target/i386/avx-vpermilpd-2.c: Likewise. + * gcc.target/i386/avx-vpermilps-1.c: Likewise. + * gcc.target/i386/avx-vpermilps-256-1.c: Likewise. + * gcc.target/i386/avx-vpermilps-256-2.c: Likewise. + * gcc.target/i386/avx-vpermilps-2.c: Likewise. + * gcc.target/i386/avx-vpextrb-1.c: Likewise. + * gcc.target/i386/avx-vpextrd-1.c: Likewise. + * gcc.target/i386/avx-vpextrq-1.c: Likewise. + * gcc.target/i386/avx-vpextrw-1.c: Likewise. + * gcc.target/i386/avx-vphaddd-1.c: Likewise. + * gcc.target/i386/avx-vphaddsw-1.c: Likewise. + * gcc.target/i386/avx-vphaddw-1.c: Likewise. + * gcc.target/i386/avx-vphminposuw-1.c: Likewise. + * gcc.target/i386/avx-vphsubd-1.c: Likewise. + * gcc.target/i386/avx-vphsubsw-1.c: Likewise. + * gcc.target/i386/avx-vphsubw-1.c: Likewise. + * gcc.target/i386/avx-vpinsrb-1.c: Likewise. + * gcc.target/i386/avx-vpinsrd-1.c: Likewise. + * gcc.target/i386/avx-vpinsrq-1.c: Likewise. + * gcc.target/i386/avx-vpmaddubsw-1.c: Likewise. + * gcc.target/i386/avx-vpmaxsb-1.c: Likewise. + * gcc.target/i386/avx-vpmaxsd-1.c: Likewise. + * gcc.target/i386/avx-vpmaxsw-1.c: Likewise. + * gcc.target/i386/avx-vpmaxub-1.c: Likewise. + * gcc.target/i386/avx-vpmaxud-1.c: Likewise. + * gcc.target/i386/avx-vpmaxuw-1.c: Likewise. + * gcc.target/i386/avx-vpminsb-1.c: Likewise. + * gcc.target/i386/avx-vpminsd-1.c: Likewise. + * gcc.target/i386/avx-vpminsw-1.c: Likewise. + * gcc.target/i386/avx-vpminub-1.c: Likewise. + * gcc.target/i386/avx-vpminud-1.c: Likewise. + * gcc.target/i386/avx-vpminuw-1.c: Likewise. + * gcc.target/i386/avx-vpmovmskb-1.c: Likewise. + * gcc.target/i386/avx-vpmovsxbd-1.c: Likewise. + * gcc.target/i386/avx-vpmovsxbq-1.c: Likewise. + * gcc.target/i386/avx-vpmovsxbw-1.c: Likewise. + * gcc.target/i386/avx-vpmovsxdq-1.c: Likewise. + * gcc.target/i386/avx-vpmovsxwd-1.c: Likewise. + * gcc.target/i386/avx-vpmovsxwq-1.c: Likewise. + * gcc.target/i386/avx-vpmovzxbd-1.c: Likewise. + * gcc.target/i386/avx-vpmovzxbq-1.c: Likewise. + * gcc.target/i386/avx-vpmovzxbw-1.c: Likewise. + * gcc.target/i386/avx-vpmovzxdq-1.c: Likewise. + * gcc.target/i386/avx-vpmovzxwd-1.c: Likewise. + * gcc.target/i386/avx-vpmovzxwq-1.c: Likewise. + * gcc.target/i386/avx-vpmuldq-1.c: Likewise. + * gcc.target/i386/avx-vpmulhrsw-1.c: Likewise. + * gcc.target/i386/avx-vpmulhuw-1.c: Likewise. + * gcc.target/i386/avx-vpmulhw-1.c: Likewise. + * gcc.target/i386/avx-vpmulld-1.c: Likewise. + * gcc.target/i386/avx-vpmullw-1.c: Likewise. + * gcc.target/i386/avx-vpmuludq-1.c: Likewise. + * gcc.target/i386/avx-vpor-1.c: Likewise. + * gcc.target/i386/avx-vpsadbw-1.c: Likewise. + * gcc.target/i386/avx-vpshufb-1.c: Likewise. + * gcc.target/i386/avx-vpshufd-1.c: Likewise. + * gcc.target/i386/avx-vpshufhw-1.c: Likewise. + * gcc.target/i386/avx-vpshuflw-1.c: Likewise. + * gcc.target/i386/avx-vpsignb-1.c: Likewise. + * gcc.target/i386/avx-vpsignd-1.c: Likewise. + * gcc.target/i386/avx-vpsignw-1.c: Likewise. + * gcc.target/i386/avx-vpslld-1.c: Likewise. + * gcc.target/i386/avx-vpslld-2.c: Likewise. + * gcc.target/i386/avx-vpslldq-1.c: Likewise. + * gcc.target/i386/avx-vpsllq-1.c: Likewise. + * gcc.target/i386/avx-vpsllq-2.c: Likewise. + * gcc.target/i386/avx-vpsllw-1.c: Likewise. + * gcc.target/i386/avx-vpsllw-2.c: Likewise. + * gcc.target/i386/avx-vpsrad-1.c: Likewise. + * gcc.target/i386/avx-vpsrad-2.c: Likewise. + * gcc.target/i386/avx-vpsraw-1.c: Likewise. + * gcc.target/i386/avx-vpsraw-2.c: Likewise. + * gcc.target/i386/avx-vpsrld-1.c: Likewise. + * gcc.target/i386/avx-vpsrld-2.c: Likewise. + * gcc.target/i386/avx-vpsrldq-1.c: Likewise. + * gcc.target/i386/avx-vpsrlq-1.c: Likewise. + * gcc.target/i386/avx-vpsrlq-2.c: Likewise. + * gcc.target/i386/avx-vpsrlw-1.c: Likewise. + * gcc.target/i386/avx-vpsrlw-2.c: Likewise. + * gcc.target/i386/avx-vpsubb-1.c: Likewise. + * gcc.target/i386/avx-vpsubd-1.c: Likewise. + * gcc.target/i386/avx-vpsubq-1.c: Likewise. + * gcc.target/i386/avx-vpsubsb-1.c: Likewise. + * gcc.target/i386/avx-vpsubsw-1.c: Likewise. + * gcc.target/i386/avx-vpsubw-1.c: Likewise. + * gcc.target/i386/avx-vptest-1.c: Likewise. + * gcc.target/i386/avx-vptest-256-1.c: Likewise. + * gcc.target/i386/avx-vptest-256-2.c: Likewise. + * gcc.target/i386/avx-vptest-256-3.c: Likewise. + * gcc.target/i386/avx-vptest-2.c: Likewise. + * gcc.target/i386/avx-vptest-3.c: Likewise. + * gcc.target/i386/avx-vpunpckhbw-1.c: Likewise. + * gcc.target/i386/avx-vpunpckhdq-1.c: Likewise. + * gcc.target/i386/avx-vpunpckhqdq-1.c: Likewise. + * gcc.target/i386/avx-vpunpckhwd-1.c: Likewise. + * gcc.target/i386/avx-vpunpcklbw-1.c: Likewise. + * gcc.target/i386/avx-vpunpckldq-1.c: Likewise. + * gcc.target/i386/avx-vpunpcklqdq-1.c: Likewise. + * gcc.target/i386/avx-vpunpcklwd-1.c: Likewise. + * gcc.target/i386/avx-vpxor-1.c: Likewise. + * gcc.target/i386/avx-vrcpps-1.c: Likewise. + * gcc.target/i386/avx-vrcpps-256-1.c: Likewise. + * gcc.target/i386/avx-vroundpd-1.c: Likewise. + * gcc.target/i386/avx-vroundpd-256-1.c: Likewise. + * gcc.target/i386/avx-vroundpd-256-2.c: Likewise. + * gcc.target/i386/avx-vroundpd-256-3.c: Likewise. + * gcc.target/i386/avx-vroundpd-2.c: Likewise. + * gcc.target/i386/avx-vroundpd-3.c: Likewise. + * gcc.target/i386/avx-vroundps-256-1.c: Likewise. + * gcc.target/i386/avx-vrsqrtps-1.c: Likewise. + * gcc.target/i386/avx-vrsqrtps-256-1.c: Likewise. + * gcc.target/i386/avx-vshufpd-1.c: Likewise. + * gcc.target/i386/avx-vshufpd-256-1.c: Likewise. + * gcc.target/i386/avx-vshufps-1.c: Likewise. + * gcc.target/i386/avx-vshufps-256-1.c: Likewise. + * gcc.target/i386/avx-vsqrtpd-1.c: Likewise. + * gcc.target/i386/avx-vsqrtpd-256-1.c: Likewise. + * gcc.target/i386/avx-vsqrtps-1.c: Likewise. + * gcc.target/i386/avx-vsqrtps-256-1.c: Likewise. + * gcc.target/i386/avx-vsubpd-1.c: Likewise. + * gcc.target/i386/avx-vsubpd-256-1.c: Likewise. + * gcc.target/i386/avx-vsubps-1.c: Likewise. + * gcc.target/i386/avx-vsubps-256-1.c: Likewise. + * gcc.target/i386/avx-vsubsd-1.c: Likewise. + * gcc.target/i386/avx-vsubss-1.c: Likewise. + * gcc.target/i386/avx-vtestpd-1.c: Likewise. + * gcc.target/i386/avx-vtestpd-256-1.c: Likewise. + * gcc.target/i386/avx-vtestpd-256-2.c: Likewise. + * gcc.target/i386/avx-vtestpd-256-3.c: Likewise. + * gcc.target/i386/avx-vtestpd-2.c: Likewise. + * gcc.target/i386/avx-vtestpd-3.c: Likewise. + * gcc.target/i386/avx-vtestps-1.c: Likewise. + * gcc.target/i386/avx-vtestps-256-1.c: Likewise. + * gcc.target/i386/avx-vtestps-256-2.c: Likewise. + * gcc.target/i386/avx-vtestps-256-3.c: Likewise. + * gcc.target/i386/avx-vtestps-2.c: Likewise. + * gcc.target/i386/avx-vtestps-3.c: Likewise. + * gcc.target/i386/avx-vucomisd-1.c: Likewise. + * gcc.target/i386/avx-vucomisd-2.c: Likewise. + * gcc.target/i386/avx-vucomisd-3.c: Likewise. + * gcc.target/i386/avx-vucomisd-4.c: Likewise. + * gcc.target/i386/avx-vucomisd-5.c: Likewise. + * gcc.target/i386/avx-vucomisd-6.c: Likewise. + * gcc.target/i386/avx-vucomiss-1.c: Likewise. + * gcc.target/i386/avx-vucomiss-2.c: Likewise. + * gcc.target/i386/avx-vucomiss-3.c: Likewise. + * gcc.target/i386/avx-vucomiss-4.c: Likewise. + * gcc.target/i386/avx-vucomiss-5.c: Likewise. + * gcc.target/i386/avx-vucomiss-6.c: Likewise. + * gcc.target/i386/avx-vunpckhpd-1.c: Likewise. + * gcc.target/i386/avx-vunpckhpd-256-1.c: Likewise. + * gcc.target/i386/avx-vunpckhps-1.c: Likewise. + * gcc.target/i386/avx-vunpckhps-256-1.c: Likewise. + * gcc.target/i386/avx-vunpcklpd-1.c: Likewise. + * gcc.target/i386/avx-vunpcklpd-256-1.c: Likewise. + * gcc.target/i386/avx-vunpcklps-1.c: Likewise. + * gcc.target/i386/avx-vunpcklps-256-1.c: Likewise. + * gcc.target/i386/avx-vxorpd-1.c: Likewise. + * gcc.target/i386/avx-vxorpd-256-1.c: Likewise. + * gcc.target/i386/avx-vxorps-1.c: Likewise. + * gcc.target/i386/avx-vxorps-256-1.c: Likewise. + * gcc.target/i386/avx-vzeroall-1.c: Likewise. + * gcc.target/i386/avx-vzeroall-2.c: Likewise. + * gcc.target/i386/avx-vzeroupper-1.c: Likewise. + * gcc.target/i386/avx-vzeroupper-2.c: Likewise. + * gcc.target/i386/m256-1.c: Likewise. + * gcc.target/i386/m256-2.c: Likewise. + * gcc.target/i386/m256-check.h: Likewise. + * gcc.target/i386/sse2-addpd-1.c: Likewise. + * gcc.target/i386/sse2-addsd-1.c: Likewise. + * gcc.target/i386/sse2-andnpd-1.c: Likewise. + * gcc.target/i386/sse2-andpd-1.c: Likewise. + * gcc.target/i386/sse2-comisd-1.c: Likewise. + * gcc.target/i386/sse2-comisd-2.c: Likewise. + * gcc.target/i386/sse2-comisd-3.c: Likewise. + * gcc.target/i386/sse2-comisd-4.c: Likewise. + * gcc.target/i386/sse2-comisd-5.c: Likewise. + * gcc.target/i386/sse2-comisd-6.c: Likewise. + * gcc.target/i386/sse2-cvtdq2pd-1.c: Likewise. + * gcc.target/i386/sse2-cvtdq2ps-1.c: Likewise. + * gcc.target/i386/sse2-cvtpd2dq-1.c: Likewise. + * gcc.target/i386/sse2-cvtpd2ps-1.c: Likewise. + * gcc.target/i386/sse2-cvtps2dq-1.c: Likewise. + * gcc.target/i386/sse2-cvtps2pd-1.c: Likewise. + * gcc.target/i386/sse2-cvtsd2si-1.c: Likewise. + * gcc.target/i386/sse2-cvtsd2si-2.c: Likewise. + * gcc.target/i386/sse2-cvtsd2ss-1.c: Likewise. + * gcc.target/i386/sse2-cvtsi2sd-1.c: Likewise. + * gcc.target/i386/sse2-cvtsi2sd-2.c: Likewise. + * gcc.target/i386/sse2-cvtss2sd-1.c: Likewise. + * gcc.target/i386/sse2-cvttpd2dq-1.c: Likewise. + * gcc.target/i386/sse2-cvttps2dq-1.c: Likewise. + * gcc.target/i386/sse2-cvttsd2si-1.c: Likewise. + * gcc.target/i386/sse2-cvttsd2si-2.c: Likewise. + * gcc.target/i386/sse2-divpd-1.c: Likewise. + * gcc.target/i386/sse2-divsd-1.c: Likewise. + * gcc.target/i386/sse2-maxpd-1.c: Likewise. + * gcc.target/i386/sse2-maxsd-1.c: Likewise. + * gcc.target/i386/sse2-minpd-1.c: Likewise. + * gcc.target/i386/sse2-minsd-1.c: Likewise. + * gcc.target/i386/sse2-movapd-1.c: Likewise. + * gcc.target/i386/sse2-movapd-2.c: Likewise. + * gcc.target/i386/sse2-movd-1.c: Likewise. + * gcc.target/i386/sse2-movd-2.c: Likewise. + * gcc.target/i386/sse2-movdqa-1.c: Likewise. + * gcc.target/i386/sse2-movdqa-2.c: Likewise. + * gcc.target/i386/sse2-movdqu-1.c: Likewise. + * gcc.target/i386/sse2-movdqu-2.c: Likewise. + * gcc.target/i386/sse2-movhpd-1.c: Likewise. + * gcc.target/i386/sse2-movhpd-2.c: Likewise. + * gcc.target/i386/sse2-movlpd-1.c: Likewise. + * gcc.target/i386/sse2-movlpd-2.c: Likewise. + * gcc.target/i386/sse2-movmskpd-1.c: Likewise. + * gcc.target/i386/sse2-movntdq-1.c: Likewise. + * gcc.target/i386/sse2-movntpd-1.c: Likewise. + * gcc.target/i386/sse2-movq-1.c: Likewise. + * gcc.target/i386/sse2-movq-2.c: Likewise. + * gcc.target/i386/sse2-movq-3.c: Likewise. + * gcc.target/i386/sse2-movsd-1.c: Likewise. + * gcc.target/i386/sse2-movsd-2.c: Likewise. + * gcc.target/i386/sse2-movupd-1.c: Likewise. + * gcc.target/i386/sse2-movupd-2.c: Likewise. + * gcc.target/i386/sse2-mulpd-1.c: Likewise. + * gcc.target/i386/sse2-mulsd-1.c: Likewise. + * gcc.target/i386/sse2-orpd-1.c: Likewise. + * gcc.target/i386/sse2-packssdw-1.c: Likewise. + * gcc.target/i386/sse2-packsswb-1.c: Likewise. + * gcc.target/i386/sse2-packuswb-1.c: Likewise. + * gcc.target/i386/sse2-paddb-1.c: Likewise. + * gcc.target/i386/sse2-paddd-1.c: Likewise. + * gcc.target/i386/sse2-paddq-1.c: Likewise. + * gcc.target/i386/sse2-paddsb-1.c: Likewise. + * gcc.target/i386/sse2-paddsw-1.c: Likewise. + * gcc.target/i386/sse2-paddusb-1.c: Likewise. + * gcc.target/i386/sse2-paddusw-1.c: Likewise. + * gcc.target/i386/sse2-paddw-1.c: Likewise. + * gcc.target/i386/sse2-pand-1.c: Likewise. + * gcc.target/i386/sse2-pandn-1.c: Likewise. + * gcc.target/i386/sse2-pavgb-1.c: Likewise. + * gcc.target/i386/sse2-pavgw-1.c: Likewise. + * gcc.target/i386/sse2-pcmpeqb-1.c: Likewise. + * gcc.target/i386/sse2-pcmpeqd-1.c: Likewise. + * gcc.target/i386/sse2-pcmpeqw-1.c: Likewise. + * gcc.target/i386/sse2-pcmpgtb-1.c: Likewise. + * gcc.target/i386/sse2-pcmpgtd-1.c: Likewise. + * gcc.target/i386/sse2-pcmpgtw-1.c: Likewise. + * gcc.target/i386/sse2-pmaddwd-1.c: Likewise. + * gcc.target/i386/sse2-pmaxsw-1.c: Likewise. + * gcc.target/i386/sse2-pmaxub-1.c: Likewise. + * gcc.target/i386/sse2-pminsw-1.c: Likewise. + * gcc.target/i386/sse2-pminub-1.c: Likewise. + * gcc.target/i386/sse2-pmovmskb-1.c: Likewise. + * gcc.target/i386/sse2-pmulhuw-1.c: Likewise. + * gcc.target/i386/sse2-pmulhw-1.c: Likewise. + * gcc.target/i386/sse2-pmullw-1.c: Likewise. + * gcc.target/i386/sse2-pmuludq-1.c: Likewise. + * gcc.target/i386/sse2-por-1.c: Likewise. + * gcc.target/i386/sse2-psadbw-1.c: Likewise. + * gcc.target/i386/sse2-pshufd-1.c: Likewise. + * gcc.target/i386/sse2-pshufhw-1.c: Likewise. + * gcc.target/i386/sse2-pshuflw-1.c: Likewise. + * gcc.target/i386/sse2-pslld-1.c: Likewise. + * gcc.target/i386/sse2-pslld-2.c: Likewise. + * gcc.target/i386/sse2-pslldq-1.c: Likewise. + * gcc.target/i386/sse2-psllq-1.c: Likewise. + * gcc.target/i386/sse2-psllq-2.c: Likewise. + * gcc.target/i386/sse2-psllw-1.c: Likewise. + * gcc.target/i386/sse2-psllw-2.c: Likewise. + * gcc.target/i386/sse2-psrad-1.c: Likewise. + * gcc.target/i386/sse2-psrad-2.c: Likewise. + * gcc.target/i386/sse2-psraw-1.c: Likewise. + * gcc.target/i386/sse2-psraw-2.c: Likewise. + * gcc.target/i386/sse2-psrld-1.c: Likewise. + * gcc.target/i386/sse2-psrld-2.c: Likewise. + * gcc.target/i386/sse2-psrldq-1.c: Likewise. + * gcc.target/i386/sse2-psrlq-1.c: Likewise. + * gcc.target/i386/sse2-psrlq-2.c: Likewise. + * gcc.target/i386/sse2-psrlw-1.c: Likewise. + * gcc.target/i386/sse2-psrlw-2.c: Likewise. + * gcc.target/i386/sse2-psubb-1.c: Likewise. + * gcc.target/i386/sse2-psubd-1.c: Likewise. + * gcc.target/i386/sse2-psubq-1.c: Likewise. + * gcc.target/i386/sse2-psubsb-1.c: Likewise. + * gcc.target/i386/sse2-psubsw-1.c: Likewise. + * gcc.target/i386/sse2-psubw-1.c: Likewise. + * gcc.target/i386/sse2-punpckhbw-1.c: Likewise. + * gcc.target/i386/sse2-punpckhdq-1.c: Likewise. + * gcc.target/i386/sse2-punpckhqdq-1.c: Likewise. + * gcc.target/i386/sse2-punpckhwd-1.c: Likewise. + * gcc.target/i386/sse2-punpcklbw-1.c: Likewise. + * gcc.target/i386/sse2-punpckldq-1.c: Likewise. + * gcc.target/i386/sse2-punpcklqdq-1.c: Likewise. + * gcc.target/i386/sse2-punpcklwd-1.c: Likewise. + * gcc.target/i386/sse2-pxor-1.c: Likewise. + * gcc.target/i386/sse2-shufpd-1.c: Likewise. + * gcc.target/i386/sse2-shufps-1.c: Likewise. + * gcc.target/i386/sse2-sqrtpd-1.c: Likewise. + * gcc.target/i386/sse2-subpd-1.c: Likewise. + * gcc.target/i386/sse2-subsd-1.c: Likewise. + * gcc.target/i386/sse2-ucomisd-1.c: Likewise. + * gcc.target/i386/sse2-ucomisd-2.c: Likewise. + * gcc.target/i386/sse2-ucomisd-3.c: Likewise. + * gcc.target/i386/sse2-ucomisd-4.c: Likewise. + * gcc.target/i386/sse2-ucomisd-5.c: Likewise. + * gcc.target/i386/sse2-ucomisd-6.c: Likewise. + * gcc.target/i386/sse2-unpckhpd-1.c: Likewise. + * gcc.target/i386/sse2-unpcklpd-1.c: Likewise. + * gcc.target/i386/sse2-xorpd-1.c: Likewise. + * gcc.target/i386/sse-addps-1.c: Likewise. + * gcc.target/i386/sse-addss-1.c: Likewise. + * gcc.target/i386/sse-andnps-1.c: Likewise. + * gcc.target/i386/sse-andps-1.c: Likewise. + * gcc.target/i386/sse-comiss-1.c: Likewise. + * gcc.target/i386/sse-comiss-2.c: Likewise. + * gcc.target/i386/sse-comiss-3.c: Likewise. + * gcc.target/i386/sse-comiss-4.c: Likewise. + * gcc.target/i386/sse-comiss-5.c: Likewise. + * gcc.target/i386/sse-comiss-6.c: Likewise. + * gcc.target/i386/sse-cvtsi2ss-1.c: Likewise. + * gcc.target/i386/sse-cvtsi2ss-2.c: Likewise. + * gcc.target/i386/sse-cvtss2si-1.c: Likewise. + * gcc.target/i386/sse-cvtss2si-2.c: Likewise. + * gcc.target/i386/sse-cvttss2si-1.c: Likewise. + * gcc.target/i386/sse-cvttss2si-2.c: Likewise. + * gcc.target/i386/sse-divps-1.c: Likewise. + * gcc.target/i386/sse-divss-1.c: Likewise. + * gcc.target/i386/sse-maxps-1.c: Likewise. + * gcc.target/i386/sse-maxss-1.c: Likewise. + * gcc.target/i386/sse-minps-1.c: Likewise. + * gcc.target/i386/sse-minss-1.c: Likewise. + * gcc.target/i386/sse-movaps-1.c: Likewise. + * gcc.target/i386/sse-movaps-2.c: Likewise. + * gcc.target/i386/sse-movhlps-1.c: Likewise. + * gcc.target/i386/sse-movhps-1.c: Likewise. + * gcc.target/i386/sse-movhps-2.c: Likewise. + * gcc.target/i386/sse-movlhps-1.c: Likewise. + * gcc.target/i386/sse-movmskps-1.c: Likewise. + * gcc.target/i386/sse-movntps-1.c: Likewise. + * gcc.target/i386/sse-movss-1.c: Likewise. + * gcc.target/i386/sse-movss-2.c: Likewise. + * gcc.target/i386/sse-movss-3.c: Likewise. + * gcc.target/i386/sse-movups-1.c: Likewise. + * gcc.target/i386/sse-movups-2.c: Likewise. + * gcc.target/i386/sse-mulps-1.c: Likewise. + * gcc.target/i386/sse-mulss-1.c: Likewise. + * gcc.target/i386/sse-orps-1.c: Likewise. + * gcc.target/i386/sse-rcpps-1.c: Likewise. + * gcc.target/i386/sse-rsqrtps-1.c: Likewise. + * gcc.target/i386/sse-sqrtps-1.c: Likewise. + * gcc.target/i386/sse-subps-1.c: Likewise. + * gcc.target/i386/sse-subss-1.c: Likewise. + * gcc.target/i386/sse-ucomiss-1.c: Likewise. + * gcc.target/i386/sse-ucomiss-2.c: Likewise. + * gcc.target/i386/sse-ucomiss-3.c: Likewise. + * gcc.target/i386/sse-ucomiss-4.c: Likewise. + * gcc.target/i386/sse-ucomiss-5.c: Likewise. + * gcc.target/i386/sse-ucomiss-6.c: Likewise. + * gcc.target/i386/sse-unpckhps-1.c: Likewise. + * gcc.target/i386/sse-unpcklps-1.c: Likewise. + * gcc.target/i386/sse-xorps-1.c: Likewise. + * gcc.target/i386/vararg-10.c: Likewise. + * gcc.target/i386/vararg-3.c: Likewise. + * gcc.target/i386/vararg-4.c: Likewise. + * gcc.target/i386/vararg-5.c: Likewise. + * gcc.target/i386/vararg-6.c: Likewise. + * gcc.target/i386/vararg-7.c: Likewise. + * gcc.target/i386/vararg-8.c: Likewise. + * gcc.target/i386/vararg-9.c: Likewise. + * g++.dg/other/i386-5.C: Likewise. + * g++.dg/other/i386-6.C: Likewise. + + * gcc.target/i386/aesdec.c (CHECK_H): New. + (TEST): New. + Include CHECK_H instead of "XXX-check.h" and run TEST + instead of XXX_test. + * gcc.target/i386/aesdeclast.c: Likewise. + * gcc.target/i386/aesenc.c: Likewise. + * gcc.target/i386/aesenclast.c: Likewise. + * gcc.target/i386/aesimc.c: Likewise. + * gcc.target/i386/aeskeygenassist.c: Likewise. + * gcc.target/i386/sse3-addsubpd.c: Likewise. + * gcc.target/i386/sse3-addsubps.c: Likewise. + * gcc.target/i386/sse3-haddpd.c: Likewise. + * gcc.target/i386/sse3-haddps.c: Likewise. + * gcc.target/i386/sse3-hsubpd.c: Likewise. + * gcc.target/i386/sse3-hsubps.c: Likewise. + * gcc.target/i386/sse3-lddqu.c: Likewise. + * gcc.target/i386/sse3-movddup.c: Likewise. + * gcc.target/i386/sse3-movshdup.c: Likewise. + * gcc.target/i386/sse3-movsldup.c: Likewise. + * gcc.target/i386/sse4_1-blendpd.c: Likewise. + * gcc.target/i386/sse4_1-blendps.c: Likewise. + * gcc.target/i386/sse4_1-dppd-1.c: Likewise. + * gcc.target/i386/sse4_1-dppd-2.c: Likewise. + * gcc.target/i386/sse4_1-dpps-1.c: Likewise. + * gcc.target/i386/sse4_1-dpps-2.c: Likewise. + * gcc.target/i386/sse4_1-extractps.c: Likewise. + * gcc.target/i386/sse4_1-insertps-1.c: Likewise. + * gcc.target/i386/sse4_1-insertps-2.c: Likewise. + * gcc.target/i386/sse4_1-movntdqa.c: Likewise. + * gcc.target/i386/sse4_1-mpsadbw.c: Likewise. + * gcc.target/i386/sse4_1-packusdw.c: Likewise. + * gcc.target/i386/sse4_1-pblendvb.c: Likewise. + * gcc.target/i386/sse4_1-pblendw.c: Likewise. + * gcc.target/i386/sse4_1-pcmpeqq.c: Likewise. + * gcc.target/i386/sse4_1-pextrb.c: Likewise. + * gcc.target/i386/sse4_1-pextrd.c: Likewise. + * gcc.target/i386/sse4_1-pextrq.c: Likewise. + * gcc.target/i386/sse4_1-pextrw.c: Likewise. + * gcc.target/i386/sse4_1-phminposuw.c: Likewise. + * gcc.target/i386/sse4_1-pinsrb.c: Likewise. + * gcc.target/i386/sse4_1-pinsrd.c: Likewise. + * gcc.target/i386/sse4_1-pinsrq.c: Likewise. + * gcc.target/i386/sse4_1-pmaxsb.c: Likewise. + * gcc.target/i386/sse4_1-pmaxsd.c: Likewise. + * gcc.target/i386/sse4_1-pmaxud.c: Likewise. + * gcc.target/i386/sse4_1-pmaxuw.c: Likewise. + * gcc.target/i386/sse4_1-pminsb.c: Likewise. + * gcc.target/i386/sse4_1-pminsd.c: Likewise. + * gcc.target/i386/sse4_1-pminud.c: Likewise. + * gcc.target/i386/sse4_1-pminuw.c: Likewise. + * gcc.target/i386/sse4_1-pmovsxbd.c: Likewise. + * gcc.target/i386/sse4_1-pmovsxbq.c: Likewise. + * gcc.target/i386/sse4_1-pmovsxbw.c: Likewise. + * gcc.target/i386/sse4_1-pmovsxdq.c: Likewise. + * gcc.target/i386/sse4_1-pmovsxwd.c: Likewise. + * gcc.target/i386/sse4_1-pmovsxwq.c: Likewise. + * gcc.target/i386/sse4_1-pmovzxbd.c: Likewise. + * gcc.target/i386/sse4_1-pmovzxbq.c: Likewise. + * gcc.target/i386/sse4_1-pmovzxbw.c: Likewise. + * gcc.target/i386/sse4_1-pmovzxdq.c: Likewise. + * gcc.target/i386/sse4_1-pmovzxwd.c: Likewise. + * gcc.target/i386/sse4_1-pmovzxwq.c: Likewise. + * gcc.target/i386/sse4_1-pmuldq.c: Likewise. + * gcc.target/i386/sse4_1-pmulld.c: Likewise. + * gcc.target/i386/sse4_1-ptest-1.c: Likewise. + * gcc.target/i386/sse4_1-ptest-2.c: Likewise. + * gcc.target/i386/sse4_1-ptest-3.c: Likewise. + * gcc.target/i386/sse4_1-roundpd-1.c: Likewise. + * gcc.target/i386/sse4_1-roundpd-2.c: Likewise. + * gcc.target/i386/sse4_1-roundpd-3.c: Likewise. + * gcc.target/i386/sse4_2-pcmpestri-1.c: Likewise. + * gcc.target/i386/sse4_2-pcmpestri-2.c: Likewise. + * gcc.target/i386/sse4_2-pcmpestrm-1.c: Likewise. + * gcc.target/i386/sse4_2-pcmpestrm-2.c: Likewise. + * gcc.target/i386/sse4_2-pcmpgtq.c: Likewise. + * gcc.target/i386/sse4_2-pcmpistri-1.c: Likewise. + * gcc.target/i386/sse4_2-pcmpistri-2.c: Likewise. + * gcc.target/i386/sse4_2-pcmpistrm-1.c: Likewise. + * gcc.target/i386/sse4_2-pcmpistrm-2.c: Likewise. + * gcc.target/i386/ssse3-pabsb.c: Likewise. Don't run MMX + tests for AVX. + * gcc.target/i386/ssse3-pabsd.c: Likewise. + * gcc.target/i386/ssse3-pabsw.c: Likewise. + * gcc.target/i386/ssse3-palignr.c: Likewise. + * gcc.target/i386/ssse3-phaddd.c: Likewise. + * gcc.target/i386/ssse3-phaddsw.c: Likewise. + * gcc.target/i386/ssse3-phaddw.c: Likewise. + * gcc.target/i386/ssse3-phsubd.c: Likewise. + * gcc.target/i386/ssse3-phsubsw.c: Likewise. + * gcc.target/i386/ssse3-phsubw.c: Likewise. + * gcc.target/i386/ssse3-pmaddubsw.c: Likewise. + * gcc.target/i386/ssse3-pmulhrsw.c: Likewise. + * gcc.target/i386/ssse3-pshufb.c: Likewise. + * gcc.target/i386/ssse3-psignb.c: Likewise. + * gcc.target/i386/ssse3-psignd.c: Likewise. + * gcc.target/i386/ssse3-psignw.c: Likewise. + + * gcc.target/i386/i386.exp (check_effective_target_vaes): New. + + * gcc.target/i386/m128-check.h: Include . Include + for SSE2. + (union128i_b): Defined only for SSE2. + (union128i_w): Likewise. + (union128i_d): Likewise. + (union128i_q): Likewise. + (union128d): Likewise. + (check_union128i_b): Likewise. + (check_union128i_w): Likewise. + (check_union128i_d): Likewise. + (check_union128i_q): Likewise. + (check_union128d): Likewise. + (union128i_ub): New. + (union128i_uw): Likewise. + (check_union128i_ub): Likewise. + (check_union128i_uw): Likewise. + (ESP_FLOAT): Likewise. + (ESP_DOUBLE): Likewise. + (CHECK_ARRAY): Likewise. + (checkVd): Likewise. + (checkVf): Likewise. + (ieee754_float): Likewise. + (ieee754_double): Likewise. + + * gcc.target/i386/sse-check.h: Include "m128-check.h". + + * gcc.target/x86_64/abi/abi-x86_64.exp: Replace asm-support.s + with asm-support.S. + + * gcc.target/x86_64/abi/asm-support.s: Renamed to ... + * gcc.target/x86_64/abi/asm-support.S: This. Add + ".sse_check none" if __AVX__ is defined. + + * lib/target-supports.exp (check_effective_target_avx): New. + 2008-08-28 Manuel Lopez-Ibanez PR c/30949 diff --git a/gcc/testsuite/g++.dg/other/i386-5.C b/gcc/testsuite/g++.dg/other/i386-5.C new file mode 100644 index 0000000..2556e7e --- /dev/null +++ b/gcc/testsuite/g++.dg/other/i386-5.C @@ -0,0 +1,9 @@ +/* Test that {,x,e,p,t,s,w,g,a,b}mmintrin.h, mm3dnow.h and mm_malloc.h are + usable with -O -fkeep-inline-functions. */ +/* { dg-do compile { target i?86-*-* x86_64-*-* } } */ +/* { dg-options "-O -fkeep-inline-functions -march=k8 -m3dnow -maes -mpclmul -mavx -msse5" } */ + +#include +#include +#include +#include diff --git a/gcc/testsuite/g++.dg/other/i386-6.C b/gcc/testsuite/g++.dg/other/i386-6.C new file mode 100644 index 0000000..905ac97 --- /dev/null +++ b/gcc/testsuite/g++.dg/other/i386-6.C @@ -0,0 +1,11 @@ +/* Test that {,x,e,p,t,s,w,g,a,b}mmintrin.h, mm3dnow.h and mm_malloc.h are + usable with -O -pedantic-errors. */ +/* { dg-do compile { target i?86-*-* x86_64-*-* } } */ +/* { dg-options "-O -pedantic-errors -march=k8 -m3dnow -mavx -msse5 -maes -mpclmul" } */ + +#include +#include +#include +#include + +int dummy; diff --git a/gcc/testsuite/gcc.dg/compat/vector-1b_main.c b/gcc/testsuite/gcc.dg/compat/vector-1b_main.c new file mode 100644 index 0000000..fb5a5a9 --- /dev/null +++ b/gcc/testsuite/gcc.dg/compat/vector-1b_main.c @@ -0,0 +1,27 @@ +/* { dg-skip-if "test AVX vector" { ! { i?86-*-* x86_64-*-* } } } */ +/* { dg-require-effective-target avx } */ + +/* Test compatibility of vector types: layout between separately-compiled + modules, parameter passing, and function return. This test uses + vectors of integer values. */ + +#include "cpuid.h" + +extern void vector_1_x (void); +extern void exit (int); +int fails; + +int +main () +{ + unsigned int eax, ebx, ecx, edx; + + if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx)) + return 0; + + /* Run AVX vector test only if host has AVX support. */ + if (ecx & bit_AVX) + vector_1_x (); + + exit (0); +} diff --git a/gcc/testsuite/gcc.dg/compat/vector-1b_x.c b/gcc/testsuite/gcc.dg/compat/vector-1b_x.c new file mode 100644 index 0000000..fe2565c --- /dev/null +++ b/gcc/testsuite/gcc.dg/compat/vector-1b_x.c @@ -0,0 +1,3 @@ +/* { dg-options "-w -mno-mmx -mavx" } */ + +#include "vector-1_x.c" diff --git a/gcc/testsuite/gcc.dg/compat/vector-1b_y.c b/gcc/testsuite/gcc.dg/compat/vector-1b_y.c new file mode 100644 index 0000000..3212bf5 --- /dev/null +++ b/gcc/testsuite/gcc.dg/compat/vector-1b_y.c @@ -0,0 +1,3 @@ +/* { dg-options "-w -mno-mmx -mavx" } */ + +#include "vector-1_y.c" diff --git a/gcc/testsuite/gcc.dg/compat/vector-2b_main.c b/gcc/testsuite/gcc.dg/compat/vector-2b_main.c new file mode 100644 index 0000000..c5a9300 --- /dev/null +++ b/gcc/testsuite/gcc.dg/compat/vector-2b_main.c @@ -0,0 +1,27 @@ +/* { dg-skip-if "test AVX support" { ! { i?86-*-* x86_64-*-* } } } */ +/* { dg-require-effective-target avx } */ + +/* Test compatibility of vector types: layout between separately-compiled + modules, parameter passing, and function return. This test uses + vectors of floating points values. */ + +#include "cpuid.h" + +extern void vector_2_x (void); +extern void exit (int); +int fails; + +int +main () +{ + unsigned int eax, ebx, ecx, edx; + + if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx)) + return 0; + + /* Run AVX vector test only if host has AVX support. */ + if (ecx & bit_AVX) + vector_2_x (); + + exit (0); +} diff --git a/gcc/testsuite/gcc.dg/compat/vector-2b_x.c b/gcc/testsuite/gcc.dg/compat/vector-2b_x.c new file mode 100644 index 0000000..4dd3436 --- /dev/null +++ b/gcc/testsuite/gcc.dg/compat/vector-2b_x.c @@ -0,0 +1,3 @@ +/* { dg-options "-w -mno-mmx -mavx" } */ + +#include "vector-2_x.c" diff --git a/gcc/testsuite/gcc.dg/compat/vector-2b_y.c b/gcc/testsuite/gcc.dg/compat/vector-2b_y.c new file mode 100644 index 0000000..2820e0b --- /dev/null +++ b/gcc/testsuite/gcc.dg/compat/vector-2b_y.c @@ -0,0 +1,3 @@ +/* { dg-options "-w -mno-mmx -mavx" } */ + +#include "vector-2_y.c" diff --git a/gcc/testsuite/gcc.target/i386/aes-avx-check.h b/gcc/testsuite/gcc.target/i386/aes-avx-check.h new file mode 100644 index 0000000..e73e36e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/aes-avx-check.h @@ -0,0 +1,31 @@ +#ifdef DEBUG +#include +#endif +#include +#include "cpuid.h" + +static void aes_avx_test (void); + +int +main () +{ + unsigned int eax, ebx, ecx, edx; + + if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx)) + return 0; + + /* Run AES + AVX test only if host has AES + AVX support. */ + if ((ecx & (bit_AVX | bit_AES)) == (bit_AVX | bit_AES)) + { + aes_avx_test (); +#ifdef DEBUG + printf ("PASSED\n"); +#endif + } +#ifdef DEBUG + else + printf ("SKIPPED\n"); +#endif + + return 0; +} diff --git a/gcc/testsuite/gcc.target/i386/aesdec.c b/gcc/testsuite/gcc.target/i386/aesdec.c index 0cf0d85..affe3d1 100644 --- a/gcc/testsuite/gcc.target/i386/aesdec.c +++ b/gcc/testsuite/gcc.target/i386/aesdec.c @@ -2,11 +2,19 @@ /* { dg-require-effective-target aes } */ /* { dg-options "-O2 -maes" } */ +#ifndef CHECK_H +#define CHECK_H "aes-check.h" +#endif + +#ifndef TEST +#define TEST aes_test +#endif + +#include CHECK_H + #include #include -#include "aes-check.h" - extern void abort (void); #define NUM 1024 @@ -35,7 +43,7 @@ init_data (__m128i *s1, __m128i *s2, __m128i *d) } static void -aes_test (void) +TEST (void) { int i; diff --git a/gcc/testsuite/gcc.target/i386/aesdeclast.c b/gcc/testsuite/gcc.target/i386/aesdeclast.c index 3bf360e..417264a 100644 --- a/gcc/testsuite/gcc.target/i386/aesdeclast.c +++ b/gcc/testsuite/gcc.target/i386/aesdeclast.c @@ -2,11 +2,19 @@ /* { dg-require-effective-target aes } */ /* { dg-options "-O2 -maes" } */ +#ifndef CHECK_H +#define CHECK_H "aes-check.h" +#endif + +#ifndef TEST +#define TEST aes_test +#endif + +#include CHECK_H + #include #include -#include "aes-check.h" - extern void abort (void); #define NUM 1024 @@ -37,7 +45,7 @@ init_data (__m128i *s1, __m128i *s2, __m128i *d) } static void -aes_test (void) +TEST (void) { int i; diff --git a/gcc/testsuite/gcc.target/i386/aesenc.c b/gcc/testsuite/gcc.target/i386/aesenc.c index f94a5bc..d2a8b60 100644 --- a/gcc/testsuite/gcc.target/i386/aesenc.c +++ b/gcc/testsuite/gcc.target/i386/aesenc.c @@ -2,11 +2,19 @@ /* { dg-require-effective-target aes } */ /* { dg-options "-O2 -maes" } */ +#ifndef CHECK_H +#define CHECK_H "aes-check.h" +#endif + +#ifndef TEST +#define TEST aes_test +#endif + +#include CHECK_H + #include #include -#include "aes-check.h" - extern void abort (void); #define NUM 1024 @@ -36,7 +44,7 @@ init_data (__m128i *s1, __m128i *s2, __m128i *d) } static void -aes_test (void) +TEST (void) { int i; diff --git a/gcc/testsuite/gcc.target/i386/aesenclast.c b/gcc/testsuite/gcc.target/i386/aesenclast.c index 0786316..fd72597 100644 --- a/gcc/testsuite/gcc.target/i386/aesenclast.c +++ b/gcc/testsuite/gcc.target/i386/aesenclast.c @@ -2,11 +2,19 @@ /* { dg-require-effective-target aes } */ /* { dg-options "-O2 -maes" } */ +#ifndef CHECK_H +#define CHECK_H "aes-check.h" +#endif + +#ifndef TEST +#define TEST aes_test +#endif + +#include CHECK_H + #include #include -#include "aes-check.h" - extern void abort (void); #define NUM 1024 @@ -36,7 +44,7 @@ init_data (__m128i *s1, __m128i *s2, __m128i *d) } static void -aes_test (void) +TEST (void) { int i; diff --git a/gcc/testsuite/gcc.target/i386/aesimc.c b/gcc/testsuite/gcc.target/i386/aesimc.c index ea56fe8..676f919 100644 --- a/gcc/testsuite/gcc.target/i386/aesimc.c +++ b/gcc/testsuite/gcc.target/i386/aesimc.c @@ -2,11 +2,19 @@ /* { dg-require-effective-target aes } */ /* { dg-options "-O2 -maes" } */ +#ifndef CHECK_H +#define CHECK_H "aes-check.h" +#endif + +#ifndef TEST +#define TEST aes_test +#endif + +#include CHECK_H + #include #include -#include "aes-check.h" - extern void abort (void); #define NUM 1024 @@ -34,7 +42,7 @@ init_data (__m128i *s1, __m128i *d) } static void -aes_test (void) +TEST (void) { int i; diff --git a/gcc/testsuite/gcc.target/i386/aeskeygenassist.c b/gcc/testsuite/gcc.target/i386/aeskeygenassist.c index 2fc8ad7..f033bd6 100644 --- a/gcc/testsuite/gcc.target/i386/aeskeygenassist.c +++ b/gcc/testsuite/gcc.target/i386/aeskeygenassist.c @@ -2,11 +2,19 @@ /* { dg-require-effective-target aes } */ /* { dg-options "-O2 -maes" } */ +#ifndef CHECK_H +#define CHECK_H "aes-check.h" +#endif + +#ifndef TEST +#define TEST aes_test +#endif + +#include CHECK_H + #include #include -#include "aes-check.h" - extern void abort (void); #define NUM 1024 @@ -34,7 +42,7 @@ init_data (__m128i *s1, __m128i *d) } static void -aes_test (void) +TEST (void) { int i; diff --git a/gcc/testsuite/gcc.target/i386/avx-1.c b/gcc/testsuite/gcc.target/i386/avx-1.c new file mode 100644 index 0000000..3cda080 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-1.c @@ -0,0 +1,139 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -Werror-implicit-function-declaration -march=k8 -m3dnow -mavx -msse5 -maes -mpclmul" } */ + +#include + +/* Test that the intrinsics compile with optimization. All of them are + defined as inline functions in {,x,e,p,t,s,w,g,a,b}mmintrin.h and + mm3dnow.h that reference the proper builtin functions. Defining away + "extern" and "__inline" results in all of them being compiled as proper + functions. */ + +#define extern +#define __inline + +/* Following intrinsics require immediate arguments. */ + +/* ammintrin.h */ +#define __builtin_ia32_extrqi(X, I, L) __builtin_ia32_extrqi(X, 1, 1) +#define __builtin_ia32_insertqi(X, Y, I, L) __builtin_ia32_insertqi(X, Y, 1, 1) + +/* gmmintrin.h */ +#define __builtin_ia32_blendpd256(X, Y, M) __builtin_ia32_blendpd256(X, Y, 1) +#define __builtin_ia32_blendps256(X, Y, M) __builtin_ia32_blendps256(X, Y, 1) +#define __builtin_ia32_dpps256(X, Y, M) __builtin_ia32_dpps256(X, Y, 1) +#define __builtin_ia32_shufpd256(X, Y, M) __builtin_ia32_shufpd256(X, Y, 1) +#define __builtin_ia32_shufps256(X, Y, M) __builtin_ia32_shufps256(X, Y, 1) +#define __builtin_ia32_cmpsd(X, Y, O) __builtin_ia32_cmpsd(X, Y, 1) +#define __builtin_ia32_cmpss(X, Y, O) __builtin_ia32_cmpss(X, Y, 1) +#define __builtin_ia32_cmppd(X, Y, O) __builtin_ia32_cmppd(X, Y, 1) +#define __builtin_ia32_cmpps(X, Y, O) __builtin_ia32_cmpps(X, Y, 1) +#define __builtin_ia32_cmppd256(X, Y, O) __builtin_ia32_cmppd256(X, Y, 1) +#define __builtin_ia32_cmpps256(X, Y, O) __builtin_ia32_cmpps256(X, Y, 1) +#define __builtin_ia32_vextractf128_pd256(X, N) __builtin_ia32_vextractf128_pd256(X, 1) +#define __builtin_ia32_vextractf128_ps256(X, N) __builtin_ia32_vextractf128_ps256(X, 1) +#define __builtin_ia32_vextractf128_si256(X, N) __builtin_ia32_vextractf128_si256(X, 1) +#define __builtin_ia32_vpermilpd(X, N) __builtin_ia32_vpermilpd(X, 1) +#define __builtin_ia32_vpermilpd256(X, N) __builtin_ia32_vpermilpd256(X, 1) +#define __builtin_ia32_vpermilps(X, N) __builtin_ia32_vpermilps(X, 1) +#define __builtin_ia32_vpermilps256(X, N) __builtin_ia32_vpermilps256(X, 1) +#define __builtin_ia32_vpermil2pd(X, Y, C, I) __builtin_ia32_vpermil2pd(X, Y, C, 1) +#define __builtin_ia32_vpermil2pd256(X, Y, C, I) __builtin_ia32_vpermil2pd256(X, Y, C, 1) +#define __builtin_ia32_vpermil2ps(X, Y, C, I) __builtin_ia32_vpermil2ps(X, Y, C, 1) +#define __builtin_ia32_vpermil2ps256(X, Y, C, I) __builtin_ia32_vpermil2ps256(X, Y, C, 1) +#define __builtin_ia32_vperm2f128_pd256(X, Y, C) __builtin_ia32_vperm2f128_pd256(X, Y, 1) +#define __builtin_ia32_vperm2f128_ps256(X, Y, C) __builtin_ia32_vperm2f128_ps256(X, Y, 1) +#define __builtin_ia32_vperm2f128_si256(X, Y, C) __builtin_ia32_vperm2f128_si256(X, Y, 1) +#define __builtin_ia32_vinsertf128_pd256(X, Y, C) __builtin_ia32_vinsertf128_pd256(X, Y, 1) +#define __builtin_ia32_vinsertf128_ps256(X, Y, C) __builtin_ia32_vinsertf128_ps256(X, Y, 1) +#define __builtin_ia32_vinsertf128_si256(X, Y, C) __builtin_ia32_vinsertf128_si256(X, Y, 1) +#define __builtin_ia32_roundpd256(V, M) __builtin_ia32_roundpd256(V, 1) +#define __builtin_ia32_roundps256(V, M) __builtin_ia32_roundps256(V, 1) + +/* wmmintrin.h */ +#define __builtin_ia32_aeskeygenassist128(X, C) __builtin_ia32_aeskeygenassist128(X, 1) +#define __builtin_ia32_pclmulqdq128(X, Y, I) __builtin_ia32_pclmulqdq128(X, Y, 1) + +/* mmintrin-common.h */ +#define __builtin_ia32_roundpd(V, M) __builtin_ia32_roundpd(V, 1) +#define __builtin_ia32_roundsd(D, V, M) __builtin_ia32_roundsd(D, V, 1) +#define __builtin_ia32_roundps(V, M) __builtin_ia32_roundps(V, 1) +#define __builtin_ia32_roundss(D, V, M) __builtin_ia32_roundss(D, V, 1) + +/* smmintrin.h */ +#define __builtin_ia32_pblendw128(X, Y, M) __builtin_ia32_pblendw128 (X, Y, 1) +#define __builtin_ia32_blendps(X, Y, M) __builtin_ia32_blendps(X, Y, 1) +#define __builtin_ia32_blendpd(X, Y, M) __builtin_ia32_blendpd(X, Y, 1) +#define __builtin_ia32_dpps(X, Y, M) __builtin_ia32_dpps(X, Y, 1) +#define __builtin_ia32_dppd(X, Y, M) __builtin_ia32_dppd(X, Y, 1) +#define __builtin_ia32_insertps128(D, S, N) __builtin_ia32_insertps128(D, S, 1) +#define __builtin_ia32_vec_ext_v4sf(X, N) __builtin_ia32_vec_ext_v4sf(X, 1) +#define __builtin_ia32_vec_set_v16qi(D, S, N) __builtin_ia32_vec_set_v16qi(D, S, 1) +#define __builtin_ia32_vec_set_v4si(D, S, N) __builtin_ia32_vec_set_v4si(D, S, 1) +#define __builtin_ia32_vec_set_v2di(D, S, N) __builtin_ia32_vec_set_v2di(D, S, 1) +#define __builtin_ia32_vec_ext_v16qi(X, N) __builtin_ia32_vec_ext_v16qi(X, 1) +#define __builtin_ia32_vec_ext_v4si(X, N) __builtin_ia32_vec_ext_v4si(X, 1) +#define __builtin_ia32_vec_ext_v2di(X, N) __builtin_ia32_vec_ext_v2di(X, 1) +#define __builtin_ia32_mpsadbw128(X, Y, M) __builtin_ia32_mpsadbw128(X, Y, 1) +#define __builtin_ia32_pcmpistrm128(X, Y, M) \ + __builtin_ia32_pcmpistrm128(X, Y, 1) +#define __builtin_ia32_pcmpistri128(X, Y, M) \ + __builtin_ia32_pcmpistri128(X, Y, 1) +#define __builtin_ia32_pcmpestrm128(X, LX, Y, LY, M) \ + __builtin_ia32_pcmpestrm128(X, LX, Y, LY, 1) +#define __builtin_ia32_pcmpestri128(X, LX, Y, LY, M) \ + __builtin_ia32_pcmpestri128(X, LX, Y, LY, 1) +#define __builtin_ia32_pcmpistria128(X, Y, M) \ + __builtin_ia32_pcmpistria128(X, Y, 1) +#define __builtin_ia32_pcmpistric128(X, Y, M) \ + __builtin_ia32_pcmpistric128(X, Y, 1) +#define __builtin_ia32_pcmpistrio128(X, Y, M) \ + __builtin_ia32_pcmpistrio128(X, Y, 1) +#define __builtin_ia32_pcmpistris128(X, Y, M) \ + __builtin_ia32_pcmpistris128(X, Y, 1) +#define __builtin_ia32_pcmpistriz128(X, Y, M) \ + __builtin_ia32_pcmpistriz128(X, Y, 1) +#define __builtin_ia32_pcmpestria128(X, LX, Y, LY, M) \ + __builtin_ia32_pcmpestria128(X, LX, Y, LY, 1) +#define __builtin_ia32_pcmpestric128(X, LX, Y, LY, M) \ + __builtin_ia32_pcmpestric128(X, LX, Y, LY, 1) +#define __builtin_ia32_pcmpestrio128(X, LX, Y, LY, M) \ + __builtin_ia32_pcmpestrio128(X, LX, Y, LY, 1) +#define __builtin_ia32_pcmpestris128(X, LX, Y, LY, M) \ + __builtin_ia32_pcmpestris128(X, LX, Y, LY, 1) +#define __builtin_ia32_pcmpestriz128(X, LX, Y, LY, M) \ + __builtin_ia32_pcmpestriz128(X, LX, Y, LY, 1) + +/* tmmintrin.h */ +#define __builtin_ia32_palignr128(X, Y, N) __builtin_ia32_palignr128(X, Y, 8) +#define __builtin_ia32_palignr(X, Y, N) __builtin_ia32_palignr(X, Y, 8) + +/* emmintrin.h */ +#define __builtin_ia32_psrldqi128(A, B) __builtin_ia32_psrldqi128(A, 8) +#define __builtin_ia32_pslldqi128(A, B) __builtin_ia32_pslldqi128(A, 8) +#define __builtin_ia32_pshufhw(A, N) __builtin_ia32_pshufhw(A, 0) +#define __builtin_ia32_pshuflw(A, N) __builtin_ia32_pshuflw(A, 0) +#define __builtin_ia32_pshufd(A, N) __builtin_ia32_pshufd(A, 0) +#define __builtin_ia32_vec_set_v8hi(A, D, N) \ + __builtin_ia32_vec_set_v8hi(A, D, 0) +#define __builtin_ia32_vec_ext_v8hi(A, N) __builtin_ia32_vec_ext_v8hi(A, 0) +#define __builtin_ia32_shufpd(A, B, N) __builtin_ia32_shufpd(A, B, 0) + +/* xmmintrin.h */ +#define __builtin_prefetch(P, A, I) __builtin_prefetch(P, A, _MM_HINT_NTA) +#define __builtin_ia32_pshufw(A, N) __builtin_ia32_pshufw(A, 0) +#define __builtin_ia32_vec_set_v4hi(A, D, N) \ + __builtin_ia32_vec_set_v4hi(A, D, 0) +#define __builtin_ia32_vec_ext_v4hi(A, N) __builtin_ia32_vec_ext_v4hi(A, 0) +#define __builtin_ia32_shufps(A, B, N) __builtin_ia32_shufps(A, B, 0) + +/* bmmintrin.h */ +#define __builtin_ia32_protbi(A, B) __builtin_ia32_protbi(A,1) +#define __builtin_ia32_protwi(A, B) __builtin_ia32_protwi(A,1) +#define __builtin_ia32_protdi(A, B) __builtin_ia32_protdi(A,1) +#define __builtin_ia32_protqi(A, B) __builtin_ia32_protqi(A,1) + +#include +#include +#include +#include diff --git a/gcc/testsuite/gcc.target/i386/avx-2.c b/gcc/testsuite/gcc.target/i386/avx-2.c new file mode 100644 index 0000000..6699558 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-2.c @@ -0,0 +1,172 @@ +/* { dg-do compile } */ +/* { dg-options "-O0 -Werror-implicit-function-declaration -march=k8 -m3dnow -mavx -msse5 -maes -mpclmul" } */ + +#include + +/* Test that the intrinsics compile without optimization. All of them are + defined as inline functions in {,x,e,p,t,s,w,g,a,b}mmintrin.h and + mm3dnow.h that reference the proper builtin functions. Defining away + "extern" and "__inline" results in all of them being compiled as proper + functions. */ + +#define extern +#define __inline + +#include +#include +#include +#include + +#define _CONCAT(x,y) x ## y + +#define test_1(func, type, op1_type, imm) \ + type _CONCAT(_,func) (op1_type A, int const I) \ + { return func (A, imm); } + +#define test_1x(func, type, op1_type, imm1, imm2) \ + type _CONCAT(_,func) (op1_type A, int const I, int const L) \ + { return func (A, imm1, imm2); } + +#define test_2(func, type, op1_type, op2_type, imm) \ + type _CONCAT(_,func) (op1_type A, op2_type B, int const I) \ + { return func (A, B, imm); } + +#define test_2x(func, type, op1_type, op2_type, imm1, imm2) \ + type _CONCAT(_,func) (op1_type A, op2_type B, int const I, int const L) \ + { return func (A, B, imm1, imm2); } + +#define test_3(func, type, op1_type, op2_type, op3_type, imm) \ + type _CONCAT(_,func) (op1_type A, op2_type B, \ + op3_type C, int const I) \ + { return func (A, B, C, imm); } + +#define test_4(func, type, op1_type, op2_type, op3_type, op4_type, imm) \ + type _CONCAT(_,func) (op1_type A, op2_type B, \ + op3_type C, op4_type D, int const I) \ + { return func (A, B, C, D, imm); } + + +/* Following intrinsics require immediate arguments. They + are defined as macros for non-optimized compilations. */ + +/* ammintrin.h */ +test_1x (_mm_extracti_si64, __m128i, __m128i, 1, 1) +test_2x (_mm_inserti_si64, __m128i, __m128i, __m128i, 1, 1) + +/* gmmintrin.h */ +test_2 (_mm256_blend_pd, __m256d, __m256d, __m256d, 1) +test_2 (_mm256_blend_ps, __m256, __m256, __m256, 1) +test_2 (_mm256_dp_ps, __m256, __m256, __m256, 1) +test_2 (_mm256_shuffle_pd, __m256d, __m256d, __m256d, 1) +test_2 (_mm256_shuffle_ps, __m256, __m256, __m256, 1) +test_2 (_mm_cmp_sd, __m128d, __m128d, __m128d, 1) +test_2 (_mm_cmp_ss, __m128, __m128, __m128, 1) +test_2 (_mm_cmp_pd, __m128d, __m128d, __m128d, 1) +test_2 (_mm_cmp_ps, __m128, __m128, __m128, 1) +test_2 (_mm256_cmp_pd, __m256d, __m256d, __m256d, 1) +test_2 (_mm256_cmp_ps, __m256, __m256, __m256, 1) +test_1 (_mm256_extractf128_pd, __m128d, __m256d, 1) +test_1 (_mm256_extractf128_ps, __m128, __m256, 1) +test_1 (_mm256_extractf128_si256, __m128i, __m256i, 1) +test_1 (_mm256_extract_epi8, int, __m256i, 20) +test_1 (_mm256_extract_epi16, int, __m256i, 13) +test_1 (_mm256_extract_epi32, int, __m256i, 6) +#ifdef __x86_64__ +test_1 (_mm256_extract_epi64, long long, __m256i, 2) +#endif +test_1 (_mm_permute_pd, __m128d, __m128d, 1) +test_1 (_mm256_permute_pd, __m256d, __m256d, 1) +test_1 (_mm_permute_ps, __m128, __m128, 1) +test_1 (_mm256_permute_ps, __m256, __m256, 1) +test_3 (_mm_permute2_pd, __m128d, __m128d, __m128d, __m128d, 1) +test_3 (_mm256_permute2_pd, __m256d, __m256d, __m256d, __m256d, 1) +test_3 (_mm_permute2_ps, __m128, __m128, __m128, __m128, 1) +test_3 (_mm256_permute2_ps, __m256, __m256, __m256, __m256, 1) +test_2 (_mm256_permute2f128_pd, __m256d, __m256d, __m256d, 1) +test_2 (_mm256_permute2f128_ps, __m256, __m256, __m256, 1) +test_2 (_mm256_permute2f128_si256, __m256i, __m256i, __m256i, 1) +test_2 (_mm256_insertf128_pd, __m256d, __m256d, __m128d, 1) +test_2 (_mm256_insertf128_ps, __m256, __m256, __m128, 1) +test_2 (_mm256_insertf128_si256, __m256i, __m256i, __m128i, 1) +test_2 (_mm256_insert_epi8, __m256i, __m256i, int, 30) +test_2 (_mm256_insert_epi16, __m256i, __m256i, int, 7) +test_2 (_mm256_insert_epi32, __m256i, __m256i, int, 3) +#ifdef __x86_64__ +test_2 (_mm256_insert_epi64, __m256i, __m256i, long long, 1) +#endif +test_1 (_mm256_round_pd, __m256d, __m256d, 1) +test_1 (_mm256_round_ps, __m256, __m256, 1) + +/* wmmintrin.h */ +test_1 (_mm_aeskeygenassist_si128, __m128i, __m128i, 1) +test_2 (_mm_clmulepi64_si128, __m128i, __m128i, __m128i, 1) + +/* mmintrin-common.h */ +test_1 (_mm_round_pd, __m128d, __m128d, 1) +test_1 (_mm_round_ps, __m128, __m128, 1) +test_2 (_mm_round_sd, __m128d, __m128d, __m128d, 1) +test_2 (_mm_round_ss, __m128, __m128, __m128, 1) + +/* smmintrin.h */ +test_2 (_mm_blend_epi16, __m128i, __m128i, __m128i, 1) +test_2 (_mm_blend_ps, __m128, __m128, __m128, 1) +test_2 (_mm_blend_pd, __m128d, __m128d, __m128d, 1) +test_2 (_mm_dp_ps, __m128, __m128, __m128, 1) +test_2 (_mm_dp_pd, __m128d, __m128d, __m128d, 1) +test_2 (_mm_insert_ps, __m128, __m128, __m128, 1) +test_1 (_mm_extract_ps, int, __m128, 1) +test_2 (_mm_insert_epi8, __m128i, __m128i, int, 1) +test_2 (_mm_insert_epi32, __m128i, __m128i, int, 1) +#ifdef __x86_64__ +test_2 (_mm_insert_epi64, __m128i, __m128i, long long, 1) +#endif +test_1 (_mm_extract_epi8, int, __m128i, 1) +test_1 (_mm_extract_epi32, int, __m128i, 1) +#ifdef __x86_64__ +test_1 (_mm_extract_epi64, long long, __m128i, 1) +#endif +test_2 (_mm_mpsadbw_epu8, __m128i, __m128i, __m128i, 1) +test_2 (_mm_cmpistrm, __m128i, __m128i, __m128i, 1) +test_2 (_mm_cmpistri, int, __m128i, __m128i, 1) +test_4 (_mm_cmpestrm, __m128i, __m128i, int, __m128i, int, 1) +test_4 (_mm_cmpestri, int, __m128i, int, __m128i, int, 1) +test_2 (_mm_cmpistra, int, __m128i, __m128i, 1) +test_2 (_mm_cmpistrc, int, __m128i, __m128i, 1) +test_2 (_mm_cmpistro, int, __m128i, __m128i, 1) +test_2 (_mm_cmpistrs, int, __m128i, __m128i, 1) +test_2 (_mm_cmpistrz, int, __m128i, __m128i, 1) +test_4 (_mm_cmpestra, int, __m128i, int, __m128i, int, 1) +test_4 (_mm_cmpestrc, int, __m128i, int, __m128i, int, 1) +test_4 (_mm_cmpestro, int, __m128i, int, __m128i, int, 1) +test_4 (_mm_cmpestrs, int, __m128i, int, __m128i, int, 1) +test_4 (_mm_cmpestrz, int, __m128i, int, __m128i, int, 1) + +/* tmmintrin.h */ +test_2 (_mm_alignr_epi8, __m128i, __m128i, __m128i, 1) +test_2 (_mm_alignr_pi8, __m64, __m64, __m64, 1) + +/* emmintrin.h */ +test_2 (_mm_shuffle_pd, __m128d, __m128d, __m128d, 1) +test_1 (_mm_srli_si128, __m128i, __m128i, 1) +test_1 (_mm_slli_si128, __m128i, __m128i, 1) +test_1 (_mm_extract_epi16, int, __m128i, 1) +test_2 (_mm_insert_epi16, __m128i, __m128i, int, 1) +test_1 (_mm_shufflehi_epi16, __m128i, __m128i, 1) +test_1 (_mm_shufflelo_epi16, __m128i, __m128i, 1) +test_1 (_mm_shuffle_epi32, __m128i, __m128i, 1) + +/* xmmintrin.h */ +test_2 (_mm_shuffle_ps, __m128, __m128, __m128, 1) +test_1 (_mm_extract_pi16, int, __m64, 1) +test_1 (_m_pextrw, int, __m64, 1) +test_2 (_mm_insert_pi16, __m64, __m64, int, 1) +test_2 (_m_pinsrw, __m64, __m64, int, 1) +test_1 (_mm_shuffle_pi16, __m64, __m64, 1) +test_1 (_m_pshufw, __m64, __m64, 1) +test_1 (_mm_prefetch, void, void *, _MM_HINT_NTA) + +/* bmmintrin.h */ +test_1 (_mm_roti_epi8, __m128i, __m128i, 1) +test_1 (_mm_roti_epi16, __m128i, __m128i, 1) +test_1 (_mm_roti_epi32, __m128i, __m128i, 1) +test_1 (_mm_roti_epi64, __m128i, __m128i, 1) diff --git a/gcc/testsuite/gcc.target/i386/avx-3.c b/gcc/testsuite/gcc.target/i386/avx-3.c new file mode 100644 index 0000000..9e0b434 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-3.c @@ -0,0 +1,8 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx -std=gnu99" } */ + +_Decimal128 +foo128 (_Decimal128 z) +{ + return z + 1.0dl; +} diff --git a/gcc/testsuite/gcc.target/i386/avx-check.h b/gcc/testsuite/gcc.target/i386/avx-check.h new file mode 100644 index 0000000..8db55a1 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-check.h @@ -0,0 +1,29 @@ +#include +#include "cpuid.h" +#include "m256-check.h" + +static void avx_test (void); + +int +main () +{ + unsigned int eax, ebx, ecx, edx; + + if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx)) + return 0; + + /* Run AVX test only if host has AVX support. */ + if (ecx & bit_AVX) + { + avx_test (); +#ifdef DEBUG + printf ("PASSED\n"); +#endif + } +#ifdef DEBUG + else + printf ("SKIPPED\n"); +#endif + + return 0; +} diff --git a/gcc/testsuite/gcc.target/i386/avx-set-v16hi-1.c b/gcc/testsuite/gcc.target/i386/avx-set-v16hi-1.c new file mode 100644 index 0000000..e857848 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-set-v16hi-1.c @@ -0,0 +1,30 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +static __m256i +__attribute__((noinline)) +foo (short *v) +{ + return _mm256_set_epi16 (v[15], v[14], v[13], v[12], + v[11], v[10], v[9], v[8], + v[7], v[6], v[5], v[4], + v[3], v[2], v[1], v[0]); +} + +static void +avx_test (void) +{ + short v[16] = + { + -3, 60, 48, 104, -90, 37, -48, 78, + 4, 33, 81, 4, -89, 17, 8, 68 + }; + union256i_w u; + + u.x = foo (v); + if (check_union256i_w (u, v)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-set-v16hi-2.c b/gcc/testsuite/gcc.target/i386/avx-set-v16hi-2.c new file mode 100644 index 0000000..ac1fc45 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-set-v16hi-2.c @@ -0,0 +1,34 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +static __m256i +__attribute__((noinline)) +foo (short x1, short x2, short x3, short x4, + short x5, short x6, short x7, short x8, + short x9, short x10, short x11, short x12, + short x13, short x14, short x15, short x16) +{ + return _mm256_set_epi16 (x1, x2, x3, x4, x5, x6, x7, x8, + x9, x10, x11, x12, x13, x14, x15, x16); +} + +static void +avx_test (void) +{ + short v[16] = + { + -3, 60, 48, 104, -90, 37, -48, 78, + 4, 33, 81, 4, -89, 17, 8, 68 + }; + union256i_w u; + + u.x = foo (v[15], v[14], v[13], v[12], + v[11], v[10], v[9], v[8], + v[7], v[6], v[5], v[4], + v[3], v[2], v[1], v[0]); + if (check_union256i_w (u, v)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-set-v16hi-3.c b/gcc/testsuite/gcc.target/i386/avx-set-v16hi-3.c new file mode 100644 index 0000000..c215d56 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-set-v16hi-3.c @@ -0,0 +1,28 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +static __m256i +__attribute__((noinline)) +foo (short x) +{ + return _mm256_set_epi16 (x, x, x, x, x, x, x, x, + x, x, x, x, x, x, x, x); +} + +static void +avx_test (void) +{ + short e = 345; + short v[16]; + union256i_w u; + int i; + + for (i = 0; i < ARRAY_SIZE (v); i++) + v[i] = e; + u.x = foo (e); + if (check_union256i_w (u, v)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-set-v16hi-4.c b/gcc/testsuite/gcc.target/i386/avx-set-v16hi-4.c new file mode 100644 index 0000000..a707fc8 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-set-v16hi-4.c @@ -0,0 +1,83 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +static __m256i +__attribute__((noinline)) +foo (short x, int i) +{ + switch (i) + { + case 15: + return _mm256_set_epi16 (x, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0); + case 14: + return _mm256_set_epi16 (0, x, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0); + case 13: + return _mm256_set_epi16 (0, 0, x, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0); + case 12: + return _mm256_set_epi16 (0, 0, 0, x, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0); + case 11: + return _mm256_set_epi16 (0, 0, 0, 0, x, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0); + case 10: + return _mm256_set_epi16 (0, 0, 0, 0, 0, x, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0); + case 9: + return _mm256_set_epi16 (0, 0, 0, 0, 0, 0, x, 0, + 0, 0, 0, 0, 0, 0, 0, 0); + case 8: + return _mm256_set_epi16 (0, 0, 0, 0, 0, 0, 0, x, + 0, 0, 0, 0, 0, 0, 0, 0); + case 7: + return _mm256_set_epi16 (0, 0, 0, 0, 0, 0, 0, 0, + x, 0, 0, 0, 0, 0, 0, 0); + case 6: + return _mm256_set_epi16 (0, 0, 0, 0, 0, 0, 0, 0, + 0, x, 0, 0, 0, 0, 0, 0); + case 5: + return _mm256_set_epi16 (0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, x, 0, 0, 0, 0, 0); + case 4: + return _mm256_set_epi16 (0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, x, 0, 0, 0, 0); + case 3: + return _mm256_set_epi16 (0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, x, 0, 0, 0); + case 2: + return _mm256_set_epi16 (0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, x, 0, 0); + case 1: + return _mm256_set_epi16 (0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, x, 0); + case 0: + return _mm256_set_epi16 (0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, x); + default: + abort (); + } +} + +static void +avx_test (void) +{ + short e = 0xbeef; + short v[16]; + union256i_w u; + int i, j; + + for (i = 0; i < ARRAY_SIZE (v); i++) + { + for (j = 0; j < ARRAY_SIZE (v); j++) + v[j] = 0; + v[i] = e; + u.x = foo (e, i); + if (check_union256i_w (u, v)) + abort (); + } +} diff --git a/gcc/testsuite/gcc.target/i386/avx-set-v16hi-5.c b/gcc/testsuite/gcc.target/i386/avx-set-v16hi-5.c new file mode 100644 index 0000000..ad77eda --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-set-v16hi-5.c @@ -0,0 +1,83 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +static __m256i +__attribute__((noinline)) +foo (short x, int i) +{ + switch (i) + { + case 15: + return _mm256_set_epi16 (x, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1); + case 14: + return _mm256_set_epi16 (1, x, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1); + case 13: + return _mm256_set_epi16 (1, 1, x, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1); + case 12: + return _mm256_set_epi16 (1, 1, 1, x, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1); + case 11: + return _mm256_set_epi16 (1, 1, 1, 1, x, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1); + case 10: + return _mm256_set_epi16 (1, 1, 1, 1, 1, x, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1); + case 9: + return _mm256_set_epi16 (1, 1, 1, 1, 1, 1, x, 1, + 1, 1, 1, 1, 1, 1, 1, 1); + case 8: + return _mm256_set_epi16 (1, 1, 1, 1, 1, 1, 1, x, + 1, 1, 1, 1, 1, 1, 1, 1); + case 7: + return _mm256_set_epi16 (1, 1, 1, 1, 1, 1, 1, 1, + x, 1, 1, 1, 1, 1, 1, 1); + case 6: + return _mm256_set_epi16 (1, 1, 1, 1, 1, 1, 1, 1, + 1, x, 1, 1, 1, 1, 1, 1); + case 5: + return _mm256_set_epi16 (1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, x, 1, 1, 1, 1, 1); + case 4: + return _mm256_set_epi16 (1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, x, 1, 1, 1, 1); + case 3: + return _mm256_set_epi16 (1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, x, 1, 1, 1); + case 2: + return _mm256_set_epi16 (1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, x, 1, 1); + case 1: + return _mm256_set_epi16 (1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, x, 1); + case 0: + return _mm256_set_epi16 (1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, x); + default: + abort (); + } +} + +static void +avx_test (void) +{ + short e = 0xbeef; + short v[16]; + union256i_w u; + int i, j; + + for (i = 0; i < ARRAY_SIZE (v); i++) + { + for (j = 0; j < ARRAY_SIZE (v); j++) + v[j] = 1; + v[i] = e; + u.x = foo (e, i); + if (check_union256i_w (u, v)) + abort (); + } +} diff --git a/gcc/testsuite/gcc.target/i386/avx-set-v32qi-1.c b/gcc/testsuite/gcc.target/i386/avx-set-v32qi-1.c new file mode 100644 index 0000000..9d93815 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-set-v32qi-1.c @@ -0,0 +1,36 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +static __m256i +__attribute__((noinline)) +foo (char *v) +{ + return _mm256_set_epi8 (v[31], v[30], v[29], v[28], + v[27], v[26], v[25], v[24], + v[23], v[22], v[21], v[20], + v[19], v[18], v[17], v[16], + v[15], v[14], v[13], v[12], + v[11], v[10], v[9], v[8], + v[7], v[6], v[5], v[4], + v[3], v[2], v[1], v[0]); +} + +static void +avx_test (void) +{ + char v[32] = + { + -3, 60, 48, 104, -90, 37, -48, 78, + 4, 33, 81, 4, -89, 17, 8, 68, + -13, 30, 78, 149, -70, -37, 98, 38, + 41, 73, 89, 14, 80, 117, 108, 8 + }; + union256i_b u; + + u.x = foo (v); + if (check_union256i_b (u, v)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-set-v32qi-2.c b/gcc/testsuite/gcc.target/i386/avx-set-v32qi-2.c new file mode 100644 index 0000000..508ed51 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-set-v32qi-2.c @@ -0,0 +1,46 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +static __m256i +__attribute__((noinline)) +foo (char x1, char x2, char x3, char x4, + char x5, char x6, char x7, char x8, + char x9, char x10, char x11, char x12, + char x13, char x14, char x15, char x16, + char x17, char x18, char x19, char x20, + char x21, char x22, char x23, char x24, + char x25, char x26, char x27, char x28, + char x29, char x30, char x31, char x32) +{ + return _mm256_set_epi8 (x1, x2, x3, x4, x5, x6, x7, x8, + x9, x10, x11, x12, x13, x14, x15, x16, + x17, x18, x19, x20, x21, x22, x23, x24, + x25, x26, x27, x28, x29, x30, x31, x32); +} + +static void +avx_test (void) +{ + char v[32] = + { + -3, 60, 48, 104, -90, 37, -48, 78, + 4, 33, 81, 4, -89, 17, 8, 68, + -13, 30, 78, 149, -70, -37, 98, 38, + 41, 73, 89, 14, 80, 117, 108, 8 + }; + union256i_b u; + + u.x = foo (v[31], v[30], v[29], v[28], + v[27], v[26], v[25], v[24], + v[23], v[22], v[21], v[20], + v[19], v[18], v[17], v[16], + v[15], v[14], v[13], v[12], + v[11], v[10], v[9], v[8], + v[7], v[6], v[5], v[4], + v[3], v[2], v[1], v[0]); + if (check_union256i_b (u, v)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-set-v32qi-3.c b/gcc/testsuite/gcc.target/i386/avx-set-v32qi-3.c new file mode 100644 index 0000000..da92c8e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-set-v32qi-3.c @@ -0,0 +1,30 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +static __m256i +__attribute__((noinline)) +foo (char x) +{ + return _mm256_set_epi8 (x, x, x, x, x, x, x, x, + x, x, x, x, x, x, x, x, + x, x, x, x, x, x, x, x, + x, x, x, x, x, x, x, x); +} + +static void +avx_test (void) +{ + char e = -45; + char v[32]; + union256i_b u; + int i; + + for (i = 0; i < ARRAY_SIZE (v); i++) + v[i] = e; + u.x = foo (e); + if (check_union256i_b (u, v)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-set-v32qi-4.c b/gcc/testsuite/gcc.target/i386/avx-set-v32qi-4.c new file mode 100644 index 0000000..7220695 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-set-v32qi-4.c @@ -0,0 +1,131 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +static __m256i +__attribute__((noinline)) +foo (char x, int i) +{ + switch (i) + { + case 31: + return _mm256_set_epi8 (x, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0); + case 30: + return _mm256_set_epi8 (0, x, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0); + case 29: + return _mm256_set_epi8 (0, 0, x, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0); + case 28: + return _mm256_set_epi8 (0, 0, 0, x, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0); + case 27: + return _mm256_set_epi8 (0, 0, 0, 0, x, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0); + case 26: + return _mm256_set_epi8 (0, 0, 0, 0, 0, x, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0); + case 25: + return _mm256_set_epi8 (0, 0, 0, 0, 0, 0, x, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0); + case 24: + return _mm256_set_epi8 (0, 0, 0, 0, 0, 0, 0, x, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0); + case 23: + return _mm256_set_epi8 (0, 0, 0, 0, 0, 0, 0, 0, x, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0); + case 22: + return _mm256_set_epi8 (0, 0, 0, 0, 0, 0, 0, 0, 0, x, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0); + case 21: + return _mm256_set_epi8 (0, 0, 0, 0, 0, 0, 0, 0, 0, 0, x, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0); + case 20: + return _mm256_set_epi8 (0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, x, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0); + case 19: + return _mm256_set_epi8 (0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, x, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0); + case 18: + return _mm256_set_epi8 (0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, x, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0); + case 17: + return _mm256_set_epi8 (0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, x, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0); + case 16: + return _mm256_set_epi8 (0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, x, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0); + case 15: + return _mm256_set_epi8 (0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + x, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0); + case 14: + return _mm256_set_epi8 (0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, x, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0); + case 13: + return _mm256_set_epi8 (0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, x, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0); + case 12: + return _mm256_set_epi8 (0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, x, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0); + case 11: + return _mm256_set_epi8 (0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, x, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0); + case 10: + return _mm256_set_epi8 (0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, x, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0); + case 9: + return _mm256_set_epi8 (0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, x, 0, 0, 0, 0, 0, 0, 0, 0, 0); + case 8: + return _mm256_set_epi8 (0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, x, 0, 0, 0, 0, 0, 0, 0, 0); + case 7: + return _mm256_set_epi8 (0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, x, 0, 0, 0, 0, 0, 0, 0); + case 6: + return _mm256_set_epi8 (0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, x, 0, 0, 0, 0, 0, 0); + case 5: + return _mm256_set_epi8 (0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, x, 0, 0, 0, 0, 0); + case 4: + return _mm256_set_epi8 (0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, x, 0, 0, 0, 0); + case 3: + return _mm256_set_epi8 (0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, x, 0, 0, 0); + case 2: + return _mm256_set_epi8 (0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, x, 0, 0); + case 1: + return _mm256_set_epi8 (0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, x, 0); + case 0: + return _mm256_set_epi8 (0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, x); + default: + abort (); + } +} + +static void +avx_test (void) +{ + char e = 0xa1; + char v[32]; + union256i_b u; + int i, j; + + for (i = 0; i < ARRAY_SIZE (v); i++) + { + for (j = 0; j < ARRAY_SIZE (v); j++) + v[j] = 0; + v[i] = e; + u.x = foo (e, i); + if (check_union256i_b (u, v)) + abort (); + } +} diff --git a/gcc/testsuite/gcc.target/i386/avx-set-v32qi-5.c b/gcc/testsuite/gcc.target/i386/avx-set-v32qi-5.c new file mode 100644 index 0000000..0fcadda --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-set-v32qi-5.c @@ -0,0 +1,131 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +static __m256i +__attribute__((noinline)) +foo (char x, int i) +{ + switch (i) + { + case 31: + return _mm256_set_epi8 (x, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1); + case 30: + return _mm256_set_epi8 (1, x, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1); + case 29: + return _mm256_set_epi8 (1, 1, x, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1); + case 28: + return _mm256_set_epi8 (1, 1, 1, x, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1); + case 27: + return _mm256_set_epi8 (1, 1, 1, 1, x, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1); + case 26: + return _mm256_set_epi8 (1, 1, 1, 1, 1, x, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1); + case 25: + return _mm256_set_epi8 (1, 1, 1, 1, 1, 1, x, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1); + case 24: + return _mm256_set_epi8 (1, 1, 1, 1, 1, 1, 1, x, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1); + case 23: + return _mm256_set_epi8 (1, 1, 1, 1, 1, 1, 1, 1, x, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1); + case 22: + return _mm256_set_epi8 (1, 1, 1, 1, 1, 1, 1, 1, 1, x, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1); + case 21: + return _mm256_set_epi8 (1, 1, 1, 1, 1, 1, 1, 1, 1, 1, x, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1); + case 20: + return _mm256_set_epi8 (1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, x, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1); + case 19: + return _mm256_set_epi8 (1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, x, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1); + case 18: + return _mm256_set_epi8 (1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, x, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1); + case 17: + return _mm256_set_epi8 (1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, x, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1); + case 16: + return _mm256_set_epi8 (1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, x, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1); + case 15: + return _mm256_set_epi8 (1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + x, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1); + case 14: + return _mm256_set_epi8 (1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, x, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1); + case 13: + return _mm256_set_epi8 (1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, x, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1); + case 12: + return _mm256_set_epi8 (1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, x, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1); + case 11: + return _mm256_set_epi8 (1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, x, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1); + case 10: + return _mm256_set_epi8 (1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, x, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1); + case 9: + return _mm256_set_epi8 (1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, x, 1, 1, 1, 1, 1, 1, 1, 1, 1); + case 8: + return _mm256_set_epi8 (1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, x, 1, 1, 1, 1, 1, 1, 1, 1); + case 7: + return _mm256_set_epi8 (1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, x, 1, 1, 1, 1, 1, 1, 1); + case 6: + return _mm256_set_epi8 (1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, x, 1, 1, 1, 1, 1, 1); + case 5: + return _mm256_set_epi8 (1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, x, 1, 1, 1, 1, 1); + case 4: + return _mm256_set_epi8 (1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, x, 1, 1, 1, 1); + case 3: + return _mm256_set_epi8 (1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, x, 1, 1, 1); + case 2: + return _mm256_set_epi8 (1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, x, 1, 1); + case 1: + return _mm256_set_epi8 (1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, x, 1); + case 0: + return _mm256_set_epi8 (1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, x); + default: + abort (); + } +} + +static void +avx_test (void) +{ + char e = 0xa1; + char v[32]; + union256i_b u; + int i, j; + + for (i = 0; i < ARRAY_SIZE (v); i++) + { + for (j = 0; j < ARRAY_SIZE (v); j++) + v[j] = 1; + v[i] = e; + u.x = foo (e, i); + if (check_union256i_b (u, v)) + abort (); + } +} diff --git a/gcc/testsuite/gcc.target/i386/avx-set-v4df-1.c b/gcc/testsuite/gcc.target/i386/avx-set-v4df-1.c new file mode 100644 index 0000000..89e6ec2 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-set-v4df-1.c @@ -0,0 +1,23 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +static __m256d +__attribute__((noinline)) +foo (double *v) +{ + return _mm256_set_pd (v[3], v[2], v[1], v[0]); +} + +static void +avx_test (void) +{ + double v[4] = { -3, 2, 1, 9 }; + union256d u; + + u.x = foo (v); + if (check_union256d (u, v)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-set-v4df-2.c b/gcc/testsuite/gcc.target/i386/avx-set-v4df-2.c new file mode 100644 index 0000000..51df025 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-set-v4df-2.c @@ -0,0 +1,23 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +static __m256d +__attribute__((noinline)) +foo (double x1, double x2, double x3, double x4) +{ + return _mm256_set_pd (x1, x2, x3, x4); +} + +static void +avx_test (void) +{ + double v[4] = { -3, 2, 1, 9 }; + union256d u; + + u.x = foo (v[3], v[2], v[1], v[0]); + if (check_union256d (u, v)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-set-v4df-3.c b/gcc/testsuite/gcc.target/i386/avx-set-v4df-3.c new file mode 100644 index 0000000..01b2ff5 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-set-v4df-3.c @@ -0,0 +1,27 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +static __m256d +__attribute__((noinline)) +foo (double x) +{ + return _mm256_set_pd (x, x, x, x); +} + +static void +avx_test (void) +{ + double e = 34.5; + double v[4]; + union256d u; + int i; + + for (i = 0; i < ARRAY_SIZE (v); i++) + v[i] = e; + u.x = foo (e); + if (check_union256d (u, v)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-set-v4df-4.c b/gcc/testsuite/gcc.target/i386/avx-set-v4df-4.c new file mode 100644 index 0000000..e2f6300 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-set-v4df-4.c @@ -0,0 +1,43 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +static __m256d +__attribute__((noinline)) +foo (double x, int i) +{ + switch (i) + { + case 3: + return _mm256_set_pd (x, 0, 0, 0); + case 2: + return _mm256_set_pd (0, x, 0, 0); + case 1: + return _mm256_set_pd (0, 0, x, 0); + case 0: + return _mm256_set_pd (0, 0, 0, x); + default: + abort (); + } +} + +static void +avx_test (void) +{ + double e = -3.234; + double v[4]; + union256d u; + int i, j; + + for (i = 0; i < ARRAY_SIZE (v); i++) + { + for (j = 0; j < ARRAY_SIZE (v); j++) + v[j] = 0; + v[i] = e; + u.x = foo (e, i); + if (check_union256d (u, v)) + abort (); + } +} diff --git a/gcc/testsuite/gcc.target/i386/avx-set-v4df-5.c b/gcc/testsuite/gcc.target/i386/avx-set-v4df-5.c new file mode 100644 index 0000000..6f418a6 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-set-v4df-5.c @@ -0,0 +1,43 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +static __m256d +__attribute__((noinline)) +foo (double x, int i) +{ + switch (i) + { + case 3: + return _mm256_set_pd (x, 1, 1, 1); + case 2: + return _mm256_set_pd (1, x, 1, 1); + case 1: + return _mm256_set_pd (1, 1, x, 1); + case 0: + return _mm256_set_pd (1, 1, 1, x); + default: + abort (); + } +} + +static void +avx_test (void) +{ + double e = -3.234; + double v[4]; + union256d u; + int i, j; + + for (i = 0; i < ARRAY_SIZE (v); i++) + { + for (j = 0; j < ARRAY_SIZE (v); j++) + v[j] = 1; + v[i] = e; + u.x = foo (e, i); + if (check_union256d (u, v)) + abort (); + } +} diff --git a/gcc/testsuite/gcc.target/i386/avx-set-v4di-1.c b/gcc/testsuite/gcc.target/i386/avx-set-v4di-1.c new file mode 100644 index 0000000..84b6278 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-set-v4di-1.c @@ -0,0 +1,25 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +static __m256i +__attribute__((noinline)) +foo (long long *v) +{ + return _mm256_set_epi64x (v[3], v[2], v[1], v[0]); +} + +static void +avx_test (void) +{ + long long v[4] + = { 0x12e9e94645ad8LL, 0x851c0b39446LL, + 0x786784645245LL, 0x9487731234LL }; + union256i_q u; + + u.x = foo (v); + if (check_union256i_q (u, v)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-set-v4di-2.c b/gcc/testsuite/gcc.target/i386/avx-set-v4di-2.c new file mode 100644 index 0000000..f3dc138 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-set-v4di-2.c @@ -0,0 +1,25 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +static __m256i +__attribute__((noinline)) +foo (long long x1, long long x2, long long x3, long long x4) +{ + return _mm256_set_epi64x (x1, x2, x3, x4); +} + +static void +avx_test (void) +{ + long long v[4] + = { 0x12e9e94645ad8LL, 0x851c0b39446LL, + 0x786784645245LL, 0x9487731234LL }; + union256i_q u; + + u.x = foo (v[3], v[2], v[1], v[0]); + if (check_union256i_q (u, v)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-set-v4di-3.c b/gcc/testsuite/gcc.target/i386/avx-set-v4di-3.c new file mode 100644 index 0000000..95710d8 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-set-v4di-3.c @@ -0,0 +1,27 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +static __m256i +__attribute__((noinline)) +foo (long long x) +{ + return _mm256_set_epi64x (x, x, x, x); +} + +static void +avx_test (void) +{ + long long e = 0xfed178ab134badf1LL; + long long v[4]; + union256i_q u; + int i; + + for (i = 0; i < ARRAY_SIZE (v); i++) + v[i] = e; + u.x = foo (e); + if (check_union256i_q (u, v)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-set-v4di-4.c b/gcc/testsuite/gcc.target/i386/avx-set-v4di-4.c new file mode 100644 index 0000000..83f8c15 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-set-v4di-4.c @@ -0,0 +1,43 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +static __m256i +__attribute__((noinline)) +foo (long long x, int i) +{ + switch (i) + { + case 3: + return _mm256_set_epi64x (x, 0, 0, 0); + case 2: + return _mm256_set_epi64x (0, x, 0, 0); + case 1: + return _mm256_set_epi64x (0, 0, x, 0); + case 0: + return _mm256_set_epi64x (0, 0, 0, x); + default: + abort (); + } +} + +static void +avx_test (void) +{ + long long e = 0xabadbeef01234567LL; + long long v[4]; + union256i_q u; + int i, j; + + for (i = 0; i < ARRAY_SIZE (v); i++) + { + for (j = 0; j < ARRAY_SIZE (v); j++) + v[j] = 0; + v[i] = e; + u.x = foo (e, i); + if (check_union256i_q (u, v)) + abort (); + } +} diff --git a/gcc/testsuite/gcc.target/i386/avx-set-v4di-5.c b/gcc/testsuite/gcc.target/i386/avx-set-v4di-5.c new file mode 100644 index 0000000..7bc260c --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-set-v4di-5.c @@ -0,0 +1,43 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +static __m256i +__attribute__((noinline)) +foo (long long x, int i) +{ + switch (i) + { + case 3: + return _mm256_set_epi64x (x, 1, 1, 1); + case 2: + return _mm256_set_epi64x (1, x, 1, 1); + case 1: + return _mm256_set_epi64x (1, 1, x, 1); + case 0: + return _mm256_set_epi64x (1, 1, 1, x); + default: + abort (); + } +} + +static void +avx_test (void) +{ + long long e = 0xabadbeef01234567LL; + long long v[4]; + union256i_q u; + int i, j; + + for (i = 0; i < ARRAY_SIZE (v); i++) + { + for (j = 0; j < ARRAY_SIZE (v); j++) + v[j] = 1; + v[i] = e; + u.x = foo (e, i); + if (check_union256i_q (u, v)) + abort (); + } +} diff --git a/gcc/testsuite/gcc.target/i386/avx-set-v8sf-1.c b/gcc/testsuite/gcc.target/i386/avx-set-v8sf-1.c new file mode 100644 index 0000000..6f1ba71 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-set-v8sf-1.c @@ -0,0 +1,24 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +static __m256 +__attribute__((noinline)) +foo (float *v) +{ + return _mm256_set_ps (v[7], v[6], v[5], v[4], + v[3], v[2], v[1], v[0]); +} + +static void +avx_test (void) +{ + float v[8] = { -3, 2, 1, 9, 23, -173, -13, 69 }; + union256 u; + + u.x = foo (v); + if (check_union256 (u, v)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-set-v8sf-2.c b/gcc/testsuite/gcc.target/i386/avx-set-v8sf-2.c new file mode 100644 index 0000000..4d809d7 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-set-v8sf-2.c @@ -0,0 +1,25 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +__m256 +__attribute__((noinline)) +foo (float x1, float x2, float x3, float x4, + float x5, float x6, float x7, float x8) +{ + return _mm256_set_ps (x1, x2, x3, x4, x5, x6, x7, x8); +} + +void +avx_test (void) +{ + float v[8] = { -3, 2, 1, 9, 23, -173, -13, 69 }; + union256 u; + + u.x = foo (v[7], v[6], v[5], v[4], v[3], v[2], v[1], v[0]); + + if (check_union256 (u, v)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-set-v8sf-3.c b/gcc/testsuite/gcc.target/i386/avx-set-v8sf-3.c new file mode 100644 index 0000000..96f5e33 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-set-v8sf-3.c @@ -0,0 +1,27 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +static __m256 +__attribute__((noinline)) +foo (float x) +{ + return _mm256_set_ps (x, x, x, x, x, x, x, x); +} + +static void +avx_test (void) +{ + float e = 34.5; + float v[8]; + union256 u; + int i; + + for (i = 0; i < ARRAY_SIZE (v); i++) + v[i] = e; + u.x = foo (e); + if (check_union256 (u, v)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-set-v8sf-4.c b/gcc/testsuite/gcc.target/i386/avx-set-v8sf-4.c new file mode 100644 index 0000000..73be303 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-set-v8sf-4.c @@ -0,0 +1,51 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +static __m256 +__attribute__((noinline)) +foo (float x, int i) +{ + switch (i) + { + case 7: + return _mm256_set_ps (x, 0, 0, 0, 0, 0, 0, 0); + case 6: + return _mm256_set_ps (0, x, 0, 0, 0, 0, 0, 0); + case 5: + return _mm256_set_ps (0, 0, x, 0, 0, 0, 0, 0); + case 4: + return _mm256_set_ps (0, 0, 0, x, 0, 0, 0, 0); + case 3: + return _mm256_set_ps (0, 0, 0, 0, x, 0, 0, 0); + case 2: + return _mm256_set_ps (0, 0, 0, 0, 0, x, 0, 0); + case 1: + return _mm256_set_ps (0, 0, 0, 0, 0, 0, x, 0); + case 0: + return _mm256_set_ps (0, 0, 0, 0, 0, 0, 0, x); + default: + abort (); + } +} + +static void +avx_test (void) +{ + float e = -3.234; + float v[8]; + union256 u; + int i, j; + + for (i = 0; i < ARRAY_SIZE (v); i++) + { + for (j = 0; j < ARRAY_SIZE (v); j++) + v[j] = 0; + v[i] = e; + u.x = foo (e, i); + if (check_union256 (u, v)) + abort (); + } +} diff --git a/gcc/testsuite/gcc.target/i386/avx-set-v8sf-5.c b/gcc/testsuite/gcc.target/i386/avx-set-v8sf-5.c new file mode 100644 index 0000000..80dc156 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-set-v8sf-5.c @@ -0,0 +1,51 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +static __m256 +__attribute__((noinline)) +foo (float x, int i) +{ + switch (i) + { + case 7: + return _mm256_set_ps (x, 1, 1, 1, 1, 1, 1, 1); + case 6: + return _mm256_set_ps (1, x, 1, 1, 1, 1, 1, 1); + case 5: + return _mm256_set_ps (1, 1, x, 1, 1, 1, 1, 1); + case 4: + return _mm256_set_ps (1, 1, 1, x, 1, 1, 1, 1); + case 3: + return _mm256_set_ps (1, 1, 1, 1, x, 1, 1, 1); + case 2: + return _mm256_set_ps (1, 1, 1, 1, 1, x, 1, 1); + case 1: + return _mm256_set_ps (1, 1, 1, 1, 1, 1, x, 1); + case 0: + return _mm256_set_ps (1, 1, 1, 1, 1, 1, 1, x); + default: + abort (); + } +} + +static void +avx_test (void) +{ + float e = -3.234; + float v[8]; + union256 u; + int i, j; + + for (i = 0; i < ARRAY_SIZE (v); i++) + { + for (j = 0; j < ARRAY_SIZE (v); j++) + v[j] = 1; + v[i] = e; + u.x = foo (e, i); + if (check_union256 (u, v)) + abort (); + } +} diff --git a/gcc/testsuite/gcc.target/i386/avx-set-v8si-1.c b/gcc/testsuite/gcc.target/i386/avx-set-v8si-1.c new file mode 100644 index 0000000..7aa029e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-set-v8si-1.c @@ -0,0 +1,26 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +static __m256i +__attribute__((noinline)) +foo (int *v) +{ + return _mm256_set_epi32 (v[7], v[6], v[5], v[4], + v[3], v[2], v[1], v[0]); +} + +static void +avx_test (void) +{ + int v[8] + = { 19832468, 6576856, 8723467, 234566, + 786784, 645245, 948773, 1234 }; + union256i_d u; + + u.x = foo (v); + if (check_union256i_d (u, v)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-set-v8si-2.c b/gcc/testsuite/gcc.target/i386/avx-set-v8si-2.c new file mode 100644 index 0000000..e822c78 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-set-v8si-2.c @@ -0,0 +1,25 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +__m256i +__attribute__((noinline)) +foo (int x1, int x2, int x3, int x4, + int x5, int x6, int x7, int x8) +{ + return _mm256_set_epi32 (x1, x2, x3, x4, x5, x6, x7, x8); +} + +static void +avx_test (void) +{ + int v[8] = { -3, 2, 1, 9, 23, -173, -13, 69 }; + union256i_d u; + + u.x = foo (v[7], v[6], v[5], v[4], v[3], v[2], v[1], v[0]); + + if (check_union256i_d (u, v)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-set-v8si-3.c b/gcc/testsuite/gcc.target/i386/avx-set-v8si-3.c new file mode 100644 index 0000000..594436b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-set-v8si-3.c @@ -0,0 +1,27 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +static __m256i +__attribute__((noinline)) +foo (int x) +{ + return _mm256_set_epi32 (x, x, x, x, x, x, x, x); +} + +static void +avx_test (void) +{ + int e = 0xabadbeef; + int v[8]; + union256i_d u; + int i; + + for (i = 0; i < ARRAY_SIZE (v); i++) + v[i] = e; + u.x = foo (e); + if (check_union256i_d (u, v)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-set-v8si-4.c b/gcc/testsuite/gcc.target/i386/avx-set-v8si-4.c new file mode 100644 index 0000000..2cad627 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-set-v8si-4.c @@ -0,0 +1,51 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +static __m256i +__attribute__((noinline)) +foo (int x, int i) +{ + switch (i) + { + case 7: + return _mm256_set_epi32 (x, 0, 0, 0, 0, 0, 0, 0); + case 6: + return _mm256_set_epi32 (0, x, 0, 0, 0, 0, 0, 0); + case 5: + return _mm256_set_epi32 (0, 0, x, 0, 0, 0, 0, 0); + case 4: + return _mm256_set_epi32 (0, 0, 0, x, 0, 0, 0, 0); + case 3: + return _mm256_set_epi32 (0, 0, 0, 0, x, 0, 0, 0); + case 2: + return _mm256_set_epi32 (0, 0, 0, 0, 0, x, 0, 0); + case 1: + return _mm256_set_epi32 (0, 0, 0, 0, 0, 0, x, 0); + case 0: + return _mm256_set_epi32 (0, 0, 0, 0, 0, 0, 0, x); + default: + abort (); + } +} + +static void +avx_test (void) +{ + int e = 0xabadbeef; + int v[8]; + union256i_d u; + int i, j; + + for (i = 0; i < ARRAY_SIZE (v); i++) + { + for (j = 0; j < ARRAY_SIZE (v); j++) + v[j] = 0; + v[i] = e; + u.x = foo (e, i); + if (check_union256i_d (u, v)) + abort (); + } +} diff --git a/gcc/testsuite/gcc.target/i386/avx-set-v8si-5.c b/gcc/testsuite/gcc.target/i386/avx-set-v8si-5.c new file mode 100644 index 0000000..456e877 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-set-v8si-5.c @@ -0,0 +1,51 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +static __m256i +__attribute__((noinline)) +foo (int x, int i) +{ + switch (i) + { + case 7: + return _mm256_set_epi32 (x, 1, 1, 1, 1, 1, 1, 1); + case 6: + return _mm256_set_epi32 (1, x, 1, 1, 1, 1, 1, 1); + case 5: + return _mm256_set_epi32 (1, 1, x, 1, 1, 1, 1, 1); + case 4: + return _mm256_set_epi32 (1, 1, 1, x, 1, 1, 1, 1); + case 3: + return _mm256_set_epi32 (1, 1, 1, 1, x, 1, 1, 1); + case 2: + return _mm256_set_epi32 (1, 1, 1, 1, 1, x, 1, 1); + case 1: + return _mm256_set_epi32 (1, 1, 1, 1, 1, 1, x, 1); + case 0: + return _mm256_set_epi32 (1, 1, 1, 1, 1, 1, 1, x); + default: + abort (); + } +} + +static void +avx_test (void) +{ + int e = 0xabadbeef; + int v[8]; + union256i_d u; + int i, j; + + for (i = 0; i < ARRAY_SIZE (v); i++) + { + for (j = 0; j < ARRAY_SIZE (v); j++) + v[j] = 1; + v[i] = e; + u.x = foo (e, i); + if (check_union256i_d (u, v)) + abort (); + } +} diff --git a/gcc/testsuite/gcc.target/i386/avx-set1-epi32-1.c b/gcc/testsuite/gcc.target/i386/avx-set1-epi32-1.c new file mode 100644 index 0000000..2d774ae --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-set1-epi32-1.c @@ -0,0 +1,22 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +void static +avx_test (void) +{ + int i; + union256i_d u; + int e [8]; + int source[1] = {1234}; + + u.x = _mm256_set1_epi32 (source[0]); + + for (i = 0; i < 8; i++) + e[i] = source[0]; + + if (check_union256i_d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-set1-pd-256-1.c b/gcc/testsuite/gcc.target/i386/avx-set1-pd-256-1.c new file mode 100644 index 0000000..21aea29 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-set1-pd-256-1.c @@ -0,0 +1,22 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +void static +avx_test (void) +{ + int i; + union256d u; + double e [4]; + double source[1] = {26156.643}; + + u.x = _mm256_set1_pd (source[0]); + + for (i = 0; i < 4; i++) + e[i] = source[0]; + + if (check_union256d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-set1-ps-256-1.c b/gcc/testsuite/gcc.target/i386/avx-set1-ps-256-1.c new file mode 100644 index 0000000..c5f2d10 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-set1-ps-256-1.c @@ -0,0 +1,22 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +void static +avx_test (void) +{ + int i; + union256 u; + float e [8]; + float source[1] = {1234.234f}; + + u.x = _mm256_set1_ps (source[0]); + + for (i = 0; i < 8; i++) + e[i] = source[0]; + + if (check_union256 (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-setzero-pd-256-1.c b/gcc/testsuite/gcc.target/i386/avx-setzero-pd-256-1.c new file mode 100644 index 0000000..43656cf --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-setzero-pd-256-1.c @@ -0,0 +1,21 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +void static +avx_test (void) +{ + int i; + union256d u; + double e [4]; + + u.x = _mm256_setzero_pd (); + + for (i = 0; i < 4; i++) + e[i] = 0.0; + + if (check_union256d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-setzero-ps-256-1.c b/gcc/testsuite/gcc.target/i386/avx-setzero-ps-256-1.c new file mode 100644 index 0000000..ffbf431 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-setzero-ps-256-1.c @@ -0,0 +1,21 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +void static +avx_test (void) +{ + int i; + union256 u; + float e [8]; + + u.x = _mm256_setzero_ps (); + + for (i = 0; i < 8; i++) + e[i] = 0.0; + + if (check_union256 (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-setzero-si256-1.c b/gcc/testsuite/gcc.target/i386/avx-setzero-si256-1.c new file mode 100644 index 0000000..01eef2a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-setzero-si256-1.c @@ -0,0 +1,21 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +void static +avx_test (void) +{ + int i; + union256i_q u; + long long e [4]; + + u.x = _mm256_setzero_si256 (); + + for (i = 0; i < 4; i++) + e[i] = 0; + + if (check_union256i_q (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vaddpd-1.c b/gcc/testsuite/gcc.target/i386/avx-vaddpd-1.c new file mode 100644 index 0000000..afed3d0 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vaddpd-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-addpd-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vaddpd-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vaddpd-256-1.c new file mode 100644 index 0000000..2d03943 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vaddpd-256-1.c @@ -0,0 +1,23 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +void static +avx_test (void) +{ + int i; + union256d u, s1, s2; + double e [4]; + + s1.x = _mm256_set_pd (2134.3343,1234.635654,453.345635,54646.464356); + s2.x = _mm256_set_pd (41124.234,2344.2354,8653.65635,856.43576); + u.x = _mm256_add_pd (s1.x, s2.x); + + for (i = 0; i < 4; i++) + e[i] = s1.a[i] + s2.a[i]; + + if (check_union256d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vaddps-1.c b/gcc/testsuite/gcc.target/i386/avx-vaddps-1.c new file mode 100644 index 0000000..ba90509 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vaddps-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse-addps-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vaddps-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vaddps-256-1.c new file mode 100644 index 0000000..363a4de --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vaddps-256-1.c @@ -0,0 +1,23 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +void static +avx_test (void) +{ + int i; + union256 u, s1, s2; + float e [8]; + + s1.x = _mm256_set_ps (24.43, 68.346, 43.35, 546.46, 46.79, 82.78, 82.7, 9.4); + s2.x = _mm256_set_ps (1.17, 2.16, 3.15, 4.14, 5.13, 6.12, 7.11, 8.9); + u.x = _mm256_add_ps (s1.x, s2.x); + + for (i = 0; i < 8; i++) + e[i] = s1.a[i] + s2.a[i]; + + if (check_union256 (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vaddsd-1.c b/gcc/testsuite/gcc.target/i386/avx-vaddsd-1.c new file mode 100644 index 0000000..5c562a0 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vaddsd-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-addsd-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vaddss-1.c b/gcc/testsuite/gcc.target/i386/avx-vaddss-1.c new file mode 100644 index 0000000..093f61b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vaddss-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse-addss-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vaddsubpd-1.c b/gcc/testsuite/gcc.target/i386/avx-vaddsubpd-1.c new file mode 100644 index 0000000..7c0fc2f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vaddsubpd-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx -mfpmath=sse" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse3-addsubpd.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vaddsubpd-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vaddsubpd-256-1.c new file mode 100644 index 0000000..7f431ec --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vaddsubpd-256-1.c @@ -0,0 +1,26 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +void static +avx_test (void) +{ + int i; + union256d u, s1, s2; + double e [4]; + + s1.x = _mm256_set_pd (2134.3343,1234.635654,453.345635,54646.464356); + s2.x = _mm256_set_pd (41124.234,2344.2354,8653.65635,856.43576); + u.x = _mm256_addsub_pd (s1.x, s2.x); + + for (i = 0; i < 4; i++) + if (i % 2) + e[i] = s1.a[i] + s2.a[i]; + else + e[i] = s1.a[i] - s2.a[i]; + + if (check_union256d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vaddsubps-1.c b/gcc/testsuite/gcc.target/i386/avx-vaddsubps-1.c new file mode 100644 index 0000000..1dbe3f3 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vaddsubps-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx -mfpmath=sse" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse3-addsubps.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vaddsubps-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vaddsubps-256-1.c new file mode 100644 index 0000000..e6977f9 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vaddsubps-256-1.c @@ -0,0 +1,26 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +void static +avx_test (void) +{ + int i; + union256 u, s1, s2; + float e [8]; + + s1.x = _mm256_set_ps (24.43, 68.346, 43.35, 546.46, 46.79, 82.78, 82.7, 9.4); + s2.x = _mm256_set_ps (1.17, 2.16, 3.15, 4.14, 5.13, 6.12, 7.11, 8.9); + u.x = _mm256_addsub_ps (s1.x, s2.x); + + for (i = 0; i < 8; i++) + if (i % 2) + e[i] = s1.a[i] + s2.a[i]; + else + e[i] = s1.a[i] - s2.a[i]; + + if (check_union256 (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vaesdec-1.c b/gcc/testsuite/gcc.target/i386/avx-vaesdec-1.c new file mode 100644 index 0000000..c926dd1 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vaesdec-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target vaes } */ +/* { dg-options "-O2 -maes -mavx" } */ + +#define CHECK_H "aes-avx-check.h" +#define TEST aes_avx_test + +#include "aesdec.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vaesdeclast-1.c b/gcc/testsuite/gcc.target/i386/avx-vaesdeclast-1.c new file mode 100644 index 0000000..4674626 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vaesdeclast-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target vaes } */ +/* { dg-options "-O2 -maes -mavx" } */ + +#define CHECK_H "aes-avx-check.h" +#define TEST aes_avx_test + +#include "aesdeclast.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vaesenc-1.c b/gcc/testsuite/gcc.target/i386/avx-vaesenc-1.c new file mode 100644 index 0000000..313f101 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vaesenc-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target vaes } */ +/* { dg-options "-O2 -maes -mavx" } */ + +#define CHECK_H "aes-avx-check.h" +#define TEST aes_avx_test + +#include "aesenc.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vaesenclast-1.c b/gcc/testsuite/gcc.target/i386/avx-vaesenclast-1.c new file mode 100644 index 0000000..0df9130 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vaesenclast-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target vaes } */ +/* { dg-options "-O2 -maes -mavx" } */ + +#define CHECK_H "aes-avx-check.h" +#define TEST aes_avx_test + +#include "aesenclast.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vaesimc-1.c b/gcc/testsuite/gcc.target/i386/avx-vaesimc-1.c new file mode 100644 index 0000000..29f910a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vaesimc-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target vaes } */ +/* { dg-options "-O2 -maes -mavx" } */ + +#define CHECK_H "aes-avx-check.h" +#define TEST aes_avx_test + +#include "aesimc.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vaeskeygenassist-1.c b/gcc/testsuite/gcc.target/i386/avx-vaeskeygenassist-1.c new file mode 100644 index 0000000..7c0d564 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vaeskeygenassist-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target vaes } */ +/* { dg-options "-O2 -maes -mavx" } */ + +#define CHECK_H "aes-avx-check.h" +#define TEST aes_avx_test + +#include "aeskeygenassist.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vandnpd-1.c b/gcc/testsuite/gcc.target/i386/avx-vandnpd-1.c new file mode 100644 index 0000000..c5f3c1d --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vandnpd-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-andnpd-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vandnpd-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vandnpd-256-1.c new file mode 100644 index 0000000..27e4ccd --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vandnpd-256-1.c @@ -0,0 +1,28 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +void static +avx_test (void) +{ + int i; + union256d u, s1, s2; + long long source1[4]={34545, 95567, 23443, 5675}; + long long source2[4]={674, 57897, 93459, 45624}; + long long d[4]; + long long e[4]; + + s1.x = _mm256_loadu_pd ((double *)source1); + s2.x = _mm256_loadu_pd ((double *)source2); + u.x = _mm256_andnot_pd (s1.x, s2.x); + + _mm256_storeu_pd ((double *)d, u.x); + + for (i = 0; i < 4; i++) + e[i] = (~source1[i]) & source2[i]; + + if (checkVl (d, e, 4)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vandnps-1.c b/gcc/testsuite/gcc.target/i386/avx-vandnps-1.c new file mode 100644 index 0000000..357db7e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vandnps-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse-andnps-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vandnps-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vandnps-256-1.c new file mode 100644 index 0000000..7b5a3db --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vandnps-256-1.c @@ -0,0 +1,28 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +void static +avx_test (void) +{ + int i; + union256 u, s1, s2; + int source1[8]={34545, 95567, 23443, 5675, 2323, 67, 2345, 45667}; + int source2[8]={674, 57897, 93459, 45624, 54674, 1237, 67436, 79608}; + int d[8]; + int e[8]; + + s1.x = _mm256_loadu_ps ((float *)source1); + s2.x = _mm256_loadu_ps ((float *)source2); + u.x = _mm256_andnot_ps (s1.x, s2.x); + + _mm256_storeu_ps ((float *)d, u.x); + + for (i = 0; i < 8; i++) + e[i] = (~source1[i]) & source2[i]; + + if (checkVi (d, e, 8)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vandpd-1.c b/gcc/testsuite/gcc.target/i386/avx-vandpd-1.c new file mode 100644 index 0000000..0a9532d --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vandpd-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-andpd-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vandpd-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vandpd-256-1.c new file mode 100644 index 0000000..b0675ec --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vandpd-256-1.c @@ -0,0 +1,32 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +void static +avx_test (void) +{ + int i; + union256d u, s1, s2; + + union + { + double d[4]; + long long ll[4]; + }source1, source2, e; + + s1.x = _mm256_set_pd (345.45, 95567, 2344.3, 567.5); + s2.x = _mm256_set_pd (674, 57.897, 934.59, 4562.4); + + _mm256_storeu_pd (source1.d, s1.x); + _mm256_storeu_pd (source2.d, s2.x); + + u.x = _mm256_and_pd (s1.x, s2.x); + + for (i = 0; i < 4; i++) + e.ll[i] = source1.ll[i] & source2.ll[i]; + + if (check_union256d (u, e.d)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vandps-1.c b/gcc/testsuite/gcc.target/i386/avx-vandps-1.c new file mode 100644 index 0000000..54bba79 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vandps-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse-andps-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vandps-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vandps-256-1.c new file mode 100644 index 0000000..4dc123b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vandps-256-1.c @@ -0,0 +1,32 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +void static +avx_test (void) +{ + int i; + union256 u, s1, s2; + + union + { + float f[8]; + int i[8]; + }source1, source2, e; + + s1.x = _mm256_set_ps (34545, 95567, 23443, 5675, 2323, 67, 2345, 45667); + s2.x = _mm256_set_ps (674, 57897, 93459, 45624, 54674, 1237, 67436, 79608); + + _mm256_storeu_ps (source1.f, s1.x); + _mm256_storeu_ps (source2.f, s2.x); + + u.x = _mm256_and_ps (s1.x, s2.x); + + for (i = 0; i < 8; i++) + e.i[i] = source1.i[i] & source2.i[i]; + + if (check_union256 (u, e.f)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vblendpd-1.c b/gcc/testsuite/gcc.target/i386/avx-vblendpd-1.c new file mode 100644 index 0000000..0a9031f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vblendpd-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse4_1-blendpd.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vblendpd-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vblendpd-256-1.c new file mode 100644 index 0000000..39e7c1b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vblendpd-256-1.c @@ -0,0 +1,27 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +#ifndef MASK +#define MASK 12 +#endif + +void static +avx_test (void) +{ + int i; + union256d u, s1, s2; + double e [4]; + + s1.x = _mm256_set_pd (34545, 95567, 23443, 5675); + s2.x = _mm256_set_pd (674, 57897, 93459, 45624); + u.x = _mm256_blend_pd (s1.x, s2.x, MASK); + + for (i = 0; i < 4; i++) + e[i] = (MASK & (0x01 << i)) ? s2.a[i] : s1.a[i]; + + if (check_union256d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vblendps-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vblendps-256-1.c new file mode 100644 index 0000000..9f5dde2 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vblendps-256-1.c @@ -0,0 +1,27 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +#ifndef MASK +#define MASK 114 +#endif + +void static +avx_test (void) +{ + int i; + union256 u, s1, s2; + float e [8]; + + s1.x = _mm256_set_ps (34545, 95567, 23443, 5675, 2323, 67, 2345, 45667); + s2.x = _mm256_set_ps (674, 57897, 93459, 45624, 54674, 1237, 67436, 79608); + u.x = _mm256_blend_ps (s1.x, s2.x, MASK); + + for (i = 0; i < 8; i++) + e[i] = (MASK & (0x01 << i)) ? s2.a[i] : s1.a[i]; + + if (check_union256 (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vblendvpd-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vblendvpd-256-1.c new file mode 100644 index 0000000..2f668c2 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vblendvpd-256-1.c @@ -0,0 +1,32 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +#ifndef MASK +#define MASK 6 +#endif + +#define mask_v(pos) (((MASK >> (pos)) & 1ULL) << 63) + +void static +avx_test (void) +{ + int i; + union256d u, mask, s1, s2; + long long m[4]={mask_v(0), mask_v(1), mask_v(2), mask_v(3)}; + double e [4]; + + s1.x = _mm256_set_pd (34545, 95567, 23443, 5675); + s2.x = _mm256_set_pd (674, 57897, 93459, 45624); + mask.x = _mm256_set_pd (m[0], m[1], m[2], m[3]); + + u.x = _mm256_blendv_pd (s1.x, s2.x, mask.x); + + for (i = 0; i < 4; i++) + e[i] = (m[i] & (1ULL << 63)) ? s2.a[i] : s1.a[i]; + + if (check_union256d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vblendvps-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vblendvps-256-1.c new file mode 100644 index 0000000..0e48d69 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vblendvps-256-1.c @@ -0,0 +1,33 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +#ifndef MASK +#define MASK 214 +#endif + +#define mask_v(pos) (((MASK >> (pos)) & 1U) << 31) + +void static +avx_test (void) +{ + int i; + union256 u, mask, s1, s2; + int m[8]={mask_v(0), mask_v(1), mask_v(2), mask_v(3), + mask_v(4), mask_v(5), mask_v(6), mask_v(7)}; + float e [8]; + + s1.x = _mm256_set_ps (34545, 95567, 23443, 5675, 2323, 67, 2345, 45667); + s2.x = _mm256_set_ps (674, 57897, 93459, 45624, 54674, 1237, 67436, 79608); + mask.x = _mm256_loadu_ps ((float *)m); + + u.x = _mm256_blendv_ps (s1.x, s2.x, mask.x); + + for (i = 0; i < 8; i++) + e[i] = (m[i] & (1ULL << 31)) ? s2.a[i] : s1.a[i]; + + if (check_union256 (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vbroadcastf128-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vbroadcastf128-256-1.c new file mode 100644 index 0000000..e0cddd1 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vbroadcastf128-256-1.c @@ -0,0 +1,23 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +void static +avx_test (void) +{ + int i; + union256 u; + union128 s; + float e [8]; + + s.x = _mm_set_ps(24.43, 68.346, 43.35, 546.46); + u.x = _mm256_broadcast_ps (&s.x); + + for (i = 0; i < 4; i++) + e[i+4] = e[i] = s.a[i]; + + if (check_union256 (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vbroadcastf128-256-2.c b/gcc/testsuite/gcc.target/i386/avx-vbroadcastf128-256-2.c new file mode 100644 index 0000000..eb4ec57 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vbroadcastf128-256-2.c @@ -0,0 +1,22 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +void static +avx_test (void) +{ + union256d u; + union128d s; + double e [4]; + + s.x = _mm_set_pd(24.43, 68.346); + u.x = _mm256_broadcast_pd (&s.x); + + e[0] = e[2] = s.a[0]; + e[1] = e[3] = s.a[1]; + + if (check_union256d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vbroadcastsd-1.c b/gcc/testsuite/gcc.target/i386/avx-vbroadcastsd-1.c new file mode 100644 index 0000000..329405f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vbroadcastsd-1.c @@ -0,0 +1,22 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +void static +avx_test (void) +{ + int i; + double s = 39678; + union256d u; + double e [4]; + + u.x = _mm256_broadcast_sd (&s); + + for (i = 0; i < 4; i++) + e[i] = s; + + if (check_union256d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vbroadcastss-1.c b/gcc/testsuite/gcc.target/i386/avx-vbroadcastss-1.c new file mode 100644 index 0000000..d6bf2ce --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vbroadcastss-1.c @@ -0,0 +1,22 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +void static +avx_test (void) +{ + int i; + float s = 39678.3452; + union256 u; + float e [8]; + + u.x = _mm256_broadcast_ss (&s); + + for (i = 0; i < 8; i++) + e[i] = s; + + if (check_union256 (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vbroadcastss-2.c b/gcc/testsuite/gcc.target/i386/avx-vbroadcastss-2.c new file mode 100644 index 0000000..56723cb --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vbroadcastss-2.c @@ -0,0 +1,22 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +void static +avx_test (void) +{ + int i; + float s = 39678.3452; + union128 u; + float e [4]; + + u.x = _mm_broadcast_ss (&s); + + for (i = 0; i < 4; i++) + e[i] = s; + + if (check_union128 (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vcmppd-1.c b/gcc/testsuite/gcc.target/i386/avx-vcmppd-1.c new file mode 100644 index 0000000..be69d47 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vcmppd-1.c @@ -0,0 +1,78 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx -std=c99" } */ + +#include "avx-check.h" +#include + +double s1[2]={2134.3343,6678.346}; +double s2[2]={41124.234,6678.346}; +long long e[2]; + +union +{ + double d[2]; + long long ll[2]; +}d; + +void check(unsigned imm, char *id) +{ + if(checkVl(d.ll, e, 2)){ + printf("mm_cmp_pd(%s: 0x%x) FAILED\n", id, imm); + } +} + +#define CMP(imm, rel) \ + for (i = 0; i < 2; i++) e[i] = rel ? -1 : 0; \ + source1 = _mm_loadu_pd(s1); \ + source2 = _mm_loadu_pd(s2); \ + dest = _mm_cmp_pd(source1, source2, imm); \ + _mm_storeu_pd(d.d, dest); \ + check(imm, "" #imm ""); + +static void +avx_test () +{ + __m128d source1, source2, dest; + int i; + + d.ll[0] = e[0] = 222; + d.ll[1] = e[1] = -33; + + CMP(_CMP_EQ_OQ, !isunordered(s1[i], s2[i]) && s1[i] == s2[i]); + CMP(_CMP_LT_OS, !isunordered(s1[i], s2[i]) && s1[i] < s2[i]); + CMP(_CMP_LE_OS, !isunordered(s1[i], s2[i]) && s1[i] <= s2[i]); + CMP(_CMP_UNORD_Q, isunordered(s1[i], s2[i])); + CMP(_CMP_NEQ_UQ, isunordered(s1[i], s2[i]) || s1[i] != s2[i]); + CMP(_CMP_NLT_US, isunordered(s1[i], s2[i]) || s1[i] >= s2[i]); + CMP(_CMP_NLE_US, isunordered(s1[i], s2[i]) || s1[i] > s2[i]); + CMP(_CMP_ORD_Q, !isunordered(s1[i], s2[i])); + + CMP(_CMP_EQ_UQ, isunordered(s1[i], s2[i]) || s1[i] == s2[i]); + CMP(_CMP_NGE_US, isunordered(s1[i], s2[i]) || s1[i] < s2[i]); + CMP(_CMP_NGT_US, isunordered(s1[i], s2[i]) || s1[i] <= s2[i]); + + CMP(_CMP_FALSE_OQ, 0); + CMP(_CMP_NEQ_OQ, !isunordered(s1[i], s2[i]) && s1[i] != s2[i]); + CMP(_CMP_GE_OS, !isunordered(s1[i], s2[i]) && s1[i] >= s2[i]); + CMP(_CMP_GT_OS, !isunordered(s1[i], s2[i]) && s1[i] > s2[i]); + CMP(_CMP_TRUE_UQ, 1); + + CMP(_CMP_EQ_OS, !isunordered(s1[i], s2[i]) && s1[i] == s2[i]); + CMP(_CMP_LT_OQ, !isunordered(s1[i], s2[i]) && s1[i] < s2[i]); + CMP(_CMP_LE_OQ, !isunordered(s1[i], s2[i]) && s1[i] <= s2[i]); + CMP(_CMP_UNORD_S, isunordered(s1[i], s2[i])); + CMP(_CMP_NEQ_US, isunordered(s1[i], s2[i]) || s1[i] != s2[i]); + CMP(_CMP_NLT_UQ, isunordered(s1[i], s2[i]) || s1[i] >= s2[i]); + CMP(_CMP_NLE_UQ, isunordered(s1[i], s2[i]) || s1[i] > s2[i]); + CMP(_CMP_ORD_S, !isunordered(s1[i], s2[i])); + CMP(_CMP_EQ_US, isunordered(s1[i], s2[i]) || s1[i] == s2[i]); + CMP(_CMP_NGE_UQ, isunordered(s1[i], s2[i]) || s1[i] < s2[i]); + CMP(_CMP_NGT_UQ, isunordered(s1[i], s2[i]) || s1[i] <= s2[i]); + CMP(_CMP_FALSE_OS, 0); + CMP(_CMP_NEQ_OS, !isunordered(s1[i], s2[i]) && s1[i] != s2[i]); + CMP(_CMP_GE_OQ, !isunordered(s1[i], s2[i]) && s1[i] >= s2[i]); + CMP(_CMP_GT_OQ, !isunordered(s1[i], s2[i]) && s1[i] > s2[i]); + CMP(_CMP_TRUE_US, 1); + +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vcmppd-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vcmppd-256-1.c new file mode 100644 index 0000000..7000bb0 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vcmppd-256-1.c @@ -0,0 +1,75 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx -std=c99" } */ + +#include "avx-check.h" +#include + +double s1[4]={2134.3343,6678.346,453.345635,54646.464356}; +double s2[4]={41124.234,6678.346,8653.65635,856.43576}; +long long e[4]; + +union +{ + double d[4]; + long long ll[4]; +}d; + +void check(unsigned imm, char *id) +{ + if(checkVl(d.ll, e, 4)){ + printf("mm256_cmp_pd(%s: 0x%x) FAILED\n", id, imm); + } +} + +#define CMP(imm, rel) \ + for (i = 0; i < 4; i++) e[i] = rel ? -1 : 0; \ + source1 = _mm256_loadu_pd(s1); \ + source2 = _mm256_loadu_pd(s2); \ + dest = _mm256_cmp_pd(source1, source2, imm); \ + _mm256_storeu_pd(d.d, dest); \ + check(imm, "" #imm ""); + +static void +avx_test () +{ + __m256d source1, source2, dest; + int i; + + CMP(_CMP_EQ_OQ, !isunordered(s1[i], s2[i]) && s1[i] == s2[i]); + CMP(_CMP_LT_OS, !isunordered(s1[i], s2[i]) && s1[i] < s2[i]); + CMP(_CMP_LE_OS, !isunordered(s1[i], s2[i]) && s1[i] <= s2[i]); + CMP(_CMP_UNORD_Q, isunordered(s1[i], s2[i])); + CMP(_CMP_NEQ_UQ, isunordered(s1[i], s2[i]) || s1[i] != s2[i]); + CMP(_CMP_NLT_US, isunordered(s1[i], s2[i]) || s1[i] >= s2[i]); + CMP(_CMP_NLE_US, isunordered(s1[i], s2[i]) || s1[i] > s2[i]); + CMP(_CMP_ORD_Q, !isunordered(s1[i], s2[i])); + + CMP(_CMP_EQ_UQ, isunordered(s1[i], s2[i]) || s1[i] == s2[i]); + CMP(_CMP_NGE_US, isunordered(s1[i], s2[i]) || s1[i] < s2[i]); + CMP(_CMP_NGT_US, isunordered(s1[i], s2[i]) || s1[i] <= s2[i]); + + CMP(_CMP_FALSE_OQ, 0); + CMP(_CMP_NEQ_OQ, !isunordered(s1[i], s2[i]) && s1[i] != s2[i]); + CMP(_CMP_GE_OS, !isunordered(s1[i], s2[i]) && s1[i] >= s2[i]); + CMP(_CMP_GT_OS, !isunordered(s1[i], s2[i]) && s1[i] > s2[i]); + CMP(_CMP_TRUE_UQ, 1); + + CMP(_CMP_EQ_OS, !isunordered(s1[i], s2[i]) && s1[i] == s2[i]); + CMP(_CMP_LT_OQ, !isunordered(s1[i], s2[i]) && s1[i] < s2[i]); + CMP(_CMP_LE_OQ, !isunordered(s1[i], s2[i]) && s1[i] <= s2[i]); + CMP(_CMP_UNORD_S, isunordered(s1[i], s2[i])); + CMP(_CMP_NEQ_US, isunordered(s1[i], s2[i]) || s1[i] != s2[i]); + CMP(_CMP_NLT_UQ, isunordered(s1[i], s2[i]) || s1[i] >= s2[i]); + CMP(_CMP_NLE_UQ, isunordered(s1[i], s2[i]) || s1[i] > s2[i]); + CMP(_CMP_ORD_S, !isunordered(s1[i], s2[i])); + CMP(_CMP_EQ_US, isunordered(s1[i], s2[i]) || s1[i] == s2[i]); + CMP(_CMP_NGE_UQ, isunordered(s1[i], s2[i]) || s1[i] < s2[i]); + CMP(_CMP_NGT_UQ, isunordered(s1[i], s2[i]) || s1[i] <= s2[i]); + CMP(_CMP_FALSE_OS, 0); + CMP(_CMP_NEQ_OS, !isunordered(s1[i], s2[i]) && s1[i] != s2[i]); + CMP(_CMP_GE_OQ, !isunordered(s1[i], s2[i]) && s1[i] >= s2[i]); + CMP(_CMP_GT_OQ, !isunordered(s1[i], s2[i]) && s1[i] > s2[i]); + CMP(_CMP_TRUE_US, 1); + +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vcmpps-1.c b/gcc/testsuite/gcc.target/i386/avx-vcmpps-1.c new file mode 100644 index 0000000..753f2ce --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vcmpps-1.c @@ -0,0 +1,74 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx -std=c99" } */ + +#include "avx-check.h" +#include + +float s1[4]={2134.3343,6678.346,453.345635,54646.464356}; +float s2[4]={41124.234,6678.346,8653.65635,856.43576}; +int e[4]; + +union +{ + float f[4]; + int i[4]; +}d; + +void check(unsigned imm, char *id) +{ + if(checkVi(d.i, e, 4)){ + printf("mm_cmp_ps(0x%x, %s) FAILED\n", imm, id); + } +} + +static void +avx_test () +{ + __m128 source1, source2, dest; + int i; + +#define CMP(imm, rel) \ + for (i = 0; i < 4; i++) e[i] = rel ? -1 : 0; \ + source1 = _mm_loadu_ps(s1); \ + source2 = _mm_loadu_ps(s2); \ + dest = _mm_cmp_ps(source1, source2, imm); \ + _mm_storeu_ps(d.f, dest); \ + check(imm, "" #imm ""); + + CMP(_CMP_EQ_OQ, !isunordered(s1[i], s2[i]) && s1[i] == s2[i]); + CMP(_CMP_LT_OS, !isunordered(s1[i], s2[i]) && s1[i] < s2[i]); + CMP(_CMP_LE_OS, !isunordered(s1[i], s2[i]) && s1[i] <= s2[i]); + CMP(_CMP_UNORD_Q, isunordered(s1[i], s2[i])); + CMP(_CMP_NEQ_UQ, isunordered(s1[i], s2[i]) || s1[i] != s2[i]); + CMP(_CMP_NLT_US, isunordered(s1[i], s2[i]) || s1[i] >= s2[i]); + CMP(_CMP_NLE_US, isunordered(s1[i], s2[i]) || s1[i] > s2[i]); + CMP(_CMP_ORD_Q, !isunordered(s1[i], s2[i])); + + CMP(_CMP_EQ_UQ, isunordered(s1[i], s2[i]) || s1[i] == s2[i]); + CMP(_CMP_NGE_US, isunordered(s1[i], s2[i]) || s1[i] < s2[i]); + CMP(_CMP_NGT_US, isunordered(s1[i], s2[i]) || s1[i] <= s2[i]); + + CMP(_CMP_FALSE_OQ, 0); + CMP(_CMP_NEQ_OQ, !isunordered(s1[i], s2[i]) && s1[i] != s2[i]); + CMP(_CMP_GE_OS, !isunordered(s1[i], s2[i]) && s1[i] >= s2[i]); + CMP(_CMP_GT_OS, !isunordered(s1[i], s2[i]) && s1[i] > s2[i]); + CMP(_CMP_TRUE_UQ, 1); + + CMP(_CMP_EQ_OS, !isunordered(s1[i], s2[i]) && s1[i] == s2[i]); + CMP(_CMP_LT_OQ, !isunordered(s1[i], s2[i]) && s1[i] < s2[i]); + CMP(_CMP_LE_OQ, !isunordered(s1[i], s2[i]) && s1[i] <= s2[i]); + CMP(_CMP_UNORD_S, isunordered(s1[i], s2[i])); + CMP(_CMP_NEQ_US, isunordered(s1[i], s2[i]) || s1[i] != s2[i]); + CMP(_CMP_NLT_UQ, isunordered(s1[i], s2[i]) || s1[i] >= s2[i]); + CMP(_CMP_NLE_UQ, isunordered(s1[i], s2[i]) || s1[i] > s2[i]); + CMP(_CMP_ORD_S, !isunordered(s1[i], s2[i])); + CMP(_CMP_EQ_US, isunordered(s1[i], s2[i]) || s1[i] == s2[i]); + CMP(_CMP_NGE_UQ, isunordered(s1[i], s2[i]) || s1[i] < s2[i]); + CMP(_CMP_NGT_UQ, isunordered(s1[i], s2[i]) || s1[i] <= s2[i]); + CMP(_CMP_FALSE_OS, 0); + CMP(_CMP_NEQ_OS, !isunordered(s1[i], s2[i]) && s1[i] != s2[i]); + CMP(_CMP_GE_OQ, !isunordered(s1[i], s2[i]) && s1[i] >= s2[i]); + CMP(_CMP_GT_OQ, !isunordered(s1[i], s2[i]) && s1[i] > s2[i]); + CMP(_CMP_TRUE_US, 1); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vcmpps-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vcmpps-256-1.c new file mode 100644 index 0000000..c1292a2 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vcmpps-256-1.c @@ -0,0 +1,74 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx -std=c99" } */ + +#include "avx-check.h" +#include + +float s1[8]={2134.3343,6678.346,453.345635,54646.464356,456,678567,123,2346}; +float s2[8]={41124.234,6678.346,8653.65635,856.43576,7456,134,539,54674}; +int e[8]; + +union +{ + float f[8]; + int i[8]; +}d; + +void check(unsigned imm, char *id) +{ + if(checkVi(d.i, e, 8)){ + printf("mm256_cmp_ps(0x%x, %s) FAILED\n", imm, id); + } +} + +static void +avx_test () +{ + __m256 source1, source2, dest; + int i; + +#define CMP(imm, rel) \ + for (i = 0; i < 8; i++) e[i] = rel ? -1 : 0; \ + source1 = _mm256_loadu_ps(s1); \ + source2 = _mm256_loadu_ps(s2); \ + dest = _mm256_cmp_ps(source1, source2, imm); \ + _mm256_storeu_ps(d.f, dest); \ + check(imm, "" #imm ""); + + CMP(_CMP_EQ_OQ, !isunordered(s1[i], s2[i]) && s1[i] == s2[i]); + CMP(_CMP_LT_OS, !isunordered(s1[i], s2[i]) && s1[i] < s2[i]); + CMP(_CMP_LE_OS, !isunordered(s1[i], s2[i]) && s1[i] <= s2[i]); + CMP(_CMP_UNORD_Q, isunordered(s1[i], s2[i])); + CMP(_CMP_NEQ_UQ, isunordered(s1[i], s2[i]) || s1[i] != s2[i]); + CMP(_CMP_NLT_US, isunordered(s1[i], s2[i]) || s1[i] >= s2[i]); + CMP(_CMP_NLE_US, isunordered(s1[i], s2[i]) || s1[i] > s2[i]); + CMP(_CMP_ORD_Q, !isunordered(s1[i], s2[i])); + + CMP(_CMP_EQ_UQ, isunordered(s1[i], s2[i]) || s1[i] == s2[i]); + CMP(_CMP_NGE_US, isunordered(s1[i], s2[i]) || s1[i] < s2[i]); + CMP(_CMP_NGT_US, isunordered(s1[i], s2[i]) || s1[i] <= s2[i]); + + CMP(_CMP_FALSE_OQ, 0); + CMP(_CMP_NEQ_OQ, !isunordered(s1[i], s2[i]) && s1[i] != s2[i]); + CMP(_CMP_GE_OS, !isunordered(s1[i], s2[i]) && s1[i] >= s2[i]); + CMP(_CMP_GT_OS, !isunordered(s1[i], s2[i]) && s1[i] > s2[i]); + CMP(_CMP_TRUE_UQ, 1); + + CMP(_CMP_EQ_OS, !isunordered(s1[i], s2[i]) && s1[i] == s2[i]); + CMP(_CMP_LT_OQ, !isunordered(s1[i], s2[i]) && s1[i] < s2[i]); + CMP(_CMP_LE_OQ, !isunordered(s1[i], s2[i]) && s1[i] <= s2[i]); + CMP(_CMP_UNORD_S, isunordered(s1[i], s2[i])); + CMP(_CMP_NEQ_US, isunordered(s1[i], s2[i]) || s1[i] != s2[i]); + CMP(_CMP_NLT_UQ, isunordered(s1[i], s2[i]) || s1[i] >= s2[i]); + CMP(_CMP_NLE_UQ, isunordered(s1[i], s2[i]) || s1[i] > s2[i]); + CMP(_CMP_ORD_S, !isunordered(s1[i], s2[i])); + CMP(_CMP_EQ_US, isunordered(s1[i], s2[i]) || s1[i] == s2[i]); + CMP(_CMP_NGE_UQ, isunordered(s1[i], s2[i]) || s1[i] < s2[i]); + CMP(_CMP_NGT_UQ, isunordered(s1[i], s2[i]) || s1[i] <= s2[i]); + CMP(_CMP_FALSE_OS, 0); + CMP(_CMP_NEQ_OS, !isunordered(s1[i], s2[i]) && s1[i] != s2[i]); + CMP(_CMP_GE_OQ, !isunordered(s1[i], s2[i]) && s1[i] >= s2[i]); + CMP(_CMP_GT_OQ, !isunordered(s1[i], s2[i]) && s1[i] > s2[i]); + CMP(_CMP_TRUE_US, 1); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vcmpsd-1.c b/gcc/testsuite/gcc.target/i386/avx-vcmpsd-1.c new file mode 100644 index 0000000..97ca6e6 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vcmpsd-1.c @@ -0,0 +1,71 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx -std=c99" } */ + +#include "avx-check.h" +#include + +double s1[] = {2134.3343, 6678.346}; +double s2[] = {41124.234, 6678.346}; +long long dd[] = {1, 2}, d[2]; +union{long long l[2]; double d[2];} e; + +void check(unsigned imm, char *id) +{ + if(checkVl(d, e.l, 2)){ + printf("mm_cmp_sd(%s: 0x%x) FAILED\n", id, imm); + } +} + +#define CMP(imm, rel) \ + e.l[0] = rel ? -1 : 0; \ + dest = _mm_loadu_pd((double*)dd); \ + source1 = _mm_loadu_pd(s1); \ + source2 = _mm_loadu_pd(s2); \ + dest = _mm_cmp_sd(source1, source2, imm); \ + _mm_storeu_pd((double*) d, dest); \ + check(imm, "" #imm ""); + +static void +avx_test () +{ + __m128d source1, source2, dest; + + e.d[1] = s1[1]; + + CMP(_CMP_EQ_OQ, !isunordered(s1[0], s2[0]) && s1[0] == s2[0]); + CMP(_CMP_LT_OS, !isunordered(s1[0], s2[0]) && s1[0] < s2[0]); + CMP(_CMP_LE_OS, !isunordered(s1[0], s2[0]) && s1[0] <= s2[0]); + CMP(_CMP_UNORD_Q, isunordered(s1[0], s2[0])); + CMP(_CMP_NEQ_UQ, isunordered(s1[0], s2[0]) || s1[0] != s2[0]); + CMP(_CMP_NLT_US, isunordered(s1[0], s2[0]) || s1[0] >= s2[0]); + CMP(_CMP_NLE_US, isunordered(s1[0], s2[0]) || s1[0] > s2[0]); + CMP(_CMP_ORD_Q, !isunordered(s1[0], s2[0])); + + CMP(_CMP_EQ_UQ, isunordered(s1[0], s2[0]) || s1[0] == s2[0]); + CMP(_CMP_NGE_US, isunordered(s1[0], s2[0]) || s1[0] < s2[0]); + CMP(_CMP_NGT_US, isunordered(s1[0], s2[0]) || s1[0] <= s2[0]); + + CMP(_CMP_FALSE_OQ, 0); + CMP(_CMP_NEQ_OQ, !isunordered(s1[0], s2[0]) && s1[0] != s2[0]); + CMP(_CMP_GE_OS, !isunordered(s1[0], s2[0]) && s1[0] >= s2[0]); + CMP(_CMP_GT_OS, !isunordered(s1[0], s2[0]) && s1[0] > s2[0]); + CMP(_CMP_TRUE_UQ, 1); + + CMP(_CMP_EQ_OS, !isunordered(s1[0], s2[0]) && s1[0] == s2[0]); + CMP(_CMP_LT_OQ, !isunordered(s1[0], s2[0]) && s1[0] < s2[0]); + CMP(_CMP_LE_OQ, !isunordered(s1[0], s2[0]) && s1[0] <= s2[0]); + CMP(_CMP_UNORD_S, isunordered(s1[0], s2[0])); + CMP(_CMP_NEQ_US, isunordered(s1[0], s2[0]) || s1[0] != s2[0]); + CMP(_CMP_NLT_UQ, isunordered(s1[0], s2[0]) || s1[0] >= s2[0]); + CMP(_CMP_NLE_UQ, isunordered(s1[0], s2[0]) || s1[0] > s2[0]); + CMP(_CMP_ORD_S, !isunordered(s1[0], s2[0])); + CMP(_CMP_EQ_US, isunordered(s1[0], s2[0]) || s1[0] == s2[0]); + CMP(_CMP_NGE_UQ, isunordered(s1[0], s2[0]) || s1[0] < s2[0]); + CMP(_CMP_NGT_UQ, isunordered(s1[0], s2[0]) || s1[0] <= s2[0]); + CMP(_CMP_FALSE_OS, 0); + CMP(_CMP_NEQ_OS, !isunordered(s1[0], s2[0]) && s1[0] != s2[0]); + CMP(_CMP_GE_OQ, !isunordered(s1[0], s2[0]) && s1[0] >= s2[0]); + CMP(_CMP_GT_OQ, !isunordered(s1[0], s2[0]) && s1[0] > s2[0]); + CMP(_CMP_TRUE_US, 1); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vcmpss-1.c b/gcc/testsuite/gcc.target/i386/avx-vcmpss-1.c new file mode 100644 index 0000000..627333a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vcmpss-1.c @@ -0,0 +1,73 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx -std=c99" } */ + +#include "avx-check.h" +#include + +float s1[]={2134.3343, 6678.346, 453.345635, 54646.464356}; +float s2[]={41124.234, 6678.346, 8653.65635, 856.43576}; +int dd[] = {1, 2, 3, 4}; +float d[4]; +union{int i[4]; float f[4];} e; + +void check(unsigned imm, char *id) +{ + if(checkVi((int*)d, e.i, 4)){ + printf("mm_cmp_ss(0x%x, %s) FAILED\n", imm, id); + } +} + +static void +avx_test () +{ + __m128 source1, source2, dest; + int i; + +#define CMP(imm, rel) \ + e.i[0] = rel ? -1 : 0; \ + dest = _mm_loadu_ps((float*)dd); \ + source1 = _mm_loadu_ps(s1); \ + source2 = _mm_loadu_ps(s2); \ + dest = _mm_cmp_ss(source1, source2, imm); \ + _mm_storeu_ps(d, dest); \ + check(imm, "" #imm ""); + + for(i = 1; i < 4; i++) e.f[i] = s1[i]; + + CMP(_CMP_EQ_OQ, !isunordered(s1[0], s2[0]) && s1[0] == s2[0]); + CMP(_CMP_LT_OS, !isunordered(s1[0], s2[0]) && s1[0] < s2[0]); + CMP(_CMP_LE_OS, !isunordered(s1[0], s2[0]) && s1[0] <= s2[0]); + CMP(_CMP_UNORD_Q, isunordered(s1[0], s2[0])); + CMP(_CMP_NEQ_UQ, isunordered(s1[0], s2[0]) || s1[0] != s2[0]); + CMP(_CMP_NLT_US, isunordered(s1[0], s2[0]) || s1[0] >= s2[0]); + CMP(_CMP_NLE_US, isunordered(s1[0], s2[0]) || s1[0] > s2[0]); + CMP(_CMP_ORD_Q, !isunordered(s1[0], s2[0])); + + CMP(_CMP_EQ_UQ, isunordered(s1[0], s2[0]) || s1[0] == s2[0]); + CMP(_CMP_NGE_US, isunordered(s1[0], s2[0]) || s1[0] < s2[0]); + CMP(_CMP_NGT_US, isunordered(s1[0], s2[0]) || s1[0] <= s2[0]); + + CMP(_CMP_FALSE_OQ, 0); + CMP(_CMP_NEQ_OQ, !isunordered(s1[0], s2[0]) && s1[0] != s2[0]); + CMP(_CMP_GE_OS, !isunordered(s1[0], s2[0]) && s1[0] >= s2[0]); + CMP(_CMP_GT_OS, !isunordered(s1[0], s2[0]) && s1[0] > s2[0]); + CMP(_CMP_TRUE_UQ, 1); + + CMP(_CMP_EQ_OS, !isunordered(s1[0], s2[0]) && s1[0] == s2[0]); + CMP(_CMP_LT_OQ, !isunordered(s1[0], s2[0]) && s1[0] < s2[0]); + CMP(_CMP_LE_OQ, !isunordered(s1[0], s2[0]) && s1[0] <= s2[0]); + CMP(_CMP_UNORD_S, isunordered(s1[0], s2[0])); + CMP(_CMP_NEQ_US, isunordered(s1[0], s2[0]) || s1[0] != s2[0]); + CMP(_CMP_NLT_UQ, isunordered(s1[0], s2[0]) || s1[0] >= s2[0]); + CMP(_CMP_NLE_UQ, isunordered(s1[0], s2[0]) || s1[0] > s2[0]); + CMP(_CMP_ORD_S, !isunordered(s1[0], s2[0])); + CMP(_CMP_EQ_US, isunordered(s1[0], s2[0]) || s1[0] == s2[0]); + CMP(_CMP_NGE_UQ, isunordered(s1[0], s2[0]) || s1[0] < s2[0]); + CMP(_CMP_NGT_UQ, isunordered(s1[0], s2[0]) || s1[0] <= s2[0]); + CMP(_CMP_FALSE_OS, 0); + CMP(_CMP_NEQ_OS, !isunordered(s1[0], s2[0]) && s1[0] != s2[0]); + CMP(_CMP_GE_OQ, !isunordered(s1[0], s2[0]) && s1[0] >= s2[0]); + CMP(_CMP_GT_OQ, !isunordered(s1[0], s2[0]) && s1[0] > s2[0]); + CMP(_CMP_TRUE_US, 1); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vcomisd-1.c b/gcc/testsuite/gcc.target/i386/avx-vcomisd-1.c new file mode 100644 index 0000000..419249b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vcomisd-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-comisd-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vcomisd-2.c b/gcc/testsuite/gcc.target/i386/avx-vcomisd-2.c new file mode 100644 index 0000000..9f757ef --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vcomisd-2.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-comisd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vcomisd-3.c b/gcc/testsuite/gcc.target/i386/avx-vcomisd-3.c new file mode 100644 index 0000000..3bb5453 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vcomisd-3.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-comisd-3.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vcomisd-4.c b/gcc/testsuite/gcc.target/i386/avx-vcomisd-4.c new file mode 100644 index 0000000..f5c7a5d --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vcomisd-4.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-comisd-4.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vcomisd-5.c b/gcc/testsuite/gcc.target/i386/avx-vcomisd-5.c new file mode 100644 index 0000000..314cb09 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vcomisd-5.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-comisd-5.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vcomisd-6.c b/gcc/testsuite/gcc.target/i386/avx-vcomisd-6.c new file mode 100644 index 0000000..72f5413 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vcomisd-6.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-comisd-6.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vcomiss-1.c b/gcc/testsuite/gcc.target/i386/avx-vcomiss-1.c new file mode 100644 index 0000000..6b214fd --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vcomiss-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse-comiss-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vcomiss-2.c b/gcc/testsuite/gcc.target/i386/avx-vcomiss-2.c new file mode 100644 index 0000000..f83b977 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vcomiss-2.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse-comiss-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vcomiss-3.c b/gcc/testsuite/gcc.target/i386/avx-vcomiss-3.c new file mode 100644 index 0000000..a2db9e9 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vcomiss-3.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse-comiss-3.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vcomiss-4.c b/gcc/testsuite/gcc.target/i386/avx-vcomiss-4.c new file mode 100644 index 0000000..530dfc0 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vcomiss-4.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse-comiss-4.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vcomiss-5.c b/gcc/testsuite/gcc.target/i386/avx-vcomiss-5.c new file mode 100644 index 0000000..b149736 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vcomiss-5.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse-comiss-5.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vcomiss-6.c b/gcc/testsuite/gcc.target/i386/avx-vcomiss-6.c new file mode 100644 index 0000000..45e94da --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vcomiss-6.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse-comiss-6.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vcvtdq2pd-1.c b/gcc/testsuite/gcc.target/i386/avx-vcvtdq2pd-1.c new file mode 100644 index 0000000..5d08be9 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vcvtdq2pd-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-cvtdq2pd-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vcvtdq2pd-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vcvtdq2pd-256-1.c new file mode 100644 index 0000000..4b39ffe --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vcvtdq2pd-256-1.c @@ -0,0 +1,23 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +void static +avx_test (void) +{ + int i; + union128i_d s1; + union256d u; + double e [4]; + + s1.x = _mm_set_epi32 (2134.3343,1234.635654,453.345635,54646.464356); + u.x = _mm256_cvtepi32_pd (s1.x); + + for (i = 0; i < 4; i++) + e[i] = (double)s1.a[i]; + + if (check_union256d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vcvtdq2ps-1.c b/gcc/testsuite/gcc.target/i386/avx-vcvtdq2ps-1.c new file mode 100644 index 0000000..1e2ad62 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vcvtdq2ps-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-cvtdq2ps-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vcvtpd2dq-1.c b/gcc/testsuite/gcc.target/i386/avx-vcvtpd2dq-1.c new file mode 100644 index 0000000..7524975 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vcvtpd2dq-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-cvtpd2dq-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vcvtpd2dq-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vcvtpd2dq-256-1.c new file mode 100644 index 0000000..30e93af --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vcvtpd2dq-256-1.c @@ -0,0 +1,23 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +void static +avx_test (void) +{ + int i; + union256d s1; + union128i_d u; + int e [4]; + + s1.x = _mm256_set_pd (2.78, 7777768.82, 23.67, 536.46); + u.x = _mm256_cvtpd_epi32 (s1.x); + + for (i = 0; i < 4; i++) + e[i] = (int)(s1.a[i] + 0.5); + + if (check_union128i_d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vcvtpd2ps-1.c b/gcc/testsuite/gcc.target/i386/avx-vcvtpd2ps-1.c new file mode 100644 index 0000000..5bc43d5 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vcvtpd2ps-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-cvtpd2ps-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vcvtpd2ps-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vcvtpd2ps-256-1.c new file mode 100644 index 0000000..987f2b2 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vcvtpd2ps-256-1.c @@ -0,0 +1,23 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +void static +avx_test (void) +{ + int i; + union256d s1; + union128 u; + float e [4]; + + s1.x = _mm256_set_pd (2.43, 68.46, 23.35, 536.46); + u.x = _mm256_cvtpd_ps (s1.x); + + for (i = 0; i < 4; i++) + e[i] = (float)s1.a[i]; + + if (check_union128 (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vcvtps2dq-1.c b/gcc/testsuite/gcc.target/i386/avx-vcvtps2dq-1.c new file mode 100644 index 0000000..36d90a2 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vcvtps2dq-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-cvtps2dq-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vcvtps2dq-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vcvtps2dq-256-1.c new file mode 100644 index 0000000..47ec12b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vcvtps2dq-256-1.c @@ -0,0 +1,23 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +void static +avx_test (void) +{ + int i; + union256 s1; + union256i_d u; + int e [8]; + + s1.x = _mm256_set_ps (2.78, 77768.82, 23.67, 536.46, 4564.6575, 568.1263, 9889.2422, 7352.4563); + u.x = _mm256_cvtps_epi32 (s1.x); + + for (i = 0; i < 8; i++) + e[i] = (int)(s1.a[i] + 0.5); + + if (check_union256i_d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vcvtps2pd-1.c b/gcc/testsuite/gcc.target/i386/avx-vcvtps2pd-1.c new file mode 100644 index 0000000..114a719 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vcvtps2pd-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-cvtps2pd-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vcvtps2pd-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vcvtps2pd-256-1.c new file mode 100644 index 0000000..9d48998 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vcvtps2pd-256-1.c @@ -0,0 +1,23 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +void static +avx_test (void) +{ + int i; + union128 s1; + union256d u; + double e [4]; + + s1.x = _mm_set_ps (2.43, 68.46, 23.35, 536.46); + u.x = _mm256_cvtps_pd (s1.x); + + for (i = 0; i < 4; i++) + e[i] = (double)s1.a[i]; + + if (check_union256d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vcvtsd2si-1.c b/gcc/testsuite/gcc.target/i386/avx-vcvtsd2si-1.c new file mode 100644 index 0000000..53c61a2 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vcvtsd2si-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-cvtsd2si-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vcvtsd2si-2.c b/gcc/testsuite/gcc.target/i386/avx-vcvtsd2si-2.c new file mode 100644 index 0000000..a5b04fa --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vcvtsd2si-2.c @@ -0,0 +1,9 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-require-effective-target lp64 } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-cvtsd2si-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vcvtsd2ss-1.c b/gcc/testsuite/gcc.target/i386/avx-vcvtsd2ss-1.c new file mode 100644 index 0000000..c0e224d --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vcvtsd2ss-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-cvtsd2ss-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vcvtsi2sd-1.c b/gcc/testsuite/gcc.target/i386/avx-vcvtsi2sd-1.c new file mode 100644 index 0000000..35da346 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vcvtsi2sd-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-cvtsi2sd-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vcvtsi2sd-2.c b/gcc/testsuite/gcc.target/i386/avx-vcvtsi2sd-2.c new file mode 100644 index 0000000..49096cf --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vcvtsi2sd-2.c @@ -0,0 +1,9 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-require-effective-target lp64 } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-cvtsi2sd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vcvtsi2ss-1.c b/gcc/testsuite/gcc.target/i386/avx-vcvtsi2ss-1.c new file mode 100644 index 0000000..12ac36c --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vcvtsi2ss-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse-cvtsi2ss-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vcvtsi2ss-2.c b/gcc/testsuite/gcc.target/i386/avx-vcvtsi2ss-2.c new file mode 100644 index 0000000..765c455 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vcvtsi2ss-2.c @@ -0,0 +1,9 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-require-effective-target lp64 } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse-cvtsi2ss-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vcvtss2sd-1.c b/gcc/testsuite/gcc.target/i386/avx-vcvtss2sd-1.c new file mode 100644 index 0000000..0f6365c --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vcvtss2sd-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-cvtss2sd-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vcvtss2si-1.c b/gcc/testsuite/gcc.target/i386/avx-vcvtss2si-1.c new file mode 100644 index 0000000..3a51ff1 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vcvtss2si-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse-cvtss2si-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vcvtss2si-2.c b/gcc/testsuite/gcc.target/i386/avx-vcvtss2si-2.c new file mode 100644 index 0000000..5160b8d --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vcvtss2si-2.c @@ -0,0 +1,9 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-require-effective-target lp64 } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse-cvtss2si-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vcvttpd2dq-1.c b/gcc/testsuite/gcc.target/i386/avx-vcvttpd2dq-1.c new file mode 100644 index 0000000..f27160a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vcvttpd2dq-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-cvttpd2dq-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vcvttpd2dq-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vcvttpd2dq-256-1.c new file mode 100644 index 0000000..16edf8a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vcvttpd2dq-256-1.c @@ -0,0 +1,23 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +void static +avx_test (void) +{ + int i; + union256d s1; + union128i_d u; + int e [4]; + + s1.x = _mm256_set_pd (2.43, 68.78, 23.61, 536.46); + u.x = _mm256_cvttpd_epi32 (s1.x); + + for (i = 0; i < 4; i++) + e[i] = (int)s1.a[i]; + + if (check_union128i_d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vcvttps2dq-1.c b/gcc/testsuite/gcc.target/i386/avx-vcvttps2dq-1.c new file mode 100644 index 0000000..f8ab025 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vcvttps2dq-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-cvttps2dq-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vcvttps2dq-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vcvttps2dq-256-1.c new file mode 100644 index 0000000..0a580f0 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vcvttps2dq-256-1.c @@ -0,0 +1,23 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +void static +avx_test (void) +{ + int i; + union256 s1; + union256i_d u; + int e [8]; + + s1.x = _mm256_set_ps (45.64, 4564.56, 2.3, 5.5, 57.57, 89.34, 54.12, 954.67); + u.x = _mm256_cvttps_epi32 (s1.x); + + for (i = 0; i < 8; i++) + e[i] = (int)s1.a[i]; + + if (check_union256i_d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vcvttsd2si-1.c b/gcc/testsuite/gcc.target/i386/avx-vcvttsd2si-1.c new file mode 100644 index 0000000..b9963d4 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vcvttsd2si-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-cvttsd2si-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vcvttsd2si-2.c b/gcc/testsuite/gcc.target/i386/avx-vcvttsd2si-2.c new file mode 100644 index 0000000..dcf487a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vcvttsd2si-2.c @@ -0,0 +1,9 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-require-effective-target lp64 } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-cvttsd2si-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vcvttss2si-1.c b/gcc/testsuite/gcc.target/i386/avx-vcvttss2si-1.c new file mode 100644 index 0000000..94c94c1 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vcvttss2si-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse-cvttss2si-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vcvttss2si-2.c b/gcc/testsuite/gcc.target/i386/avx-vcvttss2si-2.c new file mode 100644 index 0000000..14b0721 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vcvttss2si-2.c @@ -0,0 +1,9 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-require-effective-target lp64 } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse-cvttss2si-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vdivpd-1.c b/gcc/testsuite/gcc.target/i386/avx-vdivpd-1.c new file mode 100644 index 0000000..57ddfd1 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vdivpd-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-divpd-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vdivpd-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vdivpd-256-1.c new file mode 100644 index 0000000..1840e3d --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vdivpd-256-1.c @@ -0,0 +1,23 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +void static +avx_test (void) +{ + int i; + union256d u, s1, s2; + double e [4]; + + s1.x = _mm256_set_pd (2134.3343,1234.635654,453.345635,54646.464356); + s2.x = _mm256_set_pd (41124.234,2344.2354,8653.65635,856.43576); + u.x = _mm256_div_pd (s1.x, s2.x); + + for (i = 0; i < 4; i++) + e[i] = s1.a[i] / s2.a[i]; + + if (check_union256d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vdivps-1.c b/gcc/testsuite/gcc.target/i386/avx-vdivps-1.c new file mode 100644 index 0000000..d4fcaeb --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vdivps-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse-divps-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vdivps-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vdivps-256-1.c new file mode 100644 index 0000000..3ff4c7e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vdivps-256-1.c @@ -0,0 +1,23 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +void static +avx_test (void) +{ + int i; + union256 u, s1, s2; + float e[8]; + + s1.x = _mm256_set_ps (24.43, 68.346, 43.35, 546.46, 46.79, 82.78, 82.7, 9.4); + s2.x = _mm256_set_ps (1.17, 2.16, 3.15, 4.14, 5.13, 6.12, 7.11, 8.9); + u.x = _mm256_div_ps (s1.x, s2.x); + + for (i = 0; i < 8; i++) + e[i] = s1.a[i] / s2.a[i]; + + if (check_union256 (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vdivsd-1.c b/gcc/testsuite/gcc.target/i386/avx-vdivsd-1.c new file mode 100644 index 0000000..faca3ed --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vdivsd-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-divsd-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vdivss-1.c b/gcc/testsuite/gcc.target/i386/avx-vdivss-1.c new file mode 100644 index 0000000..f5740eb --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vdivss-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse-divss-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vdppd-1.c b/gcc/testsuite/gcc.target/i386/avx-vdppd-1.c new file mode 100644 index 0000000..7d04cc4 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vdppd-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse4_1-dppd-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vdppd-2.c b/gcc/testsuite/gcc.target/i386/avx-vdppd-2.c new file mode 100644 index 0000000..6e30faf --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vdppd-2.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse4_1-dppd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vdpps-1.c b/gcc/testsuite/gcc.target/i386/avx-vdpps-1.c new file mode 100644 index 0000000..75ba0be --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vdpps-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse4_1-dpps-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vdpps-2.c b/gcc/testsuite/gcc.target/i386/avx-vdpps-2.c new file mode 100644 index 0000000..b54b909 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vdpps-2.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse4_1-dpps-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vextractf128-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vextractf128-256-1.c new file mode 100644 index 0000000..4919d64 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vextractf128-256-1.c @@ -0,0 +1,29 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +#ifndef OFFSET +#define OFFSET 1 +#endif + +#if OFFSET < 0 || OFFSET > 1 +#error OFFSET must be within [0..1] +#endif + +void static +avx_test (void) +{ + union256d s1; + union128d u; + double e [2]; + + s1.x = _mm256_set_pd (2134.3343,1234.635654,453.345635,54646.464356); + u.x = _mm256_extractf128_pd (s1.x, OFFSET); + + __builtin_memcpy (e, s1.a + OFFSET * 2, sizeof e); + + if (check_union128d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vextractf128-256-2.c b/gcc/testsuite/gcc.target/i386/avx-vextractf128-256-2.c new file mode 100644 index 0000000..db26e18 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vextractf128-256-2.c @@ -0,0 +1,29 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +#ifndef OFFSET +#define OFFSET 1 +#endif + +#if OFFSET < 0 || OFFSET > 1 +#error OFFSET must be within [0..1] +#endif + +void static +avx_test (void) +{ + union256 s1; + union128 u; + float e [4]; + + s1.x = _mm256_set_ps (24.43, 68.346, 43.35, 546.46, 46.79, 82.78, 82.7, 9.4); + u.x = _mm256_extractf128_ps (s1.x, OFFSET); + + __builtin_memcpy (e, s1.a + OFFSET * 4, sizeof e); + + if (check_union128 (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vextractps-1.c b/gcc/testsuite/gcc.target/i386/avx-vextractps-1.c new file mode 100644 index 0000000..4215c34 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vextractps-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse4_1-extractps.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vhaddpd-1.c b/gcc/testsuite/gcc.target/i386/avx-vhaddpd-1.c new file mode 100644 index 0000000..7809c85 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vhaddpd-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse3-haddpd.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vhaddpd-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vhaddpd-256-1.c new file mode 100644 index 0000000..b9245a3 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vhaddpd-256-1.c @@ -0,0 +1,24 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +void static +avx_test (void) +{ + union256d u, s1, s2; + double e [4]; + + s1.x = _mm256_set_pd (2134.3343,1234.635654,453.345635,54646.464356); + s2.x = _mm256_set_pd (41124.234,2344.2354,8653.65635,856.43576); + u.x = _mm256_hadd_pd (s1.x, s2.x); + + e[0] = s1.a[0] + s1.a[1]; + e[1] = s2.a[0] + s2.a[1]; + e[2] = s1.a[2] + s1.a[3]; + e[3] = s2.a[2] + s2.a[3]; + + if (check_union256d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vhaddps-1.c b/gcc/testsuite/gcc.target/i386/avx-vhaddps-1.c new file mode 100644 index 0000000..73dcfb6 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vhaddps-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse3-haddps.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vhaddps-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vhaddps-256-1.c new file mode 100644 index 0000000..fbc5823 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vhaddps-256-1.c @@ -0,0 +1,28 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +void static +avx_test (void) +{ + union256 u, s1, s2; + float e [8]; + + s1.x = _mm256_set_ps (24.43, 68.346, 43.35, 546.46, 46.79, 82.78, 82.7, 9.4); + s2.x = _mm256_set_ps (1.17, 2.16, 3.15, 4.14, 5.13, 6.12, 7.11, 8.9); + u.x = _mm256_hadd_ps (s1.x, s2.x); + + e[0] = s1.a[0] + s1.a[1]; + e[1] = s1.a[2] + s1.a[3]; + e[2] = s2.a[0] + s2.a[1]; + e[3] = s2.a[2] + s2.a[3]; + e[4] = s1.a[4] + s1.a[5]; + e[5] = s1.a[6] + s1.a[7]; + e[6] = s2.a[4] + s2.a[5]; + e[7] = s2.a[6] + s2.a[7]; + + if (check_union256 (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vhsubpd-1.c b/gcc/testsuite/gcc.target/i386/avx-vhsubpd-1.c new file mode 100644 index 0000000..68d1432 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vhsubpd-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse3-hsubpd.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vhsubpd-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vhsubpd-256-1.c new file mode 100644 index 0000000..df710d7 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vhsubpd-256-1.c @@ -0,0 +1,24 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +void static +avx_test (void) +{ + union256d u, s1, s2; + double e [4]; + + s1.x = _mm256_set_pd (2134.3343,1234.635654,453.345635,54646.464356); + s2.x = _mm256_set_pd (41124.234,2344.2354,8653.65635,856.43576); + u.x = _mm256_hsub_pd (s1.x, s2.x); + + e[0] = s1.a[0] - s1.a[1]; + e[1] = s2.a[0] - s2.a[1]; + e[2] = s1.a[2] - s1.a[3]; + e[3] = s2.a[2] - s2.a[3]; + + if (check_union256d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vhsubps-1.c b/gcc/testsuite/gcc.target/i386/avx-vhsubps-1.c new file mode 100644 index 0000000..2ddd2c0 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vhsubps-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse3-hsubps.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vhsubps-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vhsubps-256-1.c new file mode 100644 index 0000000..aa601c8 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vhsubps-256-1.c @@ -0,0 +1,28 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +void static +avx_test (void) +{ + union256 u, s1, s2; + float e [8]; + + s1.x = _mm256_set_ps (24.43, 68.346, 43.35, 546.46, 46.79, 82.78, 82.7, 9.4); + s2.x = _mm256_set_ps (1.17, 2.16, 3.15, 4.14, 5.13, 6.12, 7.11, 8.9); + u.x = _mm256_hsub_ps (s1.x, s2.x); + + e[0] = s1.a[0] - s1.a[1]; + e[1] = s1.a[2] - s1.a[3]; + e[2] = s2.a[0] - s2.a[1]; + e[3] = s2.a[2] - s2.a[3]; + e[4] = s1.a[4] - s1.a[5]; + e[5] = s1.a[6] - s1.a[7]; + e[6] = s2.a[4] - s2.a[5]; + e[7] = s2.a[6] - s2.a[7]; + + if (check_union256 (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vinsertf128-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vinsertf128-256-1.c new file mode 100644 index 0000000..2390e5c --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vinsertf128-256-1.c @@ -0,0 +1,35 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +#ifndef OFFSET +#define OFFSET 1 +#endif + +#if OFFSET < 0 || OFFSET > 1 +#error OFFSET must be within [0..1] +#endif + +void static +avx_test (void) +{ + int i; + union256d u, s1; + union128d s2; + double e [4]; + + s1.x = _mm256_set_pd (2134.3343,1234.635654,453.345635,54646.464356); + s2.x = _mm_set_pd (68543.731254, 3452.578238); + u.x = _mm256_insertf128_pd (s1.x, s2.x, OFFSET); + + for (i = 0; i < 4; i++) + e[i] = s1.a[i]; + + for (i=0; i < 2; i++) + e[i + (OFFSET * 2)] = s2.a[i]; + + if (check_union256d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vinsertf128-256-2.c b/gcc/testsuite/gcc.target/i386/avx-vinsertf128-256-2.c new file mode 100644 index 0000000..ce0b23b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vinsertf128-256-2.c @@ -0,0 +1,35 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +#ifndef OFFSET +#define OFFSET 0 +#endif + +#if OFFSET < 0 || OFFSET > 1 +#error OFFSET must be within [0..1] +#endif + +void static +avx_test (void) +{ + int i; + union256 u, s1; + union128 s2; + float e [8]; + + s1.x = _mm256_set_ps (39.467, 45.789, 78.342, 67.892, 76.678, 12.963, 29.746, 24.753); + s2.x = _mm_set_ps (57.493, 38.395, 22.479, 31.614); + u.x = _mm256_insertf128_ps (s1.x, s2.x, OFFSET); + + for (i = 0; i < 8; i++) + e[i] = s1.a[i]; + + for (i=0; i < 4; i++) + e[i + (OFFSET * 4)] = s2.a[i]; + + if (check_union256 (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vinsertf128-256-3.c b/gcc/testsuite/gcc.target/i386/avx-vinsertf128-256-3.c new file mode 100644 index 0000000..89834d5 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vinsertf128-256-3.c @@ -0,0 +1,35 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +#ifndef OFFSET +#define OFFSET 0 +#endif + +#if OFFSET < 0 || OFFSET > 1 +#error OFFSET must be within [0..1] +#endif + +void static +avx_test (void) +{ + int i; + union256i_d u, s1; + union128i_d s2; + int e [8]; + + s1.x = _mm256_set_epi32 (39467, 45789, 78342, 67892, 76678, 12963, 29746, 24753); + s2.x = _mm_set_epi32 (57493, 38395, 22479, 31614); + u.x = _mm256_insertf128_si256 (s1.x, s2.x, OFFSET); + + for (i = 0; i < 8; i++) + e[i] = s1.a[i]; + + for (i=0; i < 4; i++) + e[i + (OFFSET * 4)] = s2.a[i]; + + if (check_union256i_d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vinsertps-1.c b/gcc/testsuite/gcc.target/i386/avx-vinsertps-1.c new file mode 100644 index 0000000..ad1f333 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vinsertps-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse4_1-insertps-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vinsertps-2.c b/gcc/testsuite/gcc.target/i386/avx-vinsertps-2.c new file mode 100644 index 0000000..7b93174 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vinsertps-2.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse4_1-insertps-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vlddqu-1.c b/gcc/testsuite/gcc.target/i386/avx-vlddqu-1.c new file mode 100644 index 0000000..7ecea79 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vlddqu-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse3-lddqu.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vlddqu-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vlddqu-256-1.c new file mode 100644 index 0000000..82c0ed5 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vlddqu-256-1.c @@ -0,0 +1,17 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +void static +avx_test (void) +{ + int e[8]={ 23, 67, 53, 6, 4, 6, 85, 234}; + union256i_d u; + + u.x = _mm256_lddqu_si256 ((__m256i *) e); + + if (check_union256i_d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vmaskmovpd-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vmaskmovpd-256-1.c new file mode 100644 index 0000000..f29826b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vmaskmovpd-256-1.c @@ -0,0 +1,30 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +#ifndef MASK +#define MASK 7 +#endif + +#define mask_v(pos) (((MASK & (0x1ULL << (pos))) >> (pos)) << 63) + +void static +avx_test (void) +{ + int i; + long long m[8] = {mask_v(0), mask_v(1), mask_v(2), mask_v(3)}; + double s[4] = {1.1, 2.2, 3.3, 4.4}; + union256d u, mask; + double e [4] = {0.0}; + + mask.x = _mm256_loadu_pd ((double*)m); + u.x = _mm256_maskload_pd (s, mask.x); + + for (i = 0 ; i < 4; i++) + e[i] = m[i] ? s[i] : 0; + + if (check_union256d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vmaskmovpd-256-2.c b/gcc/testsuite/gcc.target/i386/avx-vmaskmovpd-256-2.c new file mode 100644 index 0000000..1e574b6 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vmaskmovpd-256-2.c @@ -0,0 +1,32 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +#ifndef MASK +#define MASK 6 +#endif + +#define mask_v(pos) (((MASK & (0x1ULL << (pos))) >> (pos)) << 63) + +void static +avx_test (void) +{ + int i; + long long m[4] = {mask_v(0), mask_v(1), mask_v(2), mask_v(3)}; + double s[4] = {1.1, 2.2, 3.3, 4.4}; + double e [4] = {0.0}; + double d [4] = {0.0}; + union256d src, mask; + + src.x = _mm256_loadu_pd (s); + mask.x = _mm256_loadu_pd ((double*)m); + _mm256_maskstore_pd (d, mask.x, src.x); + + for (i = 0 ; i < 4; i++) + e[i] = m[i] ? s[i] : 0; + + if (checkVd (d, e, 4)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vmaskmovps-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vmaskmovps-256-1.c new file mode 100644 index 0000000..9e6c7f9 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vmaskmovps-256-1.c @@ -0,0 +1,30 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +#ifndef MASK +#define MASK 134 +#endif + +#define mask_v(pos) (((MASK & (0x1 << (pos))) >> (pos)) << 31) + +void static +avx_test (void) +{ + int i; + int m[8] = {mask_v(0), mask_v(1), mask_v(2), mask_v(3), mask_v(4), mask_v(5), mask_v(6), mask_v(7)}; + float s[8] = {1,2,3,4,5,6,7,8}; + union256 u, mask; + float e [8] = {0.0}; + + mask.x = _mm256_loadu_ps ((float*)m); + u.x = _mm256_maskload_ps (s, mask.x); + + for (i = 0 ; i < 8; i++) + e[i] = m[i] ? s[i] : 0; + + if (check_union256 (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vmaskmovps-256-2.c b/gcc/testsuite/gcc.target/i386/avx-vmaskmovps-256-2.c new file mode 100644 index 0000000..90d91a0 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vmaskmovps-256-2.c @@ -0,0 +1,32 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +#ifndef MASK +#define MASK 214 +#endif + +#define mask_v(pos) (((MASK & (0x1 << (pos))) >> (pos)) << 31) + +void static +avx_test (void) +{ + int i; + int m[8] = {mask_v(0), mask_v(1), mask_v(2), mask_v(3), mask_v(4), mask_v(5), mask_v(6), mask_v(7)}; + float s[8] = {1,2,3,4,5,6,7,8}; + union256 src, mask; + float e [8] = {0.0}; + float d [8] = {0.0}; + + src.x = _mm256_loadu_ps (s); + mask.x = _mm256_loadu_ps ((float *)m); + _mm256_maskstore_ps (d, mask.x, src.x); + + for (i = 0 ; i < 8; i++) + e[i] = m[i] ? s[i] : 0; + + if (checkVf (d, e, 8)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vmaxpd-1.c b/gcc/testsuite/gcc.target/i386/avx-vmaxpd-1.c new file mode 100644 index 0000000..981e2a5 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vmaxpd-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-maxpd-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vmaxpd-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vmaxpd-256-1.c new file mode 100644 index 0000000..7b9c91c --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vmaxpd-256-1.c @@ -0,0 +1,23 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +void static +avx_test (void) +{ + int i; + union256d u, s1, s2; + double e [4]; + + s1.x = _mm256_set_pd (2134.3343,1234.635654,453.345635,54646.464356); + s2.x = _mm256_set_pd (41124.234,2344.2354,8653.65635,856.43576); + u.x = _mm256_max_pd (s1.x, s2.x); + + for (i = 0; i < 4; i++) + e[i] = s1.a[i] > s2.a[i] ? s1.a[i] : s2.a[i]; + + if (check_union256d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vmaxps-1.c b/gcc/testsuite/gcc.target/i386/avx-vmaxps-1.c new file mode 100644 index 0000000..e4c4145 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vmaxps-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse-maxps-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vmaxps-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vmaxps-256-1.c new file mode 100644 index 0000000..44bb7ed --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vmaxps-256-1.c @@ -0,0 +1,23 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +void static +avx_test (void) +{ + int i; + union256 u, s1, s2; + float e [8]; + + s1.x = _mm256_set_ps (24.43, 68.346, 43.35, 546.46, 46.79, 82.78, 82.7, 9.4); + s2.x = _mm256_set_ps (1.17, 24567.16, 3.15, 4567.14, 5.13, 65467.12, 788.11, 8.9); + u.x = _mm256_max_ps (s1.x, s2.x); + + for (i = 0; i < 8; i++) + e[i] = s1.a[i] > s2.a[i] ? s1.a[i] : s2.a[i]; + + if (check_union256 (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vmaxsd-1.c b/gcc/testsuite/gcc.target/i386/avx-vmaxsd-1.c new file mode 100644 index 0000000..e24410c --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vmaxsd-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-maxsd-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vmaxss-1.c b/gcc/testsuite/gcc.target/i386/avx-vmaxss-1.c new file mode 100644 index 0000000..afe5d0a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vmaxss-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse-maxss-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vminpd-1.c b/gcc/testsuite/gcc.target/i386/avx-vminpd-1.c new file mode 100644 index 0000000..a7eb649 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vminpd-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-minpd-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vminpd-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vminpd-256-1.c new file mode 100644 index 0000000..555e029 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vminpd-256-1.c @@ -0,0 +1,23 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +void static +avx_test (void) +{ + int i; + union256d u, s1, s2; + double e [4]; + + s1.x = _mm256_set_pd (2134.3343,1234.635654,453.345635,54646.464356); + s2.x = _mm256_set_pd (41124.234,2344.2354,8653.65635,856.43576); + u.x = _mm256_min_pd (s1.x, s2.x); + + for (i = 0; i < 4; i++) + e[i] = s1.a[i] < s2.a[i] ? s1.a[i] : s2.a[i]; + + if (check_union256d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vminps-1.c b/gcc/testsuite/gcc.target/i386/avx-vminps-1.c new file mode 100644 index 0000000..dfb07ba --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vminps-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse-minps-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vminps-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vminps-256-1.c new file mode 100644 index 0000000..19ac83a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vminps-256-1.c @@ -0,0 +1,23 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +void static +avx_test (void) +{ + int i; + union256 u, s1, s2; + float e [8]; + + s1.x = _mm256_set_ps (24.43, 68.346, 43.35, 546.46, 46.79, 82.78, 82.7, 9.4); + s2.x = _mm256_set_ps (1.17, 24567.16, 3.15, 4567.14, 5.13, 65467.12, 788.11, 8.9); + u.x = _mm256_min_ps (s1.x, s2.x); + + for (i = 0; i < 8; i++) + e[i] = s1.a[i] < s2.a[i] ? s1.a[i] : s2.a[i]; + + if (check_union256 (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vminsd-1.c b/gcc/testsuite/gcc.target/i386/avx-vminsd-1.c new file mode 100644 index 0000000..5aa1d9a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vminsd-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-minsd-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vminss-1.c b/gcc/testsuite/gcc.target/i386/avx-vminss-1.c new file mode 100644 index 0000000..c2e6f27 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vminss-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse-minss-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vmovapd-1.c b/gcc/testsuite/gcc.target/i386/avx-vmovapd-1.c new file mode 100644 index 0000000..5d97a5d --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vmovapd-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-movapd-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vmovapd-2.c b/gcc/testsuite/gcc.target/i386/avx-vmovapd-2.c new file mode 100644 index 0000000..9856d29 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vmovapd-2.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-movapd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vmovapd-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vmovapd-256-1.c new file mode 100644 index 0000000..d912122 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vmovapd-256-1.c @@ -0,0 +1,24 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +static __m256d +__attribute__((noinline, unused)) +test (double *e) +{ + return _mm256_load_pd (e); +} + +void static +avx_test (void) +{ + union256d u; + double e [4] __attribute__ ((aligned (8))) = {41124.234,2344.2354,8653.65635,856.43576}; + + u.x = test (e); + + if (check_union256d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vmovapd-256-2.c b/gcc/testsuite/gcc.target/i386/avx-vmovapd-256-2.c new file mode 100644 index 0000000..96a664a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vmovapd-256-2.c @@ -0,0 +1,26 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +static void +__attribute__((noinline, unused)) +test (double *e, __m256d a) +{ + return _mm256_store_pd (e, a); +} + +void static +avx_test (void) +{ + union256d u; + double e [4] __attribute__ ((aligned (8))) = {0.0}; + + u.x = _mm256_set_pd (39578.467285, 7856.342941, 85632.783567, 47563.234215); + + test (e, u.x); + + if (check_union256d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vmovaps-1.c b/gcc/testsuite/gcc.target/i386/avx-vmovaps-1.c new file mode 100644 index 0000000..a10894c --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vmovaps-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse-movaps-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vmovaps-2.c b/gcc/testsuite/gcc.target/i386/avx-vmovaps-2.c new file mode 100644 index 0000000..ad0cf47 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vmovaps-2.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse-movaps-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vmovaps-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vmovaps-256-1.c new file mode 100644 index 0000000..74681c3 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vmovaps-256-1.c @@ -0,0 +1,24 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +static __m256 +__attribute__((noinline, unused)) +test (float *e) +{ + return _mm256_load_ps (e); +} + +void static +avx_test (void) +{ + union256 u; + float e [8] __attribute__ ((aligned (32))) = {24.43, 68.346, 43.35, 546.46, 46.79, 82.78, 82.7, 9.4}; + + u.x = test (e); + + if (check_union256 (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vmovaps-256-2.c b/gcc/testsuite/gcc.target/i386/avx-vmovaps-256-2.c new file mode 100644 index 0000000..dbd5227 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vmovaps-256-2.c @@ -0,0 +1,26 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +static void +__attribute__((noinline, unused)) +test (float *e, __m256 a) +{ + return _mm256_store_ps (e, a); +} + +void static +avx_test (void) +{ + union256 u; + float e [8] __attribute__ ((aligned (32))) = {0.0}; + + u.x = _mm256_set_ps (1.17, 24567.16, 3.15, 4567.14, 5.13, 65467.12, 788.11, 8.9); + + test (e, u.x); + + if (check_union256 (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vmovd-1.c b/gcc/testsuite/gcc.target/i386/avx-vmovd-1.c new file mode 100644 index 0000000..cdaec13 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vmovd-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-movd-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vmovd-2.c b/gcc/testsuite/gcc.target/i386/avx-vmovd-2.c new file mode 100644 index 0000000..3c3732b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vmovd-2.c @@ -0,0 +1,9 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-require-effective-target lp64 } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-movd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vmovddup-1.c b/gcc/testsuite/gcc.target/i386/avx-vmovddup-1.c new file mode 100644 index 0000000..4db42e1 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vmovddup-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx -mfpmath=sse" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse3-movddup.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vmovddup-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vmovddup-256-1.c new file mode 100644 index 0000000..a971dbf --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vmovddup-256-1.c @@ -0,0 +1,22 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +void static +avx_test (void) +{ + int i; + union256d u, s1; + double e [4]; + + s1.x = _mm256_set_pd (39578.467285, 7856.342941, 85632.783567, 47563.234215); + u.x = _mm256_movedup_pd (s1.x); + + for (i = 0; i < 2; i++) + e[2*i] = e[2*i+1] = s1.a[2*i]; + + if (check_union256d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vmovdqa-1.c b/gcc/testsuite/gcc.target/i386/avx-vmovdqa-1.c new file mode 100644 index 0000000..b14aeaf --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vmovdqa-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-movdqa-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vmovdqa-2.c b/gcc/testsuite/gcc.target/i386/avx-vmovdqa-2.c new file mode 100644 index 0000000..94a758d --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vmovdqa-2.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-movdqa-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vmovdqa-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vmovdqa-256-1.c new file mode 100644 index 0000000..abe6288 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vmovdqa-256-1.c @@ -0,0 +1,24 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +static __m256i +__attribute__ ((noinline, unused)) +test (__m256i *p) +{ + return _mm256_load_si256 (p); +} + +void static +avx_test (void) +{ + union256i_d u; + int e [8] __attribute__ ((aligned (32))) = {23, 67, 53, 6, 4, 6, 85, 234}; + + u.x = test ((__m256i *)e); + + if (check_union256i_d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vmovdqa-256-2.c b/gcc/testsuite/gcc.target/i386/avx-vmovdqa-256-2.c new file mode 100644 index 0000000..41f3ed0 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vmovdqa-256-2.c @@ -0,0 +1,18 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +void static +avx_test (void) +{ + union256i_d u; + int e [8] __attribute__ ((aligned (32))) = {0}; + + u.x = _mm256_set_epi32(23, 67, 53, 6, 4, 6, 85, 234); + _mm256_store_si256 ((__m256i *)e, u.x); + + if (check_union256i_d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vmovdqu-1.c b/gcc/testsuite/gcc.target/i386/avx-vmovdqu-1.c new file mode 100644 index 0000000..7785b40 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vmovdqu-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-movdqu-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vmovdqu-2.c b/gcc/testsuite/gcc.target/i386/avx-vmovdqu-2.c new file mode 100644 index 0000000..f0eead7 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vmovdqu-2.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-movdqu-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vmovdqu-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vmovdqu-256-1.c new file mode 100644 index 0000000..849df7b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vmovdqu-256-1.c @@ -0,0 +1,17 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +void static +avx_test (void) +{ + union256i_d u; + int e [8] = {23, 67, 53, 6, 4, 6, 85, 234}; + + u.x = _mm256_loadu_si256 ((__m256i *) e); + + if (check_union256i_d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vmovdqu-256-2.c b/gcc/testsuite/gcc.target/i386/avx-vmovdqu-256-2.c new file mode 100644 index 0000000..eb0af20 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vmovdqu-256-2.c @@ -0,0 +1,18 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +void static +avx_test (void) +{ + union256i_d u; + int e [8] = {0}; + + u.x = _mm256_set_epi32(23, 67, 53, 6, 4, 6, 85, 234); + _mm256_storeu_si256 ((__m256i *)e, u.x); + + if (check_union256i_d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vmovhlps-1.c b/gcc/testsuite/gcc.target/i386/avx-vmovhlps-1.c new file mode 100644 index 0000000..25beca9 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vmovhlps-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse-movhlps-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vmovhpd-1.c b/gcc/testsuite/gcc.target/i386/avx-vmovhpd-1.c new file mode 100644 index 0000000..246275c --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vmovhpd-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-movhpd-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vmovhpd-2.c b/gcc/testsuite/gcc.target/i386/avx-vmovhpd-2.c new file mode 100644 index 0000000..1cfdf59 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vmovhpd-2.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-movhpd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vmovhps-1.c b/gcc/testsuite/gcc.target/i386/avx-vmovhps-1.c new file mode 100644 index 0000000..8cf1eec --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vmovhps-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse-movhps-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vmovhps-2.c b/gcc/testsuite/gcc.target/i386/avx-vmovhps-2.c new file mode 100644 index 0000000..c835f15 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vmovhps-2.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse-movhps-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vmovlhps-1.c b/gcc/testsuite/gcc.target/i386/avx-vmovlhps-1.c new file mode 100644 index 0000000..8f8234b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vmovlhps-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse-movlhps-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vmovlpd-1.c b/gcc/testsuite/gcc.target/i386/avx-vmovlpd-1.c new file mode 100644 index 0000000..64d90c6 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vmovlpd-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-movlpd-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vmovlpd-2.c b/gcc/testsuite/gcc.target/i386/avx-vmovlpd-2.c new file mode 100644 index 0000000..081956a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vmovlpd-2.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-movlpd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vmovmskpd-1.c b/gcc/testsuite/gcc.target/i386/avx-vmovmskpd-1.c new file mode 100644 index 0000000..07eb851 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vmovmskpd-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-movmskpd-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vmovmskpd-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vmovmskpd-256-1.c new file mode 100644 index 0000000..71353c4 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vmovmskpd-256-1.c @@ -0,0 +1,25 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +void static +avx_test (void) +{ + int i; + int d; + union256d s1; + double source[4] = {-45, -3, -34.56, 35}; + int e = 0; + + s1.x = _mm256_loadu_pd (source); + d = _mm256_movemask_pd (s1.x); + + for (i = 0; i < 4; i++) + if (source[i] < 0) + e |= (1 << i); + + if (checkVi (&d, &e, 1)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vmovmskps-1.c b/gcc/testsuite/gcc.target/i386/avx-vmovmskps-1.c new file mode 100644 index 0000000..df4d1e7 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vmovmskps-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse-movmskps-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vmovmskps-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vmovmskps-256-1.c new file mode 100644 index 0000000..4b81d04 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vmovmskps-256-1.c @@ -0,0 +1,25 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +void static +avx_test (void) +{ + int i; + int d; + union256 s1; + float source[8] = {-45, -3, -34.56, 35, 5.46,46, -464.3, 56}; + int e = 0; + + s1.x = _mm256_loadu_ps (source); + d = _mm256_movemask_ps (s1.x); + + for (i = 0; i < 8; i++) + if (source[i] < 0) + e |= (1 << i); + + if (checkVi (&d, &e, 1)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vmovntdq-1.c b/gcc/testsuite/gcc.target/i386/avx-vmovntdq-1.c new file mode 100644 index 0000000..166d46f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vmovntdq-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-movntdq-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vmovntdqa-1.c b/gcc/testsuite/gcc.target/i386/avx-vmovntdqa-1.c new file mode 100644 index 0000000..c884d1e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vmovntdqa-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse4_1-movntdqa.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vmovntpd-1.c b/gcc/testsuite/gcc.target/i386/avx-vmovntpd-1.c new file mode 100644 index 0000000..d547a2a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vmovntpd-1.c @@ -0,0 +1,9 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-movntpd-1.c" + diff --git a/gcc/testsuite/gcc.target/i386/avx-vmovntps-1.c b/gcc/testsuite/gcc.target/i386/avx-vmovntps-1.c new file mode 100644 index 0000000..b9732f2 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vmovntps-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse-movntps-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vmovq-1.c b/gcc/testsuite/gcc.target/i386/avx-vmovq-1.c new file mode 100644 index 0000000..44d2023 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vmovq-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-movq-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vmovq-2.c b/gcc/testsuite/gcc.target/i386/avx-vmovq-2.c new file mode 100644 index 0000000..cf0f4eb --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vmovq-2.c @@ -0,0 +1,9 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-require-effective-target lp64 } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-movq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vmovq-3.c b/gcc/testsuite/gcc.target/i386/avx-vmovq-3.c new file mode 100644 index 0000000..26944d1 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vmovq-3.c @@ -0,0 +1,9 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-require-effective-target lp64 } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-movq-3.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vmovsd-1.c b/gcc/testsuite/gcc.target/i386/avx-vmovsd-1.c new file mode 100644 index 0000000..1857844 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vmovsd-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-movsd-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vmovsd-2.c b/gcc/testsuite/gcc.target/i386/avx-vmovsd-2.c new file mode 100644 index 0000000..672b25b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vmovsd-2.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-movsd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vmovshdup-1.c b/gcc/testsuite/gcc.target/i386/avx-vmovshdup-1.c new file mode 100644 index 0000000..ee995e3 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vmovshdup-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx -mfpmath=sse" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse3-movshdup.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vmovshdup-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vmovshdup-256-1.c new file mode 100644 index 0000000..a4b57a0 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vmovshdup-256-1.c @@ -0,0 +1,22 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +void static +avx_test (void) +{ + int i; + union256 u, s1; + float e[8]; + + s1.x = _mm256_set_ps (134.3, 1234.54, 45.335, 646.456, 43.54, 473.34, 78, 89.54); + u.x = _mm256_movehdup_ps (s1.x); + + for (i = 0; i < 4; i++) + e[2*i] = e[2*i+1] = s1.a[2*i+1]; + + if (check_union256 (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vmovsldup-1.c b/gcc/testsuite/gcc.target/i386/avx-vmovsldup-1.c new file mode 100644 index 0000000..67ea717 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vmovsldup-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx -mfpmath=sse" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse3-movsldup.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vmovsldup-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vmovsldup-256-1.c new file mode 100644 index 0000000..52127be --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vmovsldup-256-1.c @@ -0,0 +1,22 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +void static +avx_test (void) +{ + int i; + union256 u, s1; + float e[8]; + + s1.x = _mm256_set_ps (134.3, 1234.54, 45.335, 646.456, 43.54, 473.34, 78, 89.54); + u.x = _mm256_moveldup_ps (s1.x); + + for (i = 0; i < 4; i++) + e[2*i] = e[2*i+1] = s1.a[2*i]; + + if (check_union256 (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vmovss-1.c b/gcc/testsuite/gcc.target/i386/avx-vmovss-1.c new file mode 100644 index 0000000..ff983e6 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vmovss-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse-movss-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vmovss-2.c b/gcc/testsuite/gcc.target/i386/avx-vmovss-2.c new file mode 100644 index 0000000..e9a8bdc --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vmovss-2.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse-movss-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vmovss-3.c b/gcc/testsuite/gcc.target/i386/avx-vmovss-3.c new file mode 100644 index 0000000..b73e2af --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vmovss-3.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse-movss-3.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vmovupd-1.c b/gcc/testsuite/gcc.target/i386/avx-vmovupd-1.c new file mode 100644 index 0000000..67f0874 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vmovupd-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-movupd-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vmovupd-2.c b/gcc/testsuite/gcc.target/i386/avx-vmovupd-2.c new file mode 100644 index 0000000..cb6f277 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vmovupd-2.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-movupd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vmovupd-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vmovupd-256-1.c new file mode 100644 index 0000000..8683a78 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vmovupd-256-1.c @@ -0,0 +1,24 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +static __m256d +__attribute__((noinline, unused)) +test (double *e) +{ + return _mm256_loadu_pd (e); +} + +void static +avx_test (void) +{ + union256d u; + double e [4] = {41124.234,2344.2354,8653.65635,856.43576}; + + u.x = test (e); + + if (check_union256d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vmovupd-256-2.c b/gcc/testsuite/gcc.target/i386/avx-vmovupd-256-2.c new file mode 100644 index 0000000..4cbd0e7 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vmovupd-256-2.c @@ -0,0 +1,26 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +static void +__attribute__((noinline, unused)) +test (double *e, __m256d a) +{ + return _mm256_storeu_pd (e, a); +} + +void static +avx_test (void) +{ + union256d u; + double e [4] = {0.0}; + + u.x = _mm256_set_pd (39578.467285, 7856.342941, 85632.783567, 47563.234215); + + test (e, u.x); + + if (check_union256d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vmovups-1.c b/gcc/testsuite/gcc.target/i386/avx-vmovups-1.c new file mode 100644 index 0000000..5b9a98b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vmovups-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse-movups-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vmovups-2.c b/gcc/testsuite/gcc.target/i386/avx-vmovups-2.c new file mode 100644 index 0000000..e5668a2 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vmovups-2.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse-movups-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vmovups-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vmovups-256-1.c new file mode 100644 index 0000000..87d8409 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vmovups-256-1.c @@ -0,0 +1,24 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +static __m256 +__attribute__((noinline, unused)) +test (float *e) +{ + return _mm256_loadu_ps (e); +} + +void static +avx_test (void) +{ + union256 u; + float e [8] = {24.43, 68.346, 43.35, 546.46, 46.79, 82.78, 82.7, 9.4}; + + u.x = test (e); + + if (check_union256 (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vmovups-256-2.c b/gcc/testsuite/gcc.target/i386/avx-vmovups-256-2.c new file mode 100644 index 0000000..c178197 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vmovups-256-2.c @@ -0,0 +1,26 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +static void +__attribute__((noinline, unused)) +test (float *e, __m256 a) +{ + return _mm256_storeu_ps (e, a); +} + +void static +avx_test (void) +{ + union256 u; + float e [8] = {0.0}; + + u.x = _mm256_set_ps (1.17, 24567.16, 3.15, 4567.14, 5.13, 65467.12, 788.11, 8.9); + + test (e, u.x); + + if (check_union256 (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vmpsadbw-1.c b/gcc/testsuite/gcc.target/i386/avx-vmpsadbw-1.c new file mode 100644 index 0000000..403423e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vmpsadbw-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse4_1-mpsadbw.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vmulpd-1.c b/gcc/testsuite/gcc.target/i386/avx-vmulpd-1.c new file mode 100644 index 0000000..0fa0f1a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vmulpd-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-mulpd-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vmulpd-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vmulpd-256-1.c new file mode 100644 index 0000000..c6d9c47 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vmulpd-256-1.c @@ -0,0 +1,23 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +void static +avx_test (void) +{ + int i; + union256d u, s1, s2; + double e [4]; + + s1.x = _mm256_set_pd (2134.3343,1234.635654,453.345635,54646.464356); + s2.x = _mm256_set_pd (41124.234,2344.2354,8653.65635,856.43576); + u.x = _mm256_mul_pd (s1.x, s2.x); + + for (i = 0; i < 4; i++) + e[i] = s1.a[i] * s2.a[i]; + + if (check_union256d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vmulps-1.c b/gcc/testsuite/gcc.target/i386/avx-vmulps-1.c new file mode 100644 index 0000000..bb29e19 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vmulps-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse-mulps-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vmulps-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vmulps-256-1.c new file mode 100644 index 0000000..518a947 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vmulps-256-1.c @@ -0,0 +1,23 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +void static +avx_test (void) +{ + int i; + union256 u, s1, s2; + float e [8]; + + s1.x = _mm256_set_ps (24.43, 68.346, 43.35, 546.46, 46.79, 82.78, 82.7, 9.4); + s2.x = _mm256_set_ps (1.17, 2.16, 3.15, 4.14, 5.13, 6.12, 7.11, 8.9); + u.x = _mm256_mul_ps (s1.x, s2.x); + + for (i = 0; i < 8; i++) + e[i] = s1.a[i] * s2.a[i]; + + if (check_union256 (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vmulsd-1.c b/gcc/testsuite/gcc.target/i386/avx-vmulsd-1.c new file mode 100644 index 0000000..16adcde --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vmulsd-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-mulsd-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vmulss-1.c b/gcc/testsuite/gcc.target/i386/avx-vmulss-1.c new file mode 100644 index 0000000..9ff6e3d --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vmulss-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse-mulss-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vorpd-1.c b/gcc/testsuite/gcc.target/i386/avx-vorpd-1.c new file mode 100644 index 0000000..221849f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vorpd-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-orpd-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vorpd-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vorpd-256-1.c new file mode 100644 index 0000000..ca60e24 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vorpd-256-1.c @@ -0,0 +1,32 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +void static +avx_test (void) +{ + int i; + union256d u, s1, s2; + + union + { + double d[4]; + long long ll[4]; + }source1, source2, e; + + s1.x = _mm256_set_pd (34545, 95567, 23443, 5675); + s2.x = _mm256_set_pd (674, 57897, 93459, 45624); + + _mm256_storeu_pd (source1.d, s1.x); + _mm256_storeu_pd (source2.d, s2.x); + + u.x = _mm256_or_pd (s1.x, s2.x); + + for (i = 0; i < 4; i++) + e.ll[i] = source1.ll[i] | source2.ll[i]; + + if (check_union256d (u, e.d)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vorps-1.c b/gcc/testsuite/gcc.target/i386/avx-vorps-1.c new file mode 100644 index 0000000..fd501dd --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vorps-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse-orps-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vorps-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vorps-256-1.c new file mode 100644 index 0000000..ef1c51b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vorps-256-1.c @@ -0,0 +1,33 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +void static +avx_test (void) +{ + int i; + + union256 u, s1, s2; + + union + { + float f[8]; + int i[8]; + }source1, source2, e; + + s1.x = _mm256_set_ps (34545, 95567, 23443, 5675, 2323, 67, 2345, 45667); + s2.x = _mm256_set_ps (674, 57897, 93459, 45624, 54674, 1237, 67436, 79608); + + _mm256_storeu_ps (source1.f, s1.x); + _mm256_storeu_ps (source2.f, s2.x); + + u.x = _mm256_or_ps (s1.x, s2.x); + + for (i = 0; i < 8; i++) + e.i[i] = source1.i[i] | source2.i[i]; + + if (check_union256 (u, e.f)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vpabsb-1.c b/gcc/testsuite/gcc.target/i386/avx-vpabsb-1.c new file mode 100644 index 0000000..80081ff --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpabsb-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "ssse3-pabsb.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpabsd-1.c b/gcc/testsuite/gcc.target/i386/avx-vpabsd-1.c new file mode 100644 index 0000000..3b165f1 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpabsd-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "ssse3-pabsd.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpabsw-1.c b/gcc/testsuite/gcc.target/i386/avx-vpabsw-1.c new file mode 100644 index 0000000..b737068 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpabsw-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "ssse3-pabsw.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpackssdw-1.c b/gcc/testsuite/gcc.target/i386/avx-vpackssdw-1.c new file mode 100644 index 0000000..f302ce7 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpackssdw-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-packssdw-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpacksswb-1.c b/gcc/testsuite/gcc.target/i386/avx-vpacksswb-1.c new file mode 100644 index 0000000..14fd680 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpacksswb-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-packsswb-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpackusdw-1.c b/gcc/testsuite/gcc.target/i386/avx-vpackusdw-1.c new file mode 100644 index 0000000..81991d9 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpackusdw-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse4_1-packusdw.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpackuswb-1.c b/gcc/testsuite/gcc.target/i386/avx-vpackuswb-1.c new file mode 100644 index 0000000..d06f3c7 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpackuswb-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-packuswb-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpaddb-1.c b/gcc/testsuite/gcc.target/i386/avx-vpaddb-1.c new file mode 100644 index 0000000..fa06c1e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpaddb-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-paddb-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpaddd-1.c b/gcc/testsuite/gcc.target/i386/avx-vpaddd-1.c new file mode 100644 index 0000000..fc2ee29 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpaddd-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-paddd-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpaddq-1.c b/gcc/testsuite/gcc.target/i386/avx-vpaddq-1.c new file mode 100644 index 0000000..bb913be --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpaddq-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-paddq-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpaddsb-1.c b/gcc/testsuite/gcc.target/i386/avx-vpaddsb-1.c new file mode 100644 index 0000000..56dc00b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpaddsb-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-paddsb-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpaddsw-1.c b/gcc/testsuite/gcc.target/i386/avx-vpaddsw-1.c new file mode 100644 index 0000000..c326420 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpaddsw-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-paddsw-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpaddusb-1.c b/gcc/testsuite/gcc.target/i386/avx-vpaddusb-1.c new file mode 100644 index 0000000..a83bf6b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpaddusb-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-paddusb-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpaddusw-1.c b/gcc/testsuite/gcc.target/i386/avx-vpaddusw-1.c new file mode 100644 index 0000000..8cbf060 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpaddusw-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-paddusw-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpaddw-1.c b/gcc/testsuite/gcc.target/i386/avx-vpaddw-1.c new file mode 100644 index 0000000..caaa466 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpaddw-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-paddw-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpalignr-1.c b/gcc/testsuite/gcc.target/i386/avx-vpalignr-1.c new file mode 100644 index 0000000..13c84c8 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpalignr-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "ssse3-palignr.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpand-1.c b/gcc/testsuite/gcc.target/i386/avx-vpand-1.c new file mode 100644 index 0000000..22e0570 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpand-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-pand-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpandn-1.c b/gcc/testsuite/gcc.target/i386/avx-vpandn-1.c new file mode 100644 index 0000000..fbd7e25 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpandn-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-pandn-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpavgb-1.c b/gcc/testsuite/gcc.target/i386/avx-vpavgb-1.c new file mode 100644 index 0000000..1474d2b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpavgb-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-pavgb-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpavgw-1.c b/gcc/testsuite/gcc.target/i386/avx-vpavgw-1.c new file mode 100644 index 0000000..1c7c3c8 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpavgw-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-pavgw-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpblendvb-1.c b/gcc/testsuite/gcc.target/i386/avx-vpblendvb-1.c new file mode 100644 index 0000000..0017997 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpblendvb-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse4_1-pblendvb.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpblendw-1.c b/gcc/testsuite/gcc.target/i386/avx-vpblendw-1.c new file mode 100644 index 0000000..241dbcc --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpblendw-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse4_1-pblendw.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpcmpeqb-1.c b/gcc/testsuite/gcc.target/i386/avx-vpcmpeqb-1.c new file mode 100644 index 0000000..9cd2bbc --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpcmpeqb-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-pcmpeqb-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpcmpeqd-1.c b/gcc/testsuite/gcc.target/i386/avx-vpcmpeqd-1.c new file mode 100644 index 0000000..b1d1dd2 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpcmpeqd-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-pcmpeqd-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpcmpeqq-1.c b/gcc/testsuite/gcc.target/i386/avx-vpcmpeqq-1.c new file mode 100644 index 0000000..541b52c --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpcmpeqq-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse4_1-pcmpeqq.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpcmpeqw-1.c b/gcc/testsuite/gcc.target/i386/avx-vpcmpeqw-1.c new file mode 100644 index 0000000..0e0397a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpcmpeqw-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-pcmpeqw-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpcmpestri-1.c b/gcc/testsuite/gcc.target/i386/avx-vpcmpestri-1.c new file mode 100644 index 0000000..806000f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpcmpestri-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse4_2-pcmpestri-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpcmpestri-2.c b/gcc/testsuite/gcc.target/i386/avx-vpcmpestri-2.c new file mode 100644 index 0000000..6d683ef --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpcmpestri-2.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse4_2-pcmpestri-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpcmpestrm-1.c b/gcc/testsuite/gcc.target/i386/avx-vpcmpestrm-1.c new file mode 100644 index 0000000..95b2bdc --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpcmpestrm-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse4_2-pcmpestrm-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpcmpestrm-2.c b/gcc/testsuite/gcc.target/i386/avx-vpcmpestrm-2.c new file mode 100644 index 0000000..b2f6ad3 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpcmpestrm-2.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse4_2-pcmpestrm-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpcmpgtb-1.c b/gcc/testsuite/gcc.target/i386/avx-vpcmpgtb-1.c new file mode 100644 index 0000000..ed9fd4d --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpcmpgtb-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-pcmpgtb-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpcmpgtd-1.c b/gcc/testsuite/gcc.target/i386/avx-vpcmpgtd-1.c new file mode 100644 index 0000000..344741e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpcmpgtd-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-pcmpgtd-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpcmpgtq-1.c b/gcc/testsuite/gcc.target/i386/avx-vpcmpgtq-1.c new file mode 100644 index 0000000..1332215 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpcmpgtq-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse4_2-pcmpgtq.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpcmpgtw-1.c b/gcc/testsuite/gcc.target/i386/avx-vpcmpgtw-1.c new file mode 100644 index 0000000..c4f2007 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpcmpgtw-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-pcmpgtw-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpcmpistri-1.c b/gcc/testsuite/gcc.target/i386/avx-vpcmpistri-1.c new file mode 100644 index 0000000..4cb1353 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpcmpistri-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse4_2-pcmpistri-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpcmpistri-2.c b/gcc/testsuite/gcc.target/i386/avx-vpcmpistri-2.c new file mode 100644 index 0000000..ec2af71 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpcmpistri-2.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse4_2-pcmpistri-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpcmpistrm-1.c b/gcc/testsuite/gcc.target/i386/avx-vpcmpistrm-1.c new file mode 100644 index 0000000..7a6a4d4 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpcmpistrm-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse4_2-pcmpistrm-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpcmpistrm-2.c b/gcc/testsuite/gcc.target/i386/avx-vpcmpistrm-2.c new file mode 100644 index 0000000..82857d8 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpcmpistrm-2.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse4_2-pcmpistrm-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vperm2f128-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vperm2f128-256-1.c new file mode 100644 index 0000000..99abca1 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vperm2f128-256-1.c @@ -0,0 +1,63 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +#define CONTROL 0xCC + +void static +avx_test (void) +{ + union256 u, s1, s2; + float e [8]; + + s1.x = _mm256_set_ps (1, 2, 3, 4, 5, 6, 7, 8); + s2.x = _mm256_set_ps (9, 10, 11, 12, 13, 14, 15, 16); + u.x = _mm256_permute2f128_ps (s1.x, s2.x, CONTROL); + + switch (CONTROL & 0x3) + { + case 0: + __builtin_memcpy (e, s1.a, 16); + break; + case 1: + __builtin_memcpy (e, s1.a+4, 16); + break; + case 2: + __builtin_memcpy (e, s2.a, 16); + break; + case 3: + __builtin_memcpy (e, s2.a+4, 16); + break; + default: + abort (); + } + + switch ((CONTROL & 0xc)>>2) + { + case 0: + __builtin_memcpy (e+4, s1.a, 16); + break; + case 1: + __builtin_memcpy (e+4, s1.a+4, 16); + break; + case 2: + __builtin_memcpy (e+4, s2.a, 16); + break; + case 3: + __builtin_memcpy (e+4, s2.a+4, 16); + break; + default: + abort (); + } + + if (CONTROL & (1<<3)) + __builtin_memset (e, 0, 16); + + if (CONTROL & (1<<7)) + __builtin_memset (e+4, 0, 16); + + if (check_union256 (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vperm2f128-256-2.c b/gcc/testsuite/gcc.target/i386/avx-vperm2f128-256-2.c new file mode 100644 index 0000000..db9c65b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vperm2f128-256-2.c @@ -0,0 +1,39 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +#ifndef IMM8 +# define IMM8 99 +#endif + + +void static +avx_test () +{ + union256d source1, source2, u; + double s1[4]={1, 2, 3, 4}; + double s2[4]={5, 6, 7, 8}; + double e[4]; + + source1.x = _mm256_loadu_pd(s1); + source2.x = _mm256_loadu_pd(s2); + u.x = _mm256_permute2f128_pd(source1.x, source2.x, IMM8); + + if(IMM8 & 8) e[0] = e[1] = 0; + else{ + e[0] = (IMM8 & 2 ? s2 : s1)[(IMM8 & 1) * 2]; + e[1] = (IMM8 & 2 ? s2 : s1)[(IMM8 & 1) * 2 + 1]; + } + if(IMM8 & 128) e[3] = e[3] = 0; + else{ + unsigned m = (IMM8 >> 4) & 3; + e[2] = (m & 2 ? s2 : s1)[(m & 1) * 2]; + e[3] = (m & 2 ? s2 : s1)[(m & 1) * 2 + 1]; + } + + if (check_union256d (u, e)) + abort (); +} + diff --git a/gcc/testsuite/gcc.target/i386/avx-vperm2f128-256-3.c b/gcc/testsuite/gcc.target/i386/avx-vperm2f128-256-3.c new file mode 100644 index 0000000..7b00c4b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vperm2f128-256-3.c @@ -0,0 +1,37 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +#ifndef IMM8 +# define IMM8 100 +#endif + +void static +avx_test () +{ + union256i_q source1, source2, u; + long long s1[4]={1, 2, 3, 4}; + long long s2[4]={5, 6, 7, 8}; + long long e[4]; + + source1.x = _mm256_loadu_si256((__m256i*)s1); + source2.x = _mm256_loadu_si256((__m256i*)s2); + u.x = _mm256_permute2f128_si256(source1.x, source2.x, IMM8); + + if(IMM8 & 8) e[0] = e[1] = 0; + else{ + e[0] = (IMM8 & 2 ? s2 : s1)[(IMM8 & 1) * 2]; + e[1] = (IMM8 & 2 ? s2 : s1)[(IMM8 & 1) * 2 + 1]; + } + if(IMM8 & 128) e[3] = e[3] = 0; + else{ + unsigned m = (IMM8 >> 4) & 3; + e[2] = (m & 2 ? s2 : s1)[(m & 1) * 2]; + e[3] = (m & 2 ? s2 : s1)[(m & 1) * 2 + 1]; + } + + if (check_union256i_q (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vpermil2pd-1.c b/gcc/testsuite/gcc.target/i386/avx-vpermil2pd-1.c new file mode 100644 index 0000000..0408624 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpermil2pd-1.c @@ -0,0 +1,55 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +#ifndef ZERO_MATCH +#define ZERO_MATCH 2 +#endif + +static double +select2dp(double *src1, double *src2, long long sel) +{ + double tmp = 0.0; + + if ((sel & 0x3) == 0) tmp = src1[0]; + if ((sel & 0x3) == 1) tmp = src1[1]; + if ((sel & 0x3) == 2) tmp = src2[0]; + if ((sel & 0x3) == 3) tmp = src2[1]; + + return tmp; +} + +static double +sel_and_condzerodp(double *src1, double *src2, long long sel, int imm8) +{ + double tmp; + + tmp = select2dp(src1, src2, sel & 0x3); + + if (((imm8 & 0x3) == 2) && ((sel & 0x4) == 0x4)) tmp = 0; + if (((imm8 & 0x3) == 3) && ((sel & 0x4) == 0x0)) tmp = 0; + + return tmp; +} + +void static +avx_test () +{ + union128d s1, s2, u; + union128i_q s3; + double e[2]; + + s1.x = _mm_set_pd (1, 2); + s2.x = _mm_set_pd (3, 4); + s3.x = _mm_set_epi64x (1, 2); + u.x = _mm_permute2_pd(s1.x, s2.x, s3.x, ZERO_MATCH); + + e[0] = sel_and_condzerodp (s1.a, s2.a, (s3.a[0] & 0xe)>>1, ZERO_MATCH); + e[1] = sel_and_condzerodp (s1.a, s2.a, (s3.a[1] & 0xe)>>1, ZERO_MATCH); + + if (check_union128d (u, e)) + abort (); +} + diff --git a/gcc/testsuite/gcc.target/i386/avx-vpermil2pd-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vpermil2pd-256-1.c new file mode 100644 index 0000000..d9a94ae --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpermil2pd-256-1.c @@ -0,0 +1,57 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +#ifndef ZERO_MATCH +#define ZERO_MATCH 1 +#endif + +static double +select2dp(double *src1, double *src2, long long sel) +{ + double tmp = 3.414; + + if ((sel & 0x3) == 0) tmp = src1[0]; + if ((sel & 0x3) == 1) tmp = src1[1]; + if ((sel & 0x3) == 2) tmp = src2[0]; + if ((sel & 0x3) == 3) tmp = src2[1]; + + return tmp; +} + +static double +sel_and_condzerodp(double *src1, double *src2, long long sel, int imm8) +{ + double tmp; + + tmp = select2dp(src1, src2, sel); + + if (((imm8 & 0x3) == 2) && ((sel & 0x4) == 0x4)) tmp = 0; + if (((imm8 & 0x3) == 3) && ((sel & 0x4) == 0x0)) tmp = 0; + + return tmp; +} + +void static +avx_test () +{ + union256d u, s1, s2; + double e[4] = {0.0}; + union256i_q s3; + + s1.x = _mm256_set_pd (1, 2, 3, 4); + s2.x = _mm256_set_pd (5, 6, 7, 8); + s3.x = _mm256_set_epi64x (0, 1, 2, 3); + u.x = _mm256_permute2_pd(s1.x, s2.x, s3.x, ZERO_MATCH); + + e[0] = sel_and_condzerodp (s1.a, s2.a, (s3.a[0] & 0xe)>>1, ZERO_MATCH); + e[1] = sel_and_condzerodp (s1.a, s2.a, (s3.a[1] & 0xe)>>1, ZERO_MATCH); + e[2] = sel_and_condzerodp (s1.a + 2, s2.a + 2, (s3.a[2] & 0xe)>>1, ZERO_MATCH); + e[3] = sel_and_condzerodp (s1.a + 2, s2.a + 2, (s3.a[3] & 0xe)>>1, ZERO_MATCH); + + if (check_union256d (u, e)) + abort (); +} + diff --git a/gcc/testsuite/gcc.target/i386/avx-vpermil2ps-1.c b/gcc/testsuite/gcc.target/i386/avx-vpermil2ps-1.c new file mode 100644 index 0000000..c04600e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpermil2ps-1.c @@ -0,0 +1,62 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +#ifndef ZERO_MATCH +#define ZERO_MATCH 1 +#endif + +static float +select2sp(float *src1, float *src2, int sel) +{ + float tmp; + + if ((sel & 0x7) == 0) tmp = src1[0]; + if ((sel & 0x7) == 1) tmp = src1[1]; + if ((sel & 0x7) == 2) tmp = src1[2]; + if ((sel & 0x7) == 3) tmp = src1[3]; + if ((sel & 0x7) == 4) tmp = src2[0]; + if ((sel & 0x7) == 5) tmp = src2[1]; + if ((sel & 0x7) == 6) tmp = src2[2]; + if ((sel & 0x7) == 7) tmp = src2[3]; + + return tmp; +} +static float +sel_and_condzerosp(float *src1, float *src2, int sel, int imm8) +{ + float tmp; + + tmp = select2sp(src1, src2, sel & 0x7); + + if (((imm8 & 0x3) == 2) && ((sel & 0x8) == 0x8)) tmp = 0; + if (((imm8 & 0x3) == 3) && ((sel & 0x8) == 0x0)) tmp = 0; + + return tmp; +} + +void static +avx_test () +{ + int i; + union128 source1, source2, u; + union128i_d source3; + float s1[4] = {1, 2, 3, 4}; + float s2[4] = {5, 6, 7, 8}; + int s3[4] = {0, 1, 0, 1}; + float e[4]; + + source1.x = _mm_loadu_ps(s1); + source2.x = _mm_loadu_ps(s2); + source3.x = _mm_loadu_si128((__m128i*) s3); + u.x = _mm_permute2_ps(source1.x, source2.x, source3.x, ZERO_MATCH); + + for (i = 0; i < 4; ++i) { + e[i] = sel_and_condzerosp(&s1[i & 0x4], &s2[i & 0x4], s3[i] & 0xf, ZERO_MATCH & 0x3); + } + + if (check_union128 (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vpermil2ps-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vpermil2ps-256-1.c new file mode 100644 index 0000000..6ee5803 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpermil2ps-256-1.c @@ -0,0 +1,62 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +#ifndef ZERO_MATCH +#define ZERO_MATCH 3 +#endif + +static float +select2sp(float *src1, float *src2, int sel) +{ + float tmp; + + if ((sel & 0x7) == 0) tmp = src1[0]; + if ((sel & 0x7) == 1) tmp = src1[1]; + if ((sel & 0x7) == 2) tmp = src1[2]; + if ((sel & 0x7) == 3) tmp = src1[3]; + if ((sel & 0x7) == 4) tmp = src2[0]; + if ((sel & 0x7) == 5) tmp = src2[1]; + if ((sel & 0x7) == 6) tmp = src2[2]; + if ((sel & 0x7) == 7) tmp = src2[3]; + + return tmp; +} +static float +sel_and_condzerosp(float *src1, float *src2, int sel, int imm8) +{ + float tmp; + + tmp = select2sp(src1, src2, sel & 0x7); + + if (((imm8 & 0x3) == 2) && ((sel & 0x8) == 0x8)) tmp = 0; + if (((imm8 & 0x3) == 3) && ((sel & 0x8) == 0x0)) tmp = 0; + + return tmp; +} + +void static +avx_test () +{ + int i; + union256 source1, source2, u; + union256i_d source3; + float s1[8]={1, 2, 3, 4, 5, 6, 7, 8}; + float s2[8]={9, 10, 11, 12, 13, 14, 15, 16}; + int s3[8]={11, 2, 3, 15, 5, 12, 7, 8}; + float e[8]; + + source1.x = _mm256_loadu_ps(s1); + source2.x = _mm256_loadu_ps(s2); + source3.x = _mm256_loadu_si256((__m256i*) s3); + u.x = _mm256_permute2_ps(source1.x, source2.x, source3.x, ZERO_MATCH); + + for (i = 0; i < 8; ++i) { + e[i] = sel_and_condzerosp(&s1[i & 0x4], &s2[i & 0x4], s3[i] & 0xf, ZERO_MATCH & 0x3); + } + + if (check_union256(u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vpermilpd-1.c b/gcc/testsuite/gcc.target/i386/avx-vpermilpd-1.c new file mode 100644 index 0000000..6379cdb --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpermilpd-1.c @@ -0,0 +1,27 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +#ifndef CTRL +#define CTRL 1 +#endif + +void static +avx_test () +{ + union128d u, src; + double s[2] = {9674.67456, 13543.9788}; + double e[2]; + + src.x=_mm_loadu_pd(s); + u.x=_mm_permute_pd(src.x, CTRL); + + e[0] = s[ (CTRL & 0x01)]; + e[1] = s[((CTRL & 0x02) >> 1)]; + + if (check_union128d (u, e)) + abort (); +} + diff --git a/gcc/testsuite/gcc.target/i386/avx-vpermilpd-2.c b/gcc/testsuite/gcc.target/i386/avx-vpermilpd-2.c new file mode 100644 index 0000000..a6d7a0d --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpermilpd-2.c @@ -0,0 +1,33 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +#ifndef CTRL +#define CTRL 2 +#endif + +#define mask_v(pos) (((CTRL & (1ULL << (pos))) >> (pos)) << 1) + +void static +avx_test () +{ + union128d u, src; + union128i_q ctl; + + double s[2] = {9674.67456, 13543.9788}; + long long m[2] = {mask_v(0), mask_v(1)}; + double e[2]; + + src.x = _mm_loadu_pd(s); + ctl.x = _mm_loadu_si128((__m128i*) m); + u.x = _mm_permutevar_pd(src.x, ctl.x); + + e[0] = s[((m[0] & 0x02) >> 1)]; + e[1] = s[((m[1] & 0x02) >> 1)]; + + if (check_union128d (u, e)) + abort (); +} + diff --git a/gcc/testsuite/gcc.target/i386/avx-vpermilpd-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vpermilpd-256-1.c new file mode 100644 index 0000000..ca93474 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpermilpd-256-1.c @@ -0,0 +1,25 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +#define CONTROL 5 + +void static +avx_test (void) +{ + union256d u, s1; + double e [4]; + + s1.x = _mm256_set_pd (2134.3343,1234.635654,453.345635,54646.464356); + u.x = _mm256_permute_pd (s1.x, CONTROL); + + e[0] = (CONTROL&0x01) ? s1.a[1] : s1.a[0]; + e[1] = (CONTROL&0x02) ? s1.a[1] : s1.a[0]; + e[2] = (CONTROL&0x04) ? s1.a[3] : s1.a[2]; + e[3] = (CONTROL&0x08) ? s1.a[3] : s1.a[2]; + + if (check_union256d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vpermilpd-256-2.c b/gcc/testsuite/gcc.target/i386/avx-vpermilpd-256-2.c new file mode 100644 index 0000000..1cd5c3a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpermilpd-256-2.c @@ -0,0 +1,36 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +#ifndef CTRL +#define CTRL 6 +#endif + +#define mask_v(pos) (((CTRL & (1ULL << (pos))) >> (pos)) << 1) + +void static +avx_test () +{ + union256d u, src; + union256i_q ctl; + + double s[4] = {39578.467285, 7856.342941, 9674.67456, 13543.9788}; + long long m[4] = {mask_v(0), mask_v(1), mask_v(2), mask_v(3)}; + double e[4] = {0.0}; + + src.x = _mm256_loadu_pd(s); + ctl.x = _mm256_loadu_si256((__m256i*) m); + u.x = _mm256_permutevar_pd(src.x, ctl.x); + + e[0] = s[0 + ((m[0] & 0x02) >> 1)]; + e[1] = s[0 + ((m[1] & 0x02) >> 1)]; + e[2] = s[2 + ((m[2] & 0x02) >> 1)]; + e[3] = s[2 + ((m[3] & 0x02) >> 1)]; + + if (check_union256d (u, e)) + abort (); +} + + diff --git a/gcc/testsuite/gcc.target/i386/avx-vpermilps-1.c b/gcc/testsuite/gcc.target/i386/avx-vpermilps-1.c new file mode 100644 index 0000000..146f555 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpermilps-1.c @@ -0,0 +1,27 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +#ifndef CTRL +#define CTRL 11 +#endif + +void static +avx_test () +{ + union128 u, s; + float e[4]; + + s.x = _mm_set_ps (1, 2, 3, 4); + u.x = _mm_permute_ps(s.x, CTRL); + + e[0] = s.a[ (CTRL & 0x03)]; + e[1] = s.a[((CTRL & 0x0c) >> 2)]; + e[2] = s.a[((CTRL & 0x30) >> 4)]; + e[3] = s.a[((CTRL & 0xc0) >> 6)]; + + if (check_union128 (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vpermilps-2.c b/gcc/testsuite/gcc.target/i386/avx-vpermilps-2.c new file mode 100644 index 0000000..ca0fbae --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpermilps-2.c @@ -0,0 +1,33 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +#ifndef CTRL +#define CTRL 233 +#endif + +#define mask_v(pos) ((CTRL & (0x3 << (pos))) >> (pos)) + +void static +avx_test () +{ + union128 u, s; + union128i_q ctl; + int m[4] = {mask_v(0), mask_v(1), mask_v(2), mask_v(3)}; + float e[4]; + + s.x = _mm_set_ps (1, 2, 3, 4); + ctl.x = _mm_loadu_si128((__m128i*) m); + u.x = _mm_permutevar_ps(s.x, ctl.x); + + e[0] = s.a[0 + (m[0] & 0x03)]; + e[1] = s.a[0 + (m[1] & 0x03)]; + e[2] = s.a[0 + (m[2] & 0x03)]; + e[3] = s.a[0 + (m[3] & 0x03)]; + + if (check_union128 (u, e)) + abort (); +} + diff --git a/gcc/testsuite/gcc.target/i386/avx-vpermilps-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vpermilps-256-1.c new file mode 100644 index 0000000..b929149 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpermilps-256-1.c @@ -0,0 +1,31 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +#ifndef CTRL +#define CTRL 129 +#endif + +void static +avx_test () +{ + union256 src, u; + float e[8] = {0.0}; + + src.x = _mm256_set_ps (1, 2, 3, 4, 5, 6, 7, 8); + u.x = _mm256_permute_ps(src.x, CTRL); + + e[0] = src.a[0 + (CTRL & 0x03)]; + e[1] = src.a[0 + ((CTRL & 0x0c) >> 2)]; + e[2] = src.a[0 + ((CTRL & 0x30) >> 4)]; + e[3] = src.a[0 + ((CTRL & 0xc0) >> 6)]; + e[4] = src.a[4 + (CTRL & 0x03)]; + e[5] = src.a[4 + ((CTRL & 0x0c) >> 2)]; + e[6] = src.a[4 + ((CTRL & 0x30) >> 4)]; + e[7] = src.a[4 + ((CTRL & 0xc0) >> 6)]; + + if (check_union256 (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vpermilps-256-2.c b/gcc/testsuite/gcc.target/i386/avx-vpermilps-256-2.c new file mode 100644 index 0000000..9890410 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpermilps-256-2.c @@ -0,0 +1,37 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +#ifndef CTRL +#define CTRL 233 +#endif + +#define mask_v(pos) ((CTRL & (0x3 << (pos))) >> (pos)) + +void static +avx_test () +{ + union256 u, s; + union256i_q ctl; + int m[8] = {mask_v(0), mask_v(1), mask_v(2), mask_v(3), mask_v(4), mask_v(5), mask_v(6), mask_v(7)}; + float e[8]; + + s.x = _mm256_set_ps (1, 2, 3, 4, 5, 6, 7, 8); + ctl.x = _mm256_loadu_si256((__m256i*) m); + u.x = _mm256_permutevar_ps(s.x, ctl.x); + + e[0] = s.a[0 + (m[0] & 0x03)]; + e[1] = s.a[0 + (m[1] & 0x03)]; + e[2] = s.a[0 + (m[2] & 0x03)]; + e[3] = s.a[0 + (m[3] & 0x03)]; + e[4] = s.a[4 + (m[4] & 0x03)]; + e[5] = s.a[4 + (m[5] & 0x03)]; + e[6] = s.a[4 + (m[6] & 0x03)]; + e[7] = s.a[4 + (m[7] & 0x03)]; + + if (check_union256 (u, e)) + abort (); +} + diff --git a/gcc/testsuite/gcc.target/i386/avx-vpextrb-1.c b/gcc/testsuite/gcc.target/i386/avx-vpextrb-1.c new file mode 100644 index 0000000..4e1c644 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpextrb-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse4_1-pextrb.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpextrd-1.c b/gcc/testsuite/gcc.target/i386/avx-vpextrd-1.c new file mode 100644 index 0000000..bc67a28 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpextrd-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse4_1-pextrd.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpextrq-1.c b/gcc/testsuite/gcc.target/i386/avx-vpextrq-1.c new file mode 100644 index 0000000..1ffe007 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpextrq-1.c @@ -0,0 +1,9 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-require-effective-target lp64 } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse4_1-pextrq.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpextrw-1.c b/gcc/testsuite/gcc.target/i386/avx-vpextrw-1.c new file mode 100644 index 0000000..7751ded --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpextrw-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse4_1-pextrw.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vphaddd-1.c b/gcc/testsuite/gcc.target/i386/avx-vphaddd-1.c new file mode 100644 index 0000000..57af9a6 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vphaddd-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "ssse3-phaddd.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vphaddsw-1.c b/gcc/testsuite/gcc.target/i386/avx-vphaddsw-1.c new file mode 100644 index 0000000..0fce115 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vphaddsw-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "ssse3-phaddsw.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vphaddw-1.c b/gcc/testsuite/gcc.target/i386/avx-vphaddw-1.c new file mode 100644 index 0000000..08faf3c --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vphaddw-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "ssse3-phaddw.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vphminposuw-1.c b/gcc/testsuite/gcc.target/i386/avx-vphminposuw-1.c new file mode 100644 index 0000000..288651c --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vphminposuw-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse4_1-phminposuw.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vphsubd-1.c b/gcc/testsuite/gcc.target/i386/avx-vphsubd-1.c new file mode 100644 index 0000000..93cc726 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vphsubd-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "ssse3-phsubd.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vphsubsw-1.c b/gcc/testsuite/gcc.target/i386/avx-vphsubsw-1.c new file mode 100644 index 0000000..cd0e687 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vphsubsw-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "ssse3-phsubsw.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vphsubw-1.c b/gcc/testsuite/gcc.target/i386/avx-vphsubw-1.c new file mode 100644 index 0000000..f9050da --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vphsubw-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "ssse3-phsubw.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpinsrb-1.c b/gcc/testsuite/gcc.target/i386/avx-vpinsrb-1.c new file mode 100644 index 0000000..b3b6358 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpinsrb-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse4_1-pinsrb.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpinsrd-1.c b/gcc/testsuite/gcc.target/i386/avx-vpinsrd-1.c new file mode 100644 index 0000000..69c9bef --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpinsrd-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse4_1-pinsrd.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpinsrq-1.c b/gcc/testsuite/gcc.target/i386/avx-vpinsrq-1.c new file mode 100644 index 0000000..3b9d26a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpinsrq-1.c @@ -0,0 +1,9 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-require-effective-target lp64 } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse4_1-pinsrq.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpmaddubsw-1.c b/gcc/testsuite/gcc.target/i386/avx-vpmaddubsw-1.c new file mode 100644 index 0000000..c80ad6f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpmaddubsw-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "ssse3-pmaddubsw.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpmaxsb-1.c b/gcc/testsuite/gcc.target/i386/avx-vpmaxsb-1.c new file mode 100644 index 0000000..74b5a33 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpmaxsb-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse4_1-pmaxsb.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpmaxsd-1.c b/gcc/testsuite/gcc.target/i386/avx-vpmaxsd-1.c new file mode 100644 index 0000000..832e25e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpmaxsd-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse4_1-pmaxsd.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpmaxsw-1.c b/gcc/testsuite/gcc.target/i386/avx-vpmaxsw-1.c new file mode 100644 index 0000000..55e362e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpmaxsw-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-pmaxsw-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpmaxub-1.c b/gcc/testsuite/gcc.target/i386/avx-vpmaxub-1.c new file mode 100644 index 0000000..0f647cb --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpmaxub-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-pmaxub-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpmaxud-1.c b/gcc/testsuite/gcc.target/i386/avx-vpmaxud-1.c new file mode 100644 index 0000000..afd29db --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpmaxud-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse4_1-pmaxud.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpmaxuw-1.c b/gcc/testsuite/gcc.target/i386/avx-vpmaxuw-1.c new file mode 100644 index 0000000..74b4177 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpmaxuw-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse4_1-pmaxuw.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpminsb-1.c b/gcc/testsuite/gcc.target/i386/avx-vpminsb-1.c new file mode 100644 index 0000000..e44ca61 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpminsb-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse4_1-pminsb.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpminsd-1.c b/gcc/testsuite/gcc.target/i386/avx-vpminsd-1.c new file mode 100644 index 0000000..54e18ed --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpminsd-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse4_1-pminsd.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpminsw-1.c b/gcc/testsuite/gcc.target/i386/avx-vpminsw-1.c new file mode 100644 index 0000000..ce65712 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpminsw-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-pminsw-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpminub-1.c b/gcc/testsuite/gcc.target/i386/avx-vpminub-1.c new file mode 100644 index 0000000..d7b77bc --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpminub-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-pminub-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpminud-1.c b/gcc/testsuite/gcc.target/i386/avx-vpminud-1.c new file mode 100644 index 0000000..bbc069e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpminud-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse4_1-pminud.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpminuw-1.c b/gcc/testsuite/gcc.target/i386/avx-vpminuw-1.c new file mode 100644 index 0000000..9b25355 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpminuw-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse4_1-pminuw.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpmovmskb-1.c b/gcc/testsuite/gcc.target/i386/avx-vpmovmskb-1.c new file mode 100644 index 0000000..0b3e8aa --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpmovmskb-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-pmovmskb-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpmovsxbd-1.c b/gcc/testsuite/gcc.target/i386/avx-vpmovsxbd-1.c new file mode 100644 index 0000000..b3a57b0 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpmovsxbd-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse4_1-pmovsxbd.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpmovsxbq-1.c b/gcc/testsuite/gcc.target/i386/avx-vpmovsxbq-1.c new file mode 100644 index 0000000..a9aba16 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpmovsxbq-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse4_1-pmovsxbq.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpmovsxbw-1.c b/gcc/testsuite/gcc.target/i386/avx-vpmovsxbw-1.c new file mode 100644 index 0000000..a3f2efe --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpmovsxbw-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse4_1-pmovsxbw.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpmovsxdq-1.c b/gcc/testsuite/gcc.target/i386/avx-vpmovsxdq-1.c new file mode 100644 index 0000000..6f29405 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpmovsxdq-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse4_1-pmovsxdq.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpmovsxwd-1.c b/gcc/testsuite/gcc.target/i386/avx-vpmovsxwd-1.c new file mode 100644 index 0000000..8e186e3 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpmovsxwd-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse4_1-pmovsxwd.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpmovsxwq-1.c b/gcc/testsuite/gcc.target/i386/avx-vpmovsxwq-1.c new file mode 100644 index 0000000..90c2d1d --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpmovsxwq-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse4_1-pmovsxwq.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpmovzxbd-1.c b/gcc/testsuite/gcc.target/i386/avx-vpmovzxbd-1.c new file mode 100644 index 0000000..3f4556c --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpmovzxbd-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse4_1-pmovzxbd.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpmovzxbq-1.c b/gcc/testsuite/gcc.target/i386/avx-vpmovzxbq-1.c new file mode 100644 index 0000000..719c727 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpmovzxbq-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse4_1-pmovzxbq.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpmovzxbw-1.c b/gcc/testsuite/gcc.target/i386/avx-vpmovzxbw-1.c new file mode 100644 index 0000000..ad5fe4e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpmovzxbw-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse4_1-pmovzxbw.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpmovzxdq-1.c b/gcc/testsuite/gcc.target/i386/avx-vpmovzxdq-1.c new file mode 100644 index 0000000..7490902 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpmovzxdq-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse4_1-pmovzxdq.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpmovzxwd-1.c b/gcc/testsuite/gcc.target/i386/avx-vpmovzxwd-1.c new file mode 100644 index 0000000..5447155 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpmovzxwd-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse4_1-pmovzxwd.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpmovzxwq-1.c b/gcc/testsuite/gcc.target/i386/avx-vpmovzxwq-1.c new file mode 100644 index 0000000..b8239f2 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpmovzxwq-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse4_1-pmovzxwq.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpmuldq-1.c b/gcc/testsuite/gcc.target/i386/avx-vpmuldq-1.c new file mode 100644 index 0000000..527d3cb --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpmuldq-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse4_1-pmuldq.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpmulhrsw-1.c b/gcc/testsuite/gcc.target/i386/avx-vpmulhrsw-1.c new file mode 100644 index 0000000..6451bf1 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpmulhrsw-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "ssse3-pmulhrsw.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpmulhuw-1.c b/gcc/testsuite/gcc.target/i386/avx-vpmulhuw-1.c new file mode 100644 index 0000000..f3127a9 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpmulhuw-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-pmulhuw-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpmulhw-1.c b/gcc/testsuite/gcc.target/i386/avx-vpmulhw-1.c new file mode 100644 index 0000000..c36b489 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpmulhw-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-pmulhw-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpmulld-1.c b/gcc/testsuite/gcc.target/i386/avx-vpmulld-1.c new file mode 100644 index 0000000..63df55d --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpmulld-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse4_1-pmulld.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpmullw-1.c b/gcc/testsuite/gcc.target/i386/avx-vpmullw-1.c new file mode 100644 index 0000000..649dcad --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpmullw-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-pmullw-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpmuludq-1.c b/gcc/testsuite/gcc.target/i386/avx-vpmuludq-1.c new file mode 100644 index 0000000..e7c1ceb --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpmuludq-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-pmuludq-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpor-1.c b/gcc/testsuite/gcc.target/i386/avx-vpor-1.c new file mode 100644 index 0000000..cda694f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpor-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-por-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpsadbw-1.c b/gcc/testsuite/gcc.target/i386/avx-vpsadbw-1.c new file mode 100644 index 0000000..6f76c96 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpsadbw-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-psadbw-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpshufb-1.c b/gcc/testsuite/gcc.target/i386/avx-vpshufb-1.c new file mode 100644 index 0000000..a868b19 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpshufb-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "ssse3-pshufb.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpshufd-1.c b/gcc/testsuite/gcc.target/i386/avx-vpshufd-1.c new file mode 100644 index 0000000..543bcdf --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpshufd-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-pshufd-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpshufhw-1.c b/gcc/testsuite/gcc.target/i386/avx-vpshufhw-1.c new file mode 100644 index 0000000..23b79c6 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpshufhw-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-pshufhw-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpshuflw-1.c b/gcc/testsuite/gcc.target/i386/avx-vpshuflw-1.c new file mode 100644 index 0000000..268b5d2 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpshuflw-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-pshuflw-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpsignb-1.c b/gcc/testsuite/gcc.target/i386/avx-vpsignb-1.c new file mode 100644 index 0000000..c88acf2 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpsignb-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "ssse3-psignb.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpsignd-1.c b/gcc/testsuite/gcc.target/i386/avx-vpsignd-1.c new file mode 100644 index 0000000..ca5bb39 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpsignd-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "ssse3-psignd.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpsignw-1.c b/gcc/testsuite/gcc.target/i386/avx-vpsignw-1.c new file mode 100644 index 0000000..392ca03 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpsignw-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "ssse3-psignw.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpslld-1.c b/gcc/testsuite/gcc.target/i386/avx-vpslld-1.c new file mode 100644 index 0000000..778662d --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpslld-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-pslld-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpslld-2.c b/gcc/testsuite/gcc.target/i386/avx-vpslld-2.c new file mode 100644 index 0000000..12754ed --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpslld-2.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-pslld-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpslldq-1.c b/gcc/testsuite/gcc.target/i386/avx-vpslldq-1.c new file mode 100644 index 0000000..aea5b78 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpslldq-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-pslldq-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpsllq-1.c b/gcc/testsuite/gcc.target/i386/avx-vpsllq-1.c new file mode 100644 index 0000000..37c1526 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpsllq-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-psllq-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpsllq-2.c b/gcc/testsuite/gcc.target/i386/avx-vpsllq-2.c new file mode 100644 index 0000000..0cc298d --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpsllq-2.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-psllq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpsllw-1.c b/gcc/testsuite/gcc.target/i386/avx-vpsllw-1.c new file mode 100644 index 0000000..ebb610c --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpsllw-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-psllw-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpsllw-2.c b/gcc/testsuite/gcc.target/i386/avx-vpsllw-2.c new file mode 100644 index 0000000..62a989d --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpsllw-2.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-psllw-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpsrad-1.c b/gcc/testsuite/gcc.target/i386/avx-vpsrad-1.c new file mode 100644 index 0000000..2293c42 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpsrad-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-psrad-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpsrad-2.c b/gcc/testsuite/gcc.target/i386/avx-vpsrad-2.c new file mode 100644 index 0000000..53f4f09 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpsrad-2.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-psrad-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpsraw-1.c b/gcc/testsuite/gcc.target/i386/avx-vpsraw-1.c new file mode 100644 index 0000000..525163f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpsraw-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-psraw-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpsraw-2.c b/gcc/testsuite/gcc.target/i386/avx-vpsraw-2.c new file mode 100644 index 0000000..90c8df0 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpsraw-2.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-psraw-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpsrld-1.c b/gcc/testsuite/gcc.target/i386/avx-vpsrld-1.c new file mode 100644 index 0000000..a143a65 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpsrld-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-psrld-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpsrld-2.c b/gcc/testsuite/gcc.target/i386/avx-vpsrld-2.c new file mode 100644 index 0000000..e9e1e3f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpsrld-2.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-psrld-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpsrldq-1.c b/gcc/testsuite/gcc.target/i386/avx-vpsrldq-1.c new file mode 100644 index 0000000..a8cec08 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpsrldq-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-psrldq-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpsrlq-1.c b/gcc/testsuite/gcc.target/i386/avx-vpsrlq-1.c new file mode 100644 index 0000000..d7a57bf --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpsrlq-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-psrlq-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpsrlq-2.c b/gcc/testsuite/gcc.target/i386/avx-vpsrlq-2.c new file mode 100644 index 0000000..efa8708 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpsrlq-2.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-psrlq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpsrlw-1.c b/gcc/testsuite/gcc.target/i386/avx-vpsrlw-1.c new file mode 100644 index 0000000..e132c2d --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpsrlw-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-psrlw-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpsrlw-2.c b/gcc/testsuite/gcc.target/i386/avx-vpsrlw-2.c new file mode 100644 index 0000000..ec4a85d --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpsrlw-2.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-psrlw-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpsubb-1.c b/gcc/testsuite/gcc.target/i386/avx-vpsubb-1.c new file mode 100644 index 0000000..e66624f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpsubb-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-psubb-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpsubd-1.c b/gcc/testsuite/gcc.target/i386/avx-vpsubd-1.c new file mode 100644 index 0000000..1e9214d --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpsubd-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-psubd-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpsubq-1.c b/gcc/testsuite/gcc.target/i386/avx-vpsubq-1.c new file mode 100644 index 0000000..b7c22be --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpsubq-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-psubq-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpsubsb-1.c b/gcc/testsuite/gcc.target/i386/avx-vpsubsb-1.c new file mode 100644 index 0000000..fa71d61 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpsubsb-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-psubsb-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpsubsw-1.c b/gcc/testsuite/gcc.target/i386/avx-vpsubsw-1.c new file mode 100644 index 0000000..b3fbad0 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpsubsw-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-psubsw-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpsubw-1.c b/gcc/testsuite/gcc.target/i386/avx-vpsubw-1.c new file mode 100644 index 0000000..a83140e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpsubw-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-psubw-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vptest-1.c b/gcc/testsuite/gcc.target/i386/avx-vptest-1.c new file mode 100644 index 0000000..c70752d --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vptest-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse4_1-ptest-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vptest-2.c b/gcc/testsuite/gcc.target/i386/avx-vptest-2.c new file mode 100644 index 0000000..cb6b552 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vptest-2.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse4_1-ptest-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vptest-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vptest-256-1.c new file mode 100644 index 0000000..ebc2673 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vptest-256-1.c @@ -0,0 +1,28 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +void static +avx_test (void) +{ + int s1i[8] = {0, 5463, 86456, 0, 1234, 0, 62445, 34352}; + int s2i[8] = {0, 1223, 0, 0, 0, 1, 0, 0}; + int d; + int e; + int i; + union256i_d s1, s2; + + s1.x = _mm256_loadu_si256 ((__m256i*)s1i); + s2.x = _mm256_loadu_si256 ((__m256i*)s2i); + d = _mm256_testz_si256 (s1.x, s2.x); + + e = 1; + for (i = 0; i < 8; i++) + if ((s1i[i] & s2i[i]) != 0) + e = 0; + + if (d != e) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vptest-256-2.c b/gcc/testsuite/gcc.target/i386/avx-vptest-256-2.c new file mode 100644 index 0000000..f85344a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vptest-256-2.c @@ -0,0 +1,28 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +void static +avx_test (void) +{ + int s1i[8] = {0, 0, 0, 0, 0, 0, 0, 0}; + int s2i[8] = {1, 2, 3, 4, 5, 6, 7, 8}; + int d; + int e; + int i; + union256i_d s1, s2; + + s1.x = _mm256_loadu_si256 ((__m256i*)s1i); + s2.x = _mm256_loadu_si256 ((__m256i*)s2i); + d = _mm256_testc_si256 (s1.x, s2.x); + + e = 1; + for (i = 0; i < 8; i++) + if ((~s1i[i] & s2i[i]) != 0) + e = 0; + + if (d != e) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vptest-256-3.c b/gcc/testsuite/gcc.target/i386/avx-vptest-256-3.c new file mode 100644 index 0000000..cccbbef4 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vptest-256-3.c @@ -0,0 +1,33 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +void static +avx_test (void) +{ + int s1i[8] = {0, 0, 0, 0, 0, 0, 0, 0}; + int s2i[8] = {1, 2, 3, 4, 5, 6, 7, 8}; + int d; + int c = 1, z = 1, e = 0xf; + int i; + union256i_d s1, s2; + + s1.x = _mm256_loadu_si256 ((__m256i*)s1i); + s2.x = _mm256_loadu_si256 ((__m256i*)s2i); + d = _mm256_testnzc_si256 (s1.x, s2.x); + + for (i = 0; i < 8; i++) + { + if ((s1.a[i] & s2.a[i])) + z = 0; + if ((~s1.a[i] & s2.a[i])) + c = 0; + } + + e = (z == 0 && c == 0) ? 1 : 0; + + if (d != e) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vptest-3.c b/gcc/testsuite/gcc.target/i386/avx-vptest-3.c new file mode 100644 index 0000000..1b875a7 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vptest-3.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse4_1-ptest-3.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpunpckhbw-1.c b/gcc/testsuite/gcc.target/i386/avx-vpunpckhbw-1.c new file mode 100644 index 0000000..3c76aa3 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpunpckhbw-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-punpckhbw-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpunpckhdq-1.c b/gcc/testsuite/gcc.target/i386/avx-vpunpckhdq-1.c new file mode 100644 index 0000000..a853d70 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpunpckhdq-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-punpckhdq-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpunpckhqdq-1.c b/gcc/testsuite/gcc.target/i386/avx-vpunpckhqdq-1.c new file mode 100644 index 0000000..8b86c76 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpunpckhqdq-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-punpckhqdq-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpunpckhwd-1.c b/gcc/testsuite/gcc.target/i386/avx-vpunpckhwd-1.c new file mode 100644 index 0000000..0e4e051 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpunpckhwd-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-punpckhwd-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpunpcklbw-1.c b/gcc/testsuite/gcc.target/i386/avx-vpunpcklbw-1.c new file mode 100644 index 0000000..ad856cf --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpunpcklbw-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-punpcklbw-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpunpckldq-1.c b/gcc/testsuite/gcc.target/i386/avx-vpunpckldq-1.c new file mode 100644 index 0000000..2acd879 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpunpckldq-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-punpckldq-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpunpcklqdq-1.c b/gcc/testsuite/gcc.target/i386/avx-vpunpcklqdq-1.c new file mode 100644 index 0000000..bd378a3 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpunpcklqdq-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-punpcklqdq-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpunpcklwd-1.c b/gcc/testsuite/gcc.target/i386/avx-vpunpcklwd-1.c new file mode 100644 index 0000000..07f2be1 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpunpcklwd-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-punpcklwd-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vpxor-1.c b/gcc/testsuite/gcc.target/i386/avx-vpxor-1.c new file mode 100644 index 0000000..dfc4653 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vpxor-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-pxor-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vrcpps-1.c b/gcc/testsuite/gcc.target/i386/avx-vrcpps-1.c new file mode 100644 index 0000000..45673de --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vrcpps-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse-rcpps-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vrcpps-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vrcpps-256-1.c new file mode 100644 index 0000000..16b3051 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vrcpps-256-1.c @@ -0,0 +1,26 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#include "avx-check.h" + +static void +avx_test () +{ + int i; + union256 u, s1; + float e[8] = {0.0}; + + s1.x = _mm256_set_ps (1.0, 2.0, 13.0, 14.0, 56.89, 73.3, 4.78, 45.64); + u.x = _mm256_rcp_ps (s1.x); + + for (i = 0; i < 8; i++) { + __m128 tmp = _mm_load_ss (&s1.a[i]); + tmp = _mm_rcp_ss (tmp); + _mm_store_ss (&e[i], tmp); + } + + if (check_union256 (u, e)) + abort (); +} + diff --git a/gcc/testsuite/gcc.target/i386/avx-vroundpd-1.c b/gcc/testsuite/gcc.target/i386/avx-vroundpd-1.c new file mode 100644 index 0000000..c8b0ec1 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vroundpd-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse4_1-roundpd-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vroundpd-2.c b/gcc/testsuite/gcc.target/i386/avx-vroundpd-2.c new file mode 100644 index 0000000..e29ac55 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vroundpd-2.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse4_1-roundpd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vroundpd-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vroundpd-256-1.c new file mode 100644 index 0000000..71da752 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vroundpd-256-1.c @@ -0,0 +1,29 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +#define iRoundMode 0x7 + +void static +avx_test (void) +{ + union256d u, s1; + double source [4] = {2134.3343,1234.635654,453.345635,54646.464356}; + double e[4] = {0.0}; + int i; + + s1.x = _mm256_loadu_pd (source); + u.x = _mm256_round_pd (s1.x, iRoundMode); + + for (i = 0; i < 4; i++) + { + __m128d tmp = _mm_load_sd (&s1.a[i]); + tmp = _mm_round_sd (tmp, tmp, iRoundMode); + _mm_store_sd (&e[i], tmp); + } + + if (check_union256d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vroundpd-256-2.c b/gcc/testsuite/gcc.target/i386/avx-vroundpd-256-2.c new file mode 100644 index 0000000..a61d773 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vroundpd-256-2.c @@ -0,0 +1,27 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +void static +avx_test (void) +{ + union256d u, s1; + double source [4] = {2134.3343,1234.635654,453.345635,54646.464356}; + double e[4] = {0.0}; + int i; + + s1.x = _mm256_loadu_pd (source); + u.x = _mm256_floor_pd (s1.x); + + for (i = 0; i < 4; i++) + { + __m128d tmp = _mm_load_sd (&s1.a[i]); + tmp = _mm_floor_sd (tmp, tmp); + _mm_store_sd (&e[i], tmp); + } + + if (check_union256d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vroundpd-256-3.c b/gcc/testsuite/gcc.target/i386/avx-vroundpd-256-3.c new file mode 100644 index 0000000..f4f3e77 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vroundpd-256-3.c @@ -0,0 +1,27 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +void static +avx_test (void) +{ + union256d u, s1; + double source [4] = {2134.3343,1234.635654,453.345635,54646.464356}; + double e[4] = {0.0}; + int i; + + s1.x = _mm256_loadu_pd (source); + u.x = _mm256_ceil_pd (s1.x); + + for (i = 0; i < 4; i++) + { + __m128d tmp = _mm_load_sd (&s1.a[i]); + tmp = _mm_ceil_sd (tmp, tmp); + _mm_store_sd (&e[i], tmp); + } + + if (check_union256d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vroundpd-3.c b/gcc/testsuite/gcc.target/i386/avx-vroundpd-3.c new file mode 100644 index 0000000..6d9326f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vroundpd-3.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse4_1-roundpd-3.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vroundps-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vroundps-256-1.c new file mode 100644 index 0000000..d33248e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vroundps-256-1.c @@ -0,0 +1,19 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +void static +avx_test (void) +{ + union256 u, s1; + float source [8] = {2134.3343,1234.635654,453.345635,54646.464356,895833.346347,56343,234234.34563,2345434.67832}; + float e [8] = {2134.0,1234.0,453.0,54646.0,895833.0,56343,234234.0,2345434.0}; + + s1.x = _mm256_loadu_ps (source); + u.x = _mm256_round_ps (s1.x, 1); + + if (check_union256 (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vrsqrtps-1.c b/gcc/testsuite/gcc.target/i386/avx-vrsqrtps-1.c new file mode 100644 index 0000000..2db1650 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vrsqrtps-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse-rsqrtps-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vrsqrtps-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vrsqrtps-256-1.c new file mode 100644 index 0000000..19a933c --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vrsqrtps-256-1.c @@ -0,0 +1,26 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#include "avx-check.h" + +static void +avx_test () +{ + int i; + union256 u, s1; + float e[8] = {0.0}; + + s1.x = _mm256_set_ps (1.0, 2.0, 13.0, 14.0, 56.89, 73.3, 4.78, 45.64); + u.x = _mm256_rsqrt_ps (s1.x); + + for (i = 0; i < 8; i++) { + __m128 tmp = _mm_load_ss (&s1.a[i]); + tmp = _mm_rsqrt_ss (tmp); + _mm_store_ss (&e[i], tmp); + } + + if (check_union256 (u, e)) + abort (); +} + diff --git a/gcc/testsuite/gcc.target/i386/avx-vshufpd-1.c b/gcc/testsuite/gcc.target/i386/avx-vshufpd-1.c new file mode 100644 index 0000000..a6f00ea --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vshufpd-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-shufpd-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vshufpd-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vshufpd-256-1.c new file mode 100644 index 0000000..828f680 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vshufpd-256-1.c @@ -0,0 +1,28 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +#ifndef MASK +#define MASK 10 +#endif + +void static +avx_test (void) +{ + union256d u, s1, s2; + double e [4]; + + s1.x = _mm256_set_pd (2134.3343,1234.635654,453.345635,54646.464356); + s2.x = _mm256_set_pd (41124.234,2344.2354,8653.65635,856.43576); + u.x = _mm256_shuffle_pd (s1.x, s2.x, MASK); + + e[0] = (MASK & (1 << 0)) ? s1.a[1] : s1.a[0]; + e[1] = (MASK & (1 << 1)) ? s2.a[1] : s2.a[0]; + e[2] = (MASK & (1 << 2)) ? s1.a[3] : s1.a[2]; + e[3] = (MASK & (1 << 3)) ? s2.a[3] : s2.a[2]; + + if (check_union256d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vshufps-1.c b/gcc/testsuite/gcc.target/i386/avx-vshufps-1.c new file mode 100644 index 0000000..97d8570 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vshufps-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-shufps-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vshufps-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vshufps-256-1.c new file mode 100644 index 0000000..f939357 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vshufps-256-1.c @@ -0,0 +1,49 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +#ifndef MASK +#define MASK 203 +#endif + +float select4(const float *src, unsigned int control) +{ + switch(control) { + case 0: + return src[0]; + case 1: + return src[1]; + case 2: + return src[2]; + case 3: + return src[3]; + } + return -1; +} + + +void static +avx_test (void) +{ + union256 u, s1, s2; + float e [8]; + + s1.x = _mm256_set_ps (1.1, 1.2, 1.3, 1.4, 1.5, 1.6, 1.7, 1.8); + s2.x = _mm256_set_ps (2.1, 2.2, 2.3, 2.4, 2.5, 2.6, 2.7, 2.8); + u.x = _mm256_shuffle_ps (s1.x, s2.x, MASK); + + + e[0] = select4(s1.a, (MASK >> 0) & 0x3); + e[1] = select4(s1.a, (MASK >> 2) & 0x3); + e[2] = select4(s2.a, (MASK >> 4) & 0x3); + e[3] = select4(s2.a, (MASK >> 6) & 0x3); + e[4] = select4(s1.a+4, (MASK >> 0) & 0x3); + e[5] = select4(s1.a+4, (MASK >> 2) & 0x3); + e[6] = select4(s2.a+4, (MASK >> 4) & 0x3); + e[7] = select4(s2.a+4, (MASK >> 6) & 0x3); + + if (check_union256 (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vsqrtpd-1.c b/gcc/testsuite/gcc.target/i386/avx-vsqrtpd-1.c new file mode 100644 index 0000000..dc098c9 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vsqrtpd-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-sqrtpd-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vsqrtpd-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vsqrtpd-256-1.c new file mode 100644 index 0000000..d611bbd --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vsqrtpd-256-1.c @@ -0,0 +1,18 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +void static +avx_test (void) +{ + union256d u, s1; + double e [4] = {0x1.d3881b2c32ed7p+7, 0x1.54abaed51711cp+4, 0x1.19195c08a8d23p+5, 0x1.719741d6c0b0bp+5}; + + s1.x = _mm256_set_pd (2134.3343,1234.635654,453.345635,54646.464356); + u.x = _mm256_sqrt_pd (s1.x); + + if (check_union256d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vsqrtps-1.c b/gcc/testsuite/gcc.target/i386/avx-vsqrtps-1.c new file mode 100644 index 0000000..deb8894 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vsqrtps-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse-sqrtps-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vsqrtps-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vsqrtps-256-1.c new file mode 100644 index 0000000..d5cd77f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vsqrtps-256-1.c @@ -0,0 +1,20 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +void static +avx_test (void) +{ + union256 u, s1; + float e[8] = {0x1.7edeccp+10, 0x1.e3fa46p+8, 0x1.dabbcep+7, 0x1.d93e0cp+9,\ + 0x1.d3881cp+7, 0x1.54abbp+4, 0x1.19195cp+5, 0x1.719742p+5}; + + s1.x = _mm256_set_ps (2134.3343,1234.635654,453.345635,54646.464356, \ + 895833.346347,56343,234234.34563,2345434.67832); + u.x = _mm256_sqrt_ps (s1.x); + + if (check_union256 (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vsubpd-1.c b/gcc/testsuite/gcc.target/i386/avx-vsubpd-1.c new file mode 100644 index 0000000..2af33fc --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vsubpd-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-subpd-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vsubpd-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vsubpd-256-1.c new file mode 100644 index 0000000..ce4ddca --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vsubpd-256-1.c @@ -0,0 +1,23 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +void static +avx_test (void) +{ + int i; + union256d u, s1, s2; + double e [4]; + + s1.x = _mm256_set_pd (2134.3343,1234.635654,453.345635,54646.464356); + s2.x = _mm256_set_pd (41124.234,2344.2354,8653.65635,856.43576); + u.x = _mm256_sub_pd (s1.x, s2.x); + + for (i = 0; i < 4; i++) + e[i] = s1.a[i] - s2.a[i]; + + if (check_union256d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vsubps-1.c b/gcc/testsuite/gcc.target/i386/avx-vsubps-1.c new file mode 100644 index 0000000..59aa928 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vsubps-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse-subps-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vsubps-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vsubps-256-1.c new file mode 100644 index 0000000..de4337c --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vsubps-256-1.c @@ -0,0 +1,23 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +void static +avx_test (void) +{ + int i; + union256 u, s1, s2; + float e [8]; + + s1.x = _mm256_set_ps (24.43, 68.346, 43.35, 546.46, 46.79, 82.78, 82.7, 9.4); + s2.x = _mm256_set_ps (1.17, 2.16, 3.15, 4.14, 5.13, 6.12, 7.11, 8.9); + u.x = _mm256_sub_ps (s1.x, s2.x); + + for (i = 0; i < 8; i++) + e[i] = s1.a[i] - s2.a[i]; + + if (check_union256 (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vsubsd-1.c b/gcc/testsuite/gcc.target/i386/avx-vsubsd-1.c new file mode 100644 index 0000000..58cf4cb --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vsubsd-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-subsd-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vsubss-1.c b/gcc/testsuite/gcc.target/i386/avx-vsubss-1.c new file mode 100644 index 0000000..719aa6f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vsubss-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse-subss-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vtestpd-1.c b/gcc/testsuite/gcc.target/i386/avx-vtestpd-1.c new file mode 100644 index 0000000..3bfecf9 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vtestpd-1.c @@ -0,0 +1,37 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +static void +avx_test () +{ + int i; + union128d source1, source2; + + double s1[2] = {30, -5463}; + double s2[2] = {20, 1223}; + int d[1]; + int e[1]; + + source1.x = _mm_loadu_pd(s1); + source2.x = _mm_loadu_pd(s2); + + d[0] = _mm_testz_pd(source1.x, source2.x); + + e[0] = 1; + for (i = 0; i < 2; i++) + { + union ieee754_double u1, u2; + u1.d = s1[i]; + u2.d = s2[i]; + if (u1.bits.sign && u2.bits.sign) { + e[0] = 0; + } + } + + if (checkVi(d, e, 1)) + abort (); +} + diff --git a/gcc/testsuite/gcc.target/i386/avx-vtestpd-2.c b/gcc/testsuite/gcc.target/i386/avx-vtestpd-2.c new file mode 100644 index 0000000..cb79b24 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vtestpd-2.c @@ -0,0 +1,35 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +static void +avx_test () +{ + int i; + union128d source1, source2; + + double s1[2] = {0, -5463}; + double s2[2] = {0, -1223}; + int d[1]; + int e[1]; + + source1.x = _mm_loadu_pd(s1); + source2.x = _mm_loadu_pd(s2); + + d[0] = _mm_testc_pd(source1.x, source2.x); + + e[0] = 1; + for (i = 0; i < 2; i++) { + union ieee754_double u1, u2; + u1.d = s1[i]; + u2.d = s2[i]; + if (!u1.bits.sign && u2.bits.sign) + e[0] = 0; + } + + if (checkVi(d, e, 1)) + abort (); +} + diff --git a/gcc/testsuite/gcc.target/i386/avx-vtestpd-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vtestpd-256-1.c new file mode 100644 index 0000000..d7d4919 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vtestpd-256-1.c @@ -0,0 +1,35 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +static void +avx_test () +{ + int i; + union256d source1, source2; + + double s1[4] = {0, -5463, 86456, 0}; + double s2[4] = {0, -1223, 0, 1}; + int d[1]; + int e[1]; + + source1.x = _mm256_loadu_pd(s1); + source2.x = _mm256_loadu_pd(s2); + d[0] = _mm256_testz_pd(source1.x, source2.x); + + e[0] = 1; + for (i = 0; i < 4; i++) { + union ieee754_double u1, u2; + u1.d = s1[i]; + u2.d = s2[i]; + if (u1.bits.sign && u2.bits.sign) { + e[0] = 0; + } + } + + if (checkVi(d, e, 1)) + abort (); +} + diff --git a/gcc/testsuite/gcc.target/i386/avx-vtestpd-256-2.c b/gcc/testsuite/gcc.target/i386/avx-vtestpd-256-2.c new file mode 100644 index 0000000..5b61c07 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vtestpd-256-2.c @@ -0,0 +1,35 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +static void +avx_test () +{ + int i; + union256d source1, source2; + + double s1[4] = {0, -5463, 86456, 0}; + double s2[4] = {0, -1223, 0, 1}; + int d[1]; + int e[1]; + + source1.x = _mm256_loadu_pd(s1); + source2.x = _mm256_loadu_pd(s2); + d[0] = _mm256_testc_pd(source1.x, source2.x); + + e[0] = 1; + for (i = 0; i < 4; i++) { + union ieee754_double u1, u2; + u1.d = s1[i]; + u2.d = s2[i]; + if (!u1.bits.sign && u2.bits.sign) { + e[0] = 0; + } + } + + if (checkVi(d, e, 1)) + abort (); +} + diff --git a/gcc/testsuite/gcc.target/i386/avx-vtestpd-256-3.c b/gcc/testsuite/gcc.target/i386/avx-vtestpd-256-3.c new file mode 100644 index 0000000..7471078 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vtestpd-256-3.c @@ -0,0 +1,40 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +static void +avx_test () +{ + int i; + union256d source1, source2; + + double s1[4] = {0, -5463, 86456, 0}; + double s2[4] = {0, -1223, 0, 1}; + int d[1]; + int e[1]; + int c=1; + int z=1; + + source1.x = _mm256_loadu_pd(s1); + source2.x = _mm256_loadu_pd(s2); + d[0] = _mm256_testnzc_pd(source1.x, source2.x); + + e[0] = 1; + for (i = 0; i < 4; i++) { + union ieee754_double u1, u2; + u1.d = s1[i]; + u2.d = s2[i]; + if (u1.bits.sign && u2.bits.sign) + z = 0; + + if (!u1.bits.sign && u2.bits.sign) + c = 0; + } + e[0] = (c==0 && z==0) ? 1:0; + + if (checkVi(d, e, 1)) + abort (); +} + diff --git a/gcc/testsuite/gcc.target/i386/avx-vtestpd-3.c b/gcc/testsuite/gcc.target/i386/avx-vtestpd-3.c new file mode 100644 index 0000000..609c825 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vtestpd-3.c @@ -0,0 +1,42 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +static void +avx_test () +{ + int i; + union128d source1, source2; + + double s1[2] = {0, -5463}; + double s2[2] = {0, -1223}; + int d[1]; + int e[1]; + int c = 1; + int z = 1; + + source1.x = _mm_loadu_pd(s1); + source2.x = _mm_loadu_pd(s2); + + d[0] = _mm_testnzc_pd(source1.x, source2.x); + + e[0] = 1; + for (i = 0; i < 2; i++) { + union ieee754_double u1, u2; + u1.d = s1[i]; + u2.d = s2[i]; + if (u1.bits.sign && u2.bits.sign) + z = 0; + if (!u1.bits.sign && u2.bits.sign) + c = 0; + + } + + e[0] = (c==0 && z==0) ? 1:0; + + if (checkVi(d, e, 1)) + abort (); +} + diff --git a/gcc/testsuite/gcc.target/i386/avx-vtestps-1.c b/gcc/testsuite/gcc.target/i386/avx-vtestps-1.c new file mode 100644 index 0000000..bc22dc4 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vtestps-1.c @@ -0,0 +1,33 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +static void +avx_test () +{ + int i; + union128 source1, source2; + float s1[4] = {0, -5463, 86456, 0}; + float s2[4] = {0, -1223, 0, 0}; + int d[1]; + int e[1]; + + source1.x = _mm_loadu_ps(s1); + source2.x = _mm_loadu_ps(s2); + d[0] = _mm_testz_ps(source1.x, source2.x); + + e[0] = 1; + for (i = 0; i < 4; i++) { + union ieee754_float u1, u2; + u1.d = s1[i]; + u2.d = s2[i]; + if (u1.bits.sign && u2.bits.sign) + e[0] = 0; + } + + if (checkVi (d, e, 1)) + abort (); +} + diff --git a/gcc/testsuite/gcc.target/i386/avx-vtestps-2.c b/gcc/testsuite/gcc.target/i386/avx-vtestps-2.c new file mode 100644 index 0000000..2dd45d9 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vtestps-2.c @@ -0,0 +1,33 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +static void +avx_test () +{ + int i; + union128 source1, source2; + float s1[4] = {0, -5463, 86456, 0}; + float s2[4] = {0, -1223, 0, 0}; + int d[1]; + int e[1]; + + source1.x = _mm_loadu_ps(s1); + source2.x = _mm_loadu_ps(s2); + d[0] = _mm_testc_ps(source1.x, source2.x); + + e[0] = 1; + for (i = 0; i < 4; i++) { + union ieee754_float u1, u2; + u1.d = s1[i]; + u2.d = s2[i]; + if (!u1.bits.sign && u2.bits.sign) + e[0] = 0; + } + + if (checkVi (d, e, 1)) + abort (); +} + diff --git a/gcc/testsuite/gcc.target/i386/avx-vtestps-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vtestps-256-1.c new file mode 100644 index 0000000..a1ebd66 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vtestps-256-1.c @@ -0,0 +1,34 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +static void +avx_test () +{ + int i; + union256 source1, source2; + + float s1[8] = {0, -5463, 86456, 0, 1234, 0, 62445, 34352}; + float s2[8] = {0, -1223, 0, 0, 0, 1, 0, 0}; + int d[1]; + int e[1]; + + source1.x = _mm256_loadu_ps(s1); + source2.x = _mm256_loadu_ps(s2); + d[0] = _mm256_testz_ps(source1.x, source2.x); + + e[0] = 1; + for (i = 0; i < 8; i++) { + union ieee754_float u1, u2; + u1.d = s1[i]; + u2.d = s2[i]; + if (u1.bits.sign && u2.bits.sign) + e[0] = 0; + } + + if (checkVi (d, e, 1)) + abort (); +} + diff --git a/gcc/testsuite/gcc.target/i386/avx-vtestps-256-2.c b/gcc/testsuite/gcc.target/i386/avx-vtestps-256-2.c new file mode 100644 index 0000000..b5c6251 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vtestps-256-2.c @@ -0,0 +1,34 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +static void +avx_test () +{ + int i; + union256 source1, source2; + + float s1[8] = {0, -5463, 86456, 0, 1234, 0, 62445, 34352}; + float s2[8] = {0, -1223, 0, 0, 0, 1, 0, 0}; + int d[1]; + int e[1]; + + source1.x = _mm256_loadu_ps(s1); + source2.x = _mm256_loadu_ps(s2); + d[0] = _mm256_testc_ps(source1.x, source2.x); + + e[0] = 1; + for (i = 0; i < 8; i++) { + union ieee754_float u1, u2; + u1.d = s1[i]; + u2.d = s2[i]; + if (!u1.bits.sign && u2.bits.sign) + e[0] = 0; + } + + if (checkVi (d, e, 1)) + abort (); +} + diff --git a/gcc/testsuite/gcc.target/i386/avx-vtestps-256-3.c b/gcc/testsuite/gcc.target/i386/avx-vtestps-256-3.c new file mode 100644 index 0000000..ef10361 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vtestps-256-3.c @@ -0,0 +1,39 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +static void +avx_test () +{ + int i; + union256 source1, source2; + int c = 1; + int z = 1; + + float s1[8] = {0, -5463, 86456, 0, 1234, 0, 62445, 34352}; + float s2[8] = {0, -1223, 0, 0, 0, 1, 0, 0}; + int d[1]; + int e[1]; + + source1.x = _mm256_loadu_ps(s1); + source2.x = _mm256_loadu_ps(s2); + d[0] = _mm256_testnzc_ps(source1.x, source2.x); + + e[0] = 1; + for (i = 0; i < 8; i++) { + union ieee754_float u1, u2; + u1.d = s1[i]; + u2.d = s2[i]; + if (!u1.bits.sign && u2.bits.sign) + c = 0; + if (u1.bits.sign && u2.bits.sign) + z = 0; + } + e[0] = (c==0 && z==0)?1:0; + + if (checkVi (d, e, 1)) + abort (); +} + diff --git a/gcc/testsuite/gcc.target/i386/avx-vtestps-3.c b/gcc/testsuite/gcc.target/i386/avx-vtestps-3.c new file mode 100644 index 0000000..e69b946 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vtestps-3.c @@ -0,0 +1,39 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +static void +avx_test () +{ + int i; + union128 source1, source2; + float s1[4] = {0, -5463, 86456, 0}; + float s2[4] = {0, -1223, 0, 0}; + int d[1]; + int e[1]; + int c=1; + int z=1; + + source1.x = _mm_loadu_ps(s1); + source2.x = _mm_loadu_ps(s2); + d[0] = _mm_testnzc_ps(source1.x, source2.x); + + e[0] = 1; + for (i = 0; i < 4; i++) { + union ieee754_float u1, u2; + u1.d = s1[i]; + u2.d = s2[i]; + if (!u1.bits.sign && u2.bits.sign) + c = 0; + if (u1.bits.sign && u2.bits.sign) + z = 0; + + } + e[0] = (c == 0 && z == 0) ? 1:0; + + if (checkVi (d, e, 1)) + abort (); +} + diff --git a/gcc/testsuite/gcc.target/i386/avx-vucomisd-1.c b/gcc/testsuite/gcc.target/i386/avx-vucomisd-1.c new file mode 100644 index 0000000..d4efd21 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vucomisd-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-ucomisd-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vucomisd-2.c b/gcc/testsuite/gcc.target/i386/avx-vucomisd-2.c new file mode 100644 index 0000000..d55f310 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vucomisd-2.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-ucomisd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vucomisd-3.c b/gcc/testsuite/gcc.target/i386/avx-vucomisd-3.c new file mode 100644 index 0000000..e2ba869 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vucomisd-3.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-ucomisd-3.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vucomisd-4.c b/gcc/testsuite/gcc.target/i386/avx-vucomisd-4.c new file mode 100644 index 0000000..9617599 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vucomisd-4.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-ucomisd-4.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vucomisd-5.c b/gcc/testsuite/gcc.target/i386/avx-vucomisd-5.c new file mode 100644 index 0000000..9034519 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vucomisd-5.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-ucomisd-5.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vucomisd-6.c b/gcc/testsuite/gcc.target/i386/avx-vucomisd-6.c new file mode 100644 index 0000000..cc9d0e9 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vucomisd-6.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-ucomisd-6.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vucomiss-1.c b/gcc/testsuite/gcc.target/i386/avx-vucomiss-1.c new file mode 100644 index 0000000..c0ba7a3 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vucomiss-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse-ucomiss-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vucomiss-2.c b/gcc/testsuite/gcc.target/i386/avx-vucomiss-2.c new file mode 100644 index 0000000..ea4b80e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vucomiss-2.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse-ucomiss-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vucomiss-3.c b/gcc/testsuite/gcc.target/i386/avx-vucomiss-3.c new file mode 100644 index 0000000..bd82bb9 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vucomiss-3.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse-ucomiss-3.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vucomiss-4.c b/gcc/testsuite/gcc.target/i386/avx-vucomiss-4.c new file mode 100644 index 0000000..a58395a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vucomiss-4.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse-ucomiss-4.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vucomiss-5.c b/gcc/testsuite/gcc.target/i386/avx-vucomiss-5.c new file mode 100644 index 0000000..198933c --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vucomiss-5.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse-ucomiss-5.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vucomiss-6.c b/gcc/testsuite/gcc.target/i386/avx-vucomiss-6.c new file mode 100644 index 0000000..db48b7a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vucomiss-6.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse-ucomiss-6.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vunpckhpd-1.c b/gcc/testsuite/gcc.target/i386/avx-vunpckhpd-1.c new file mode 100644 index 0000000..4b7191c --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vunpckhpd-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-unpckhpd-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vunpckhpd-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vunpckhpd-256-1.c new file mode 100644 index 0000000..5da332d --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vunpckhpd-256-1.c @@ -0,0 +1,24 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +void static +avx_test (void) +{ + union256d u, s1, s2; + double e [4]; + + s1.x = _mm256_set_pd (2134.3343,1234.635654,453.345635,54646.464356); + s2.x = _mm256_set_pd (41124.234,2344.2354,8653.65635,856.43576); + u.x = _mm256_unpackhi_pd (s1.x, s2.x); + + e[0] = s1.a[1]; + e[1] = s2.a[1]; + e[2] = s1.a[3]; + e[3] = s2.a[3]; + + if (check_union256d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vunpckhps-1.c b/gcc/testsuite/gcc.target/i386/avx-vunpckhps-1.c new file mode 100644 index 0000000..e5a0f3e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vunpckhps-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse-unpckhps-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vunpckhps-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vunpckhps-256-1.c new file mode 100644 index 0000000..be6fbb6 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vunpckhps-256-1.c @@ -0,0 +1,28 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +void static +avx_test (void) +{ + union256 u, s1, s2; + float e [8]; + + s1.x = _mm256_set_ps (24.43, 68.346, 43.35, 546.46, 46.79, 82.78, 82.7, 9.4); + s2.x = _mm256_set_ps (1.17, 2.16, 3.15, 4.14, 5.13, 6.12, 7.11, 8.9); + u.x = _mm256_unpackhi_ps (s1.x, s2.x); + + e[0] = s1.a[2]; + e[1] = s2.a[2]; + e[2] = s1.a[3]; + e[3] = s2.a[3]; + e[4] = s1.a[6]; + e[5] = s2.a[6]; + e[6] = s1.a[7]; + e[7] = s2.a[7]; + + if (check_union256 (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vunpcklpd-1.c b/gcc/testsuite/gcc.target/i386/avx-vunpcklpd-1.c new file mode 100644 index 0000000..9e0cb05 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vunpcklpd-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-unpcklpd-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vunpcklpd-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vunpcklpd-256-1.c new file mode 100644 index 0000000..0f7e390 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vunpcklpd-256-1.c @@ -0,0 +1,24 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +void static +avx_test (void) +{ + union256d u, s1, s2; + double e [4]; + + s1.x = _mm256_set_pd (2134.3343,1234.635654,453.345635,54646.464356); + s2.x = _mm256_set_pd (41124.234,2344.2354,8653.65635,856.43576); + u.x = _mm256_unpacklo_pd (s1.x, s2.x); + + e[0] = s1.a[0]; + e[1] = s2.a[0]; + e[2] = s1.a[2]; + e[3] = s2.a[2]; + + if (check_union256d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vunpcklps-1.c b/gcc/testsuite/gcc.target/i386/avx-vunpcklps-1.c new file mode 100644 index 0000000..c2380a4 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vunpcklps-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mfpmath=sse -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse-unpcklps-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vunpcklps-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vunpcklps-256-1.c new file mode 100644 index 0000000..bf0e318 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vunpcklps-256-1.c @@ -0,0 +1,28 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +void static +avx_test (void) +{ + union256 u, s1, s2; + float e [8]; + + s1.x = _mm256_set_ps (24.43, 68.346, 43.35, 546.46, 46.79, 82.78, 82.7, 9.4); + s2.x = _mm256_set_ps (1.17, 2.16, 3.15, 4.14, 5.13, 6.12, 7.11, 8.9); + u.x = _mm256_unpacklo_ps (s1.x, s2.x); + + e[0] = s1.a[0]; + e[1] = s2.a[0]; + e[2] = s1.a[1]; + e[3] = s2.a[1]; + e[4] = s1.a[4]; + e[5] = s2.a[4]; + e[6] = s1.a[5]; + e[7] = s2.a[5]; + + if (check_union256 (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vxorpd-1.c b/gcc/testsuite/gcc.target/i386/avx-vxorpd-1.c new file mode 100644 index 0000000..435bf04 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vxorpd-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse2-xorpd-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vxorpd-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vxorpd-256-1.c new file mode 100644 index 0000000..4896ee0 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vxorpd-256-1.c @@ -0,0 +1,31 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +void static +avx_test (void) +{ + union + { + double d[4]; + long long l[4]; + }source1, source2, e; + + int i; + union256d u, s1, s2; + + s1.x = _mm256_set_pd (34545.123, 95567.456, 23443.09876, 5675.543); + s2.x = _mm256_set_pd (674, 57897.332187, 93459, 45624.112); + _mm256_storeu_pd (source1.d, s1.x); + _mm256_storeu_pd (source2.d, s2.x); + + u.x = _mm256_xor_pd (s1.x, s2.x); + + for (i = 0; i < 4; i++) + e.l[i] = source1.l[i] ^ source2.l[i]; + + if (check_union256d (u, e.d)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vxorps-1.c b/gcc/testsuite/gcc.target/i386/avx-vxorps-1.c new file mode 100644 index 0000000..e203a7f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vxorps-1.c @@ -0,0 +1,8 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#define CHECK_H "avx-check.h" +#define TEST avx_test + +#include "sse-xorps-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-vxorps-256-1.c b/gcc/testsuite/gcc.target/i386/avx-vxorps-256-1.c new file mode 100644 index 0000000..0077048 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vxorps-256-1.c @@ -0,0 +1,31 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +void static +avx_test (void) +{ + union { + float f[8]; + int i[8]; + }source1, source2, e; + + int i; + union256 u, s1, s2; + + s1.x = _mm256_set_ps (34545, 95567, 23443, 5675, 2323, 67, 2345, 45667); + s2.x = _mm256_set_ps (674, 57897, 93459, 45624, 54674, 1237, 67436, 79608); + + _mm256_storeu_ps (source1.f, s1.x); + _mm256_storeu_ps (source2.f, s2.x); + + u.x = _mm256_xor_ps (s1.x, s2.x); + + for (i = 0; i < 8; i++) + e.i[i] = source1.i[i] ^ source2.i[i]; + + if (check_union256 (u, e.f)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vzeroall-1.c b/gcc/testsuite/gcc.target/i386/avx-vzeroall-1.c new file mode 100644 index 0000000..996357a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vzeroall-1.c @@ -0,0 +1,52 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +static void +avx_test (void) +{ + __m256i src; +#ifdef __x86_64__ + char reg_save[16][32]; + char d[16][32]; +#else + char reg_save[8][32]; + char d[8][32]; +#endif + + int s[8] = {1, 2, 3, 4, 5, 6, 7, 8}; + + __builtin_memset (d, 0, sizeof d); + __builtin_memset (reg_save, -1, sizeof reg_save); + + src = _mm256_loadu_si256 ((__m256i*) s); + + _mm256_zeroall (); + + __asm__ __volatile__ ("vmovdqu %%ymm0,%0":"=m"(reg_save[0])); + __asm__ __volatile__ ("vmovdqu %%ymm1,%0":"=m"(reg_save[1])); + __asm__ __volatile__ ("vmovdqu %%ymm2,%0":"=m"(reg_save[2])); + __asm__ __volatile__ ("vmovdqu %%ymm3,%0":"=m"(reg_save[3])); + __asm__ __volatile__ ("vmovdqu %%ymm4,%0":"=m"(reg_save[4])); + __asm__ __volatile__ ("vmovdqu %%ymm5,%0":"=m"(reg_save[5])); + __asm__ __volatile__ ("vmovdqu %%ymm6,%0":"=m"(reg_save[6])); + __asm__ __volatile__ ("vmovdqu %%ymm7,%0":"=m"(reg_save[7])); +#ifdef __x86_64__ + __asm__ __volatile__ ("vmovdqu %%ymm8,%0":"=m"(reg_save[8])); + __asm__ __volatile__ ("vmovdqu %%ymm9,%0":"=m"(reg_save[9])); + __asm__ __volatile__ ("vmovdqu %%ymm10,%0":"=m"(reg_save[10])); + __asm__ __volatile__ ("vmovdqu %%ymm11,%0":"=m"(reg_save[11])); + __asm__ __volatile__ ("vmovdqu %%ymm12,%0":"=m"(reg_save[12])); + __asm__ __volatile__ ("vmovdqu %%ymm13,%0":"=m"(reg_save[13])); + __asm__ __volatile__ ("vmovdqu %%ymm14,%0":"=m"(reg_save[14])); + __asm__ __volatile__ ("vmovdqu %%ymm15,%0":"=m"(reg_save[15])); +#endif + + if (__builtin_memcmp (reg_save, d, sizeof d)) + abort (); + + _mm256_storeu_si256 ((__m256i*) d, src); + +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vzeroall-2.c b/gcc/testsuite/gcc.target/i386/avx-vzeroall-2.c new file mode 100644 index 0000000..f49a0da --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vzeroall-2.c @@ -0,0 +1,21 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +static int s[4] = {234566, 8723467, 6576856, 19832468}; +static int d[4] = {1,1,1,1}; + +static void +avx_test (void) +{ + __m128i src; + + src = _mm_loadu_si128 ((__m128i*) s); + _mm256_zeroall (); + _mm_storeu_si128 ((__m128i*) d, src); + + if (__builtin_memcmp (d, s, sizeof (d))) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vzeroupper-1.c b/gcc/testsuite/gcc.target/i386/avx-vzeroupper-1.c new file mode 100644 index 0000000..2137c25 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vzeroupper-1.c @@ -0,0 +1,56 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +#ifdef __x86_64__ +#define LEN 16 +#else +#define LEN 8 +#endif + +static void +avx_test (void) +{ + __m256i src; + + char reg_save[LEN][32]; + int i, j; + + int s[8] = {1, 2, 3, 4, 5, 6, 7, 8}; + int d[8] = {11, 22, 33, 44, 55, 66, 77, 88}; + + __builtin_memset (reg_save, -1, sizeof reg_save); + + src = _mm256_loadu_si256 ((__m256i*) s); + + _mm256_zeroupper (); + + __asm__ __volatile__ ("vmovdqu %%ymm0,%0":"=m"(reg_save[0])); + __asm__ __volatile__ ("vmovdqu %%ymm1,%0":"=m"(reg_save[1])); + __asm__ __volatile__ ("vmovdqu %%ymm2,%0":"=m"(reg_save[2])); + __asm__ __volatile__ ("vmovdqu %%ymm3,%0":"=m"(reg_save[3])); + __asm__ __volatile__ ("vmovdqu %%ymm4,%0":"=m"(reg_save[4])); + __asm__ __volatile__ ("vmovdqu %%ymm5,%0":"=m"(reg_save[5])); + __asm__ __volatile__ ("vmovdqu %%ymm6,%0":"=m"(reg_save[6])); + __asm__ __volatile__ ("vmovdqu %%ymm7,%0":"=m"(reg_save[7])); +#ifdef __x86_64__ + __asm__ __volatile__ ("vmovdqu %%ymm8,%0":"=m"(reg_save[8])); + __asm__ __volatile__ ("vmovdqu %%ymm9,%0":"=m"(reg_save[9])); + __asm__ __volatile__ ("vmovdqu %%ymm10,%0":"=m"(reg_save[10])); + __asm__ __volatile__ ("vmovdqu %%ymm11,%0":"=m"(reg_save[11])); + __asm__ __volatile__ ("vmovdqu %%ymm12,%0":"=m"(reg_save[12])); + __asm__ __volatile__ ("vmovdqu %%ymm13,%0":"=m"(reg_save[13])); + __asm__ __volatile__ ("vmovdqu %%ymm14,%0":"=m"(reg_save[14])); + __asm__ __volatile__ ("vmovdqu %%ymm15,%0":"=m"(reg_save[15])); +#endif + + for (i = 0; i < LEN; i++) + for (j = 16; j < 32; j++) + if (reg_save[i][j]) + abort (); + + _mm256_storeu_si256 ((__m256i*) d, src); + +} diff --git a/gcc/testsuite/gcc.target/i386/avx-vzeroupper-2.c b/gcc/testsuite/gcc.target/i386/avx-vzeroupper-2.c new file mode 100644 index 0000000..9771e6c --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vzeroupper-2.c @@ -0,0 +1,21 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +#include "avx-check.h" + +static int s[4] = {234566, 8723467, 6576856, 19832468}; +static int d[4] = {1,1,1,1}; + +static void +avx_test (void) +{ + __m128i src; + + src = _mm_loadu_si128 ((__m128i*) s); + _mm256_zeroupper (); + _mm_storeu_si128 ((__m128i*) d, src); + + if (__builtin_memcmp (d, s, sizeof (d))) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/i386.exp b/gcc/testsuite/gcc.target/i386/i386.exp index e28ce93..612bec4 100644 --- a/gcc/testsuite/gcc.target/i386/i386.exp +++ b/gcc/testsuite/gcc.target/i386/i386.exp @@ -64,6 +64,19 @@ proc check_effective_target_aes { } { } "-O2 -maes" ] } +# Return 1 if vaes instructions can be compiled. +proc check_effective_target_vaes { } { + return [check_no_compiler_messages vaes object { + typedef long long __m128i __attribute__ ((__vector_size__ (16))); + typedef long long __v2di __attribute__ ((__vector_size__ (16))); + + __m128i _mm_aesimc_si128 (__m128i __X) + { + return (__m128i) __builtin_ia32_aesimc128 ((__v2di)__X); + } + } "-O2 -maes -mavx" ] +} + # Return 1 if pclmul instructions can be compiled. proc check_effective_target_pclmul { } { return [check_no_compiler_messages pclmul object { diff --git a/gcc/testsuite/gcc.target/i386/m128-check.h b/gcc/testsuite/gcc.target/i386/m128-check.h index a20f821..071381f 100644 --- a/gcc/testsuite/gcc.target/i386/m128-check.h +++ b/gcc/testsuite/gcc.target/i386/m128-check.h @@ -1,4 +1,7 @@ #include +#include + +#ifdef __SSE2__ #include typedef union @@ -10,12 +13,24 @@ typedef union typedef union { __m128i x; + unsigned char a[16]; +} union128i_ub; + +typedef union +{ + __m128i x; short a[8]; } union128i_w; typedef union { __m128i x; + unsigned short a[8]; +} union128i_uw; + +typedef union +{ + __m128i x; int a[4]; } union128i_d; @@ -27,15 +42,16 @@ typedef union typedef union { - __m128 x; - float a[4]; -} union128; - -typedef union -{ __m128d x; double a[2]; } union128d; +#endif + +typedef union +{ + __m128 x; + float a[4]; +} union128; #ifndef ARRAY_SIZE #define ARRAY_SIZE(A) (sizeof (A) / sizeof ((A)[0])) @@ -65,9 +81,82 @@ check_##UINON_TYPE (UINON_TYPE u, const VALUE_TYPE *v) \ return err; \ } +#ifdef __SSE2__ CHECK_EXP (union128i_b, char, "%d") +CHECK_EXP (union128i_ub, unsigned char, "%d") CHECK_EXP (union128i_w, short, "%d") +CHECK_EXP (union128i_uw, unsigned short, "%d") CHECK_EXP (union128i_d, int, "0x%x") CHECK_EXP (union128i_q, long long, "0x%llx") -CHECK_EXP (union128, float, "%f") CHECK_EXP (union128d, double, "%f") +#endif + +CHECK_EXP (union128, float, "%f") + +#define ESP_FLOAT 0.000001 +#define ESP_DOUBLE 0.000001 +#define CHECK_ARRAY(ARRAY, TYPE, FMT) \ +static int \ +__attribute__((noinline, unused)) \ +checkV##ARRAY (const TYPE *v, const TYPE *e, int n) \ +{ \ + int i; \ + int err = 0; \ + \ + for (i = 0; i < n; i++) \ + if (v[i] != e[i]) \ + { \ + err++; \ + PRINTF ("%i: " FMT " != " FMT "\n", \ + i, v[i], e[i]); \ + } \ + return err; \ +} + +CHECK_ARRAY(i, int, "0x%x") +CHECK_ARRAY(l, long long, "0x%llx") + +#define CHECK_FP_ARRAY(ARRAY, TYPE, ESP, FMT) \ +static int \ +__attribute__((noinline, unused)) \ +checkV##ARRAY (const TYPE *v, const TYPE *e, int n) \ +{ \ + int i; \ + int err = 0; \ + \ + for (i = 0; i < n; i++) \ + if (v[i] > (e[i] + (ESP)) || v[i] < (e[i] - (ESP))) \ + if (e[i] != v[i]) \ + { \ + err++; \ + PRINTF ("%i: " FMT " != " FMT "\n", \ + i, v[i], e[i]); \ + } \ + return err; \ +} + +CHECK_FP_ARRAY (d, double, ESP_DOUBLE, "%f") +CHECK_FP_ARRAY (f, float, ESP_FLOAT, "%f") + +union ieee754_float +{ + float d; + struct + { + unsigned long frac : 23; + unsigned exp : 8; + unsigned sign : 1; + } bits __attribute__((packed)); +}; + +union ieee754_double +{ + double d; + struct + { + unsigned long frac1 : 32; + unsigned long frac0 : 20; + unsigned exp : 11; + unsigned sign : 1; + } bits __attribute__((packed)); +}; diff --git a/gcc/testsuite/gcc.target/i386/m256-1.c b/gcc/testsuite/gcc.target/i386/m256-1.c new file mode 100644 index 0000000..a40b9e8 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/m256-1.c @@ -0,0 +1,63 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-mavx" } */ + +#include +#include "avx-check.h" + +__m128 n1 = { -283.3, -23.3, 213.4, 1119.03 }; +__m256d n2 = { -93.83, 893.318, 3884.34, -3134.3 }; +__m256i n3 = { 893, -3180, 3334, -3984 }; +int n4 = -30; +double n5 = 40.3; +__m128i n6 = { 8931, -13984 }; +__m128d n7 = { 1893.318, -31134.3 }; +__m256 n8 = +{ + -913.87, 8193.518, 312884.34, -9134.9, + -19093.83, 89312.318, 7884.84, -4134.3 +}; +__m128 n9 = { -1283.3, -213.3, 3213.4, 81119.03 }; +__m128i n10 = { 28131, -313684 }; +int n11 = 103; +double n12 = -3004.3; +__m256d n13 = { 913.73, -93.38, 84.34, -734.3 }; +__m128d n14 = { -73.378, 934.31 }; +__m256 n15 = +{ + 13.73, -8193.318, 384.74, 734.9, + 193.83, 312.78, 7884.34, -8134.3 +}; +__m128i n16 = { 831, -3849 }; + +void +__attribute__((noinline)) +m256_test (__m128 a1, __m256d a2, __m256i a3, int a4, double a5, + __m128i a6, __m128d a7, __m256 a8, __m128 a9, __m128i a10, + int a11, double a12, __m256d a13, __m128d a14, __m256 a15, + __m128i a16) +{ + assert (__builtin_memcmp (&a1, &n1, sizeof (a1)) == 0); + assert (__builtin_memcmp (&a2, &n2, sizeof (a2)) == 0); + assert (__builtin_memcmp (&a3, &n3, sizeof (a3)) == 0); + assert (a4 == n4); + assert (a5 == n5); + assert (__builtin_memcmp (&a6, &n6, sizeof (a6)) == 0); + assert (__builtin_memcmp (&a7, &n7, sizeof (a7)) == 0); + assert (__builtin_memcmp (&a8, &n8, sizeof (a8)) == 0); + assert (__builtin_memcmp (&a9, &n9, sizeof (a9)) == 0); + assert (__builtin_memcmp (&a10, &n10, sizeof (a10)) == 0); + assert (a11 == n11); + assert (a12 == n12); + assert (__builtin_memcmp (&a13, &n13, sizeof (a13)) == 0); + assert (__builtin_memcmp (&a14, &n14, sizeof (a14)) == 0); + assert (__builtin_memcmp (&a15, &n15, sizeof (a15)) == 0); + assert (__builtin_memcmp (&a16, &n16, sizeof (a16)) == 0); +} + +static void +avx_test (void) +{ + m256_test (n1, n2, n3, n4, n5, n6, n7, n8, n9, n10, n11, n12, + n13, n14, n15, n16); +} diff --git a/gcc/testsuite/gcc.target/i386/m256-2.c b/gcc/testsuite/gcc.target/i386/m256-2.c new file mode 100644 index 0000000..64e3852 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/m256-2.c @@ -0,0 +1,73 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-mavx" } */ + +#include +#include "avx-check.h" + +struct m128 +{ + __m128 v; +}; + +struct m256d +{ + __m256d v; +}; + +struct m128 n1 = { { -283.3, -23.3, 213.4, 1119.03 } }; +struct m256d n2 = { { -93.83, 893.318, 3884.34, -3134.3 } }; +__m256i n3 = { 893, -3180, 3334, -3984 }; +int n4 = -30; +double n5 = 40.3; +__m128i n6 = { 8931, -13984 }; +__m128d n7 = { 1893.318, -31134.3 }; +__m256 n8 = +{ + -913.87, 8193.518, 312884.34, -9134.9, + -19093.83, 89312.318, 7884.84, -4134.3 +}; +__m128 n9 = { -1283.3, -213.3, 3213.4, 81119.03 }; +__m128i n10 = { 28131, -313684 }; +int n11 = 103; +double n12 = -3004.3; +struct m256d n13 = { { 913.73, -93.38, 84.34, -734.3 } }; +__m128d n14 = { -73.378, 934.31 }; +__m256 n15 = +{ + 13.73, -8193.318, 384.74, 734.9, + 193.83, 312.78, 7884.34, -8134.3 +}; +__m128i n16 = { 831, -3849 }; + +void +__attribute__((noinline)) +m256_test (struct m128 a1, struct m256d a2, __m256i a3, int a4, double a5, + __m128i a6, __m128d a7, __m256 a8, __m128 a9, __m128i a10, + int a11, double a12, struct m256d a13, __m128d a14, __m256 a15, + __m128i a16) +{ + assert (__builtin_memcmp (&a1, &n1, sizeof (a1)) == 0); + assert (__builtin_memcmp (&a2, &n2, sizeof (a2)) == 0); + assert (__builtin_memcmp (&a3, &n3, sizeof (a3)) == 0); + assert (a4 == n4); + assert (a5 == n5); + assert (__builtin_memcmp (&a6, &n6, sizeof (a6)) == 0); + assert (__builtin_memcmp (&a7, &n7, sizeof (a7)) == 0); + assert (__builtin_memcmp (&a8, &n8, sizeof (a8)) == 0); + assert (__builtin_memcmp (&a9, &n9, sizeof (a9)) == 0); + assert (__builtin_memcmp (&a10, &n10, sizeof (a10)) == 0); + assert (a11 == n11); + assert (a12 == n12); + assert (__builtin_memcmp (&a13, &n13, sizeof (a13)) == 0); + assert (__builtin_memcmp (&a14, &n14, sizeof (a14)) == 0); + assert (__builtin_memcmp (&a15, &n15, sizeof (a15)) == 0); + assert (__builtin_memcmp (&a16, &n16, sizeof (a16)) == 0); +} + +static void +avx_test (void) +{ + m256_test (n1, n2, n3, n4, n5, n6, n7, n8, n9, n10, n11, n12, + n13, n14, n15, n16); +} diff --git a/gcc/testsuite/gcc.target/i386/m256-check.h b/gcc/testsuite/gcc.target/i386/m256-check.h new file mode 100644 index 0000000..324af75 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/m256-check.h @@ -0,0 +1,73 @@ +#include +#include "m128-check.h" + +#ifndef max +#define max(a, b) (((a) > (b)) ? (a):(b)) +#endif +#ifndef min +#define min(a, b) (((a) < (b)) ? (a):(b)) +#endif + +typedef union +{ + __m256i x; + char a[32]; +} union256i_b; + +typedef union +{ + __m256i x; + short a[16]; +} union256i_w; + +typedef union +{ + __m256i x; + int a[8]; +} union256i_d; + +typedef union +{ + __m256i x; + long long a[4]; +} union256i_q; + +typedef union +{ + __m256 x; + float a[8]; +} union256; + +typedef union +{ + __m256d x; + double a[4]; +} union256d; + +CHECK_EXP (union256i_b, char, "%d") +CHECK_EXP (union256i_w, short, "%d") +CHECK_EXP (union256i_d, int, "0x%x") +CHECK_EXP (union256i_q, long long, "0x%llx") +CHECK_EXP (union256, float, "%f") +CHECK_EXP (union256d, double, "%f") + +#define CHECK_FP_EXP(UINON_TYPE, VALUE_TYPE, ESP, FMT) \ +static int \ +__attribute__((noinline, unused)) \ +check_fp_##UINON_TYPE (UINON_TYPE u, const VALUE_TYPE *v) \ +{ \ + int i; \ + int err = 0; \ + \ + for (i = 0; i < ARRAY_SIZE (u.a); i++) \ + if (u.a[i] > (v[i] + (ESP)) || u.a[i] < (v[i] - (ESP))) \ + { \ + err++; \ + PRINTF ("%i: " FMT " != " FMT "\n", \ + i, v[i], u.a[i]); \ + } \ + return err; \ +} + +CHECK_FP_EXP (union256, float, ESP_FLOAT, "%f") +CHECK_FP_EXP (union256d, double, ESP_DOUBLE, "%f") diff --git a/gcc/testsuite/gcc.target/i386/sse-addps-1.c b/gcc/testsuite/gcc.target/i386/sse-addps-1.c new file mode 100644 index 0000000..2aa1cfa --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse-addps-1.c @@ -0,0 +1,39 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse" } */ + +#ifndef CHECK_H +#define CHECK_H "sse-check.h" +#endif + +#ifndef TEST +#define TEST sse_test +#endif + +#include CHECK_H + +#include + +static __m128 +__attribute__((noinline, unused)) +test (__m128 s1, __m128 s2) +{ + return _mm_add_ps (s1, s2); +} + +static void +TEST (void) +{ + union128 u, s1, s2; + float e[4]; + int i; + + s1.x = _mm_set_ps (24.43, 68.346, 43.35, 546.46); + s2.x = _mm_set_ps (1.17, 2.16, 3.15, 4.14); + u.x = test (s1.x, s2.x); + + for (i = 0; i < 4; i++) + e[i] = s1.a[i] + s2.a[i]; + + if (check_union128 (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse-addss-1.c b/gcc/testsuite/gcc.target/i386/sse-addss-1.c new file mode 100644 index 0000000..911a6cd --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse-addss-1.c @@ -0,0 +1,40 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse" } */ + +#ifndef CHECK_H +#define CHECK_H "sse-check.h" +#endif + +#ifndef TEST +#define TEST sse_test +#endif + +#include CHECK_H + +#include + +static __m128 +__attribute__((noinline, unused)) +test (__m128 s1, __m128 s2) +{ + return _mm_add_ss (s1, s2); +} + +static void +TEST (void) +{ + union128 u, s1, s2; + float e[4]; + + s1.x = _mm_set_ps (24.43, 68.346, 43.35, 546.46); + s2.x = _mm_set_ps (1.17, 2.16, 3.15, 4.14); + u.x = test (s1.x, s2.x); + + e[0] = s1.a[0] + s2.a[0]; + e[1] = s1.a[1]; + e[2] = s1.a[2]; + e[3] = s1.a[3]; + + if (check_union128 (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse-andnps-1.c b/gcc/testsuite/gcc.target/i386/sse-andnps-1.c new file mode 100644 index 0000000..06d1e07 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse-andnps-1.c @@ -0,0 +1,42 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse" } */ + +#ifndef CHECK_H +#define CHECK_H "sse-check.h" +#endif + +#ifndef TEST +#define TEST sse_test +#endif + +#include CHECK_H + +#include + +static __m128 +__attribute__((noinline, unused)) +test (__m128 s1, __m128 s2) +{ + return _mm_andnot_ps (s1, s2); +} + +static void +TEST (void) +{ + union128 u, s1, s2; + int source1[4]={34, 545, 955, 67}; + int source2[4]={67, 4, 57, 897}; + int e[4]; + + s1.x = _mm_loadu_ps ((float *)source1); + s2.x = _mm_loadu_ps ((float *)source2); + u.x = test (s1.x, s2.x); + + e[0] = (~source1[0]) & source2[0]; + e[1] = (~source1[1]) & source2[1]; + e[2] = (~source1[2]) & source2[2]; + e[3] = (~source1[3]) & source2[3]; + + if (check_union128 (u, (float *)e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse-andps-1.c b/gcc/testsuite/gcc.target/i386/sse-andps-1.c new file mode 100644 index 0000000..aa46b8a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse-andps-1.c @@ -0,0 +1,48 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse" } */ + +#ifndef CHECK_H +#define CHECK_H "sse-check.h" +#endif + +#ifndef TEST +#define TEST sse_test +#endif + +#include CHECK_H + +#include + +static __m128 +__attribute__((noinline, unused)) +test (__m128 s1, __m128 s2) +{ + return _mm_and_ps (s1, s2); +} + +static void +TEST (void) +{ + union128 u, s1, s2; + union + { + float f[4]; + int i[4]; + }source1, source2, e; + + s1.x = _mm_set_ps (34, 545, 955, 67); + s2.x = _mm_set_ps (67, 4, 57, 897); + + _mm_storeu_ps (source1.f, s1.x); + _mm_storeu_ps (source2.f, s2.x); + + u.x = test (s1.x, s2.x); + + e.i[0] = source1.i[0] & source2.i[0]; + e.i[1] = source1.i[1] & source2.i[1]; + e.i[2] = source1.i[2] & source2.i[2]; + e.i[3] = source1.i[3] & source2.i[3]; + + if (check_union128 (u, e.f)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse-check.h b/gcc/testsuite/gcc.target/i386/sse-check.h index d485b8d..79ea481 100644 --- a/gcc/testsuite/gcc.target/i386/sse-check.h +++ b/gcc/testsuite/gcc.target/i386/sse-check.h @@ -1,5 +1,6 @@ #include #include +#include "m128-check.h" #include "cpuid.h" diff --git a/gcc/testsuite/gcc.target/i386/sse-comiss-1.c b/gcc/testsuite/gcc.target/i386/sse-comiss-1.c new file mode 100644 index 0000000..2892a70 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse-comiss-1.c @@ -0,0 +1,37 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse" } */ + +#ifndef CHECK_H +#define CHECK_H "sse-check.h" +#endif + +#ifndef TEST +#define TEST sse_test +#endif + +#include CHECK_H + +#include + +static int +__attribute__((noinline, unused)) +test (__m128 s1, __m128 s2) +{ + return _mm_comieq_ss (s1, s2); +} + +static void +TEST (void) +{ + union128 s1, s2; + int d[1]; + int e[1]; + + s1.x = _mm_set_ps (24.43, 68.346, 43.35, 546.46); + s2.x = _mm_set_ps (1.17, 2.16, 3.15, 4.14); + d[0] = test (s1.x, s2.x); + e[0] = s1.a[0] == s2.a[0]; + + if (checkVi (d, e, 1)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse-comiss-2.c b/gcc/testsuite/gcc.target/i386/sse-comiss-2.c new file mode 100644 index 0000000..63b6d6d --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse-comiss-2.c @@ -0,0 +1,37 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse" } */ + +#ifndef CHECK_H +#define CHECK_H "sse-check.h" +#endif + +#ifndef TEST +#define TEST sse_test +#endif + +#include CHECK_H + +#include + +static int +__attribute__((noinline, unused)) +test (__m128 s1, __m128 s2) +{ + return _mm_comilt_ss (s1, s2); +} + +static void +TEST (void) +{ + union128 s1, s2; + int d[1]; + int e[1]; + + s1.x = _mm_set_ps (24.43, 68.346, 43.35, 546.46); + s2.x = _mm_set_ps (1.17, 2.16, 3.15, 4.14); + d[0] = test (s1.x, s2.x); + e[0] = s1.a[0] < s2.a[0]; + + if (checkVi (d, e, 1)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse-comiss-3.c b/gcc/testsuite/gcc.target/i386/sse-comiss-3.c new file mode 100644 index 0000000..75ac4e4 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse-comiss-3.c @@ -0,0 +1,37 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse" } */ + +#ifndef CHECK_H +#define CHECK_H "sse-check.h" +#endif + +#ifndef TEST +#define TEST sse_test +#endif + +#include CHECK_H + +#include + +static int +__attribute__((noinline, unused)) +test (__m128 s1, __m128 s2) +{ + return _mm_comile_ss (s1, s2); +} + +static void +TEST (void) +{ + union128 s1, s2; + int d[1]; + int e[1]; + + s1.x = _mm_set_ps (24.43, 68.346, 43.35, 546.46); + s2.x = _mm_set_ps (1.17, 2.16, 3.15, 4.14); + d[0] = test (s1.x, s2.x); + e[0] = s1.a[0] <= s2.a[0]; + + if (checkVi (d, e, 1)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse-comiss-4.c b/gcc/testsuite/gcc.target/i386/sse-comiss-4.c new file mode 100644 index 0000000..ceeeca7 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse-comiss-4.c @@ -0,0 +1,37 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse" } */ + +#ifndef CHECK_H +#define CHECK_H "sse-check.h" +#endif + +#ifndef TEST +#define TEST sse_test +#endif + +#include CHECK_H + +#include + +static int +__attribute__((noinline, unused)) +test (__m128 s1, __m128 s2) +{ + return _mm_comigt_ss (s1, s2); +} + +static void +TEST (void) +{ + union128 s1, s2; + int d[1]; + int e[1]; + + s1.x = _mm_set_ps (24.43, 68.346, 43.35, 546.46); + s2.x = _mm_set_ps (1.17, 2.16, 3.15, 4.14); + d[0] = test (s1.x, s2.x); + e[0] = s1.a[0] > s2.a[0]; + + if (checkVi (d, e, 1)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse-comiss-5.c b/gcc/testsuite/gcc.target/i386/sse-comiss-5.c new file mode 100644 index 0000000..8f50351 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse-comiss-5.c @@ -0,0 +1,37 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse" } */ + +#ifndef CHECK_H +#define CHECK_H "sse-check.h" +#endif + +#ifndef TEST +#define TEST sse_test +#endif + +#include CHECK_H + +#include + +static int +__attribute__((noinline, unused)) +test (__m128 s1, __m128 s2) +{ + return _mm_comige_ss (s1, s2); +} + +static void +TEST (void) +{ + union128 s1, s2; + int d[1]; + int e[1]; + + s1.x = _mm_set_ps (24.43, 68.346, 43.35, 546.46); + s2.x = _mm_set_ps (1.17, 2.16, 3.15, 4.14); + d[0] = test (s1.x, s2.x); + e[0] = s1.a[0] >= s2.a[0]; + + if (checkVi (d, e, 1)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse-comiss-6.c b/gcc/testsuite/gcc.target/i386/sse-comiss-6.c new file mode 100644 index 0000000..38df9b8 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse-comiss-6.c @@ -0,0 +1,37 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse" } */ + +#ifndef CHECK_H +#define CHECK_H "sse-check.h" +#endif + +#ifndef TEST +#define TEST sse_test +#endif + +#include CHECK_H + +#include + +static int +__attribute__((noinline, unused)) +test (__m128 s1, __m128 s2) +{ + return _mm_comineq_ss (s1, s2); +} + +static void +TEST (void) +{ + union128 s1, s2; + int d[1]; + int e[1]; + + s1.x = _mm_set_ps (24.43, 68.346, 43.35, 546.46); + s2.x = _mm_set_ps (1.17, 2.16, 3.15, 4.14); + d[0] = test (s1.x, s2.x); + e[0] = s1.a[0] != s2.a[0]; + + if (checkVi (d, e, 1)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse-cvtsi2ss-1.c b/gcc/testsuite/gcc.target/i386/sse-cvtsi2ss-1.c new file mode 100644 index 0000000..e5435b6 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse-cvtsi2ss-1.c @@ -0,0 +1,36 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse" } */ + +#ifndef CHECK_H +#define CHECK_H "sse-check.h" +#endif + +#ifndef TEST +#define TEST sse_test +#endif + +#include CHECK_H + +#include + +static __m128 +__attribute__((noinline, unused)) +test (__m128 p, int b) +{ + return _mm_cvtsi32_ss (p, b); +} + +static void +TEST (void) +{ + union128 u, s1; + int b = 498; + float e[4] = { 24.43, 68.346, 43.35, 546.46 }; + + s1.x = _mm_set_ps (e[3], e[2], e[1], e[0]); + u.x = test (s1.x, b); + e[0] = (float)b; + + if (check_union128 (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse-cvtsi2ss-2.c b/gcc/testsuite/gcc.target/i386/sse-cvtsi2ss-2.c new file mode 100644 index 0000000..aa74e11 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse-cvtsi2ss-2.c @@ -0,0 +1,37 @@ +/* { dg-do run } */ +/* { dg-require-effective-target lp64 } */ +/* { dg-options "-O2 -msse" } */ + +#ifndef CHECK_H +#define CHECK_H "sse-check.h" +#endif + +#ifndef TEST +#define TEST sse_test +#endif + +#include CHECK_H + +#include + +static __m128 +__attribute__((noinline, unused)) +test (__m128 p, long long b) +{ + return _mm_cvtsi64_ss (p, b); +} + +static void +TEST (void) +{ + union128 u, s1; + long long b = 4294967295133LL; + float e[4] = { 24.43, 68.346, 43.35, 546.46 }; + + s1.x = _mm_set_ps (e[3], e[2], e[1], e[0]); + u.x = test (s1.x, b); + e[0] = (float)b; + + if (check_union128 (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse-cvtss2si-1.c b/gcc/testsuite/gcc.target/i386/sse-cvtss2si-1.c new file mode 100644 index 0000000..5740626 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse-cvtss2si-1.c @@ -0,0 +1,36 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse" } */ + +#ifndef CHECK_H +#define CHECK_H "sse-check.h" +#endif + +#ifndef TEST +#define TEST sse_test +#endif + +#include CHECK_H + +#include + +static int +__attribute__((noinline, unused)) +test (__m128 p) +{ + return _mm_cvtss_si32 (p); +} + +static void +TEST (void) +{ + union128 s1; + int d; + int e; + + s1.x = _mm_set_ps (24.43, 68.346, 43.35, 546.46); + d = test (s1.x); + e = (int)s1.a[0]; + + if (e != d) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse-cvtss2si-2.c b/gcc/testsuite/gcc.target/i386/sse-cvtss2si-2.c new file mode 100644 index 0000000..e136b71 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse-cvtss2si-2.c @@ -0,0 +1,37 @@ +/* { dg-do run } */ +/* { dg-require-effective-target lp64 } */ +/* { dg-options "-O2 -msse" } */ + +#ifndef CHECK_H +#define CHECK_H "sse-check.h" +#endif + +#ifndef TEST +#define TEST sse_test +#endif + +#include CHECK_H + +#include + +static long long +__attribute__((noinline, unused)) +test (__m128 p) +{ + return _mm_cvtss_si64 (p); +} + +static void +TEST (void) +{ + union128 s1; + long long d; + long long e; + + s1.x = _mm_set_ps (344.4, 68.346, 43.35, 429496729501.4); + d = test (s1.x); + e = (long long)s1.a[0]; + + if (e != d) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse-cvttss2si-1.c b/gcc/testsuite/gcc.target/i386/sse-cvttss2si-1.c new file mode 100644 index 0000000..8edc197 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse-cvttss2si-1.c @@ -0,0 +1,36 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse" } */ + +#ifndef CHECK_H +#define CHECK_H "sse-check.h" +#endif + +#ifndef TEST +#define TEST sse_test +#endif + +#include CHECK_H + +#include + +static int +__attribute__((noinline, unused)) +test (__m128 p) +{ + return _mm_cvttss_si32 (p); +} + +static void +TEST (void) +{ + union128 s1; + int d; + int e; + + s1.x = _mm_set_ps (24.43, 68.346, 43.35, 546.46); + d = test (s1.x); + e = (int)s1.a[0]; + + if (e != d) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse-cvttss2si-2.c b/gcc/testsuite/gcc.target/i386/sse-cvttss2si-2.c new file mode 100644 index 0000000..94e831e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse-cvttss2si-2.c @@ -0,0 +1,37 @@ +/* { dg-do run } */ +/* { dg-require-effective-target lp64 } */ +/* { dg-options "-O2 -msse" } */ + +#ifndef CHECK_H +#define CHECK_H "sse-check.h" +#endif + +#ifndef TEST +#define TEST sse_test +#endif + +#include CHECK_H + +#include + +static long long +__attribute__((noinline, unused)) +test (__m128 p) +{ + return _mm_cvttss_si64 (p); +} + +static void +TEST (void) +{ + union128 s1; + long long d; + long long e; + + s1.x = _mm_set_ps (24.43, 68.346, 43.35, 429496729501.4); + d = test (s1.x); + e = (long long)s1.a[0]; + + if (e != d) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse-divps-1.c b/gcc/testsuite/gcc.target/i386/sse-divps-1.c new file mode 100644 index 0000000..d4d441a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse-divps-1.c @@ -0,0 +1,40 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse" } */ + +#ifndef CHECK_H +#define CHECK_H "sse-check.h" +#endif + +#ifndef TEST +#define TEST sse_test +#endif + +#include CHECK_H + +#include + +static __m128 +__attribute__((noinline, unused)) +test (__m128 s1, __m128 s2) +{ + return _mm_div_ps (s1, s2); +} + +static void +TEST (void) +{ + union128 u, s1, s2; + float e[4]; + + s1.x = _mm_set_ps (41124.234,6678.346,8653.65635,856.43576); + s2.x = _mm_set_ps (2134.3343,6678.346,453.345635,54646.464356); + u.x = test (s1.x, s2.x); + + e[0] = s1.a[0] / s2.a[0]; + e[1] = s1.a[1] / s2.a[1]; + e[2] = s1.a[2] / s2.a[2]; + e[3] = s1.a[3] / s2.a[3]; + + if (check_union128 (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse-divss-1.c b/gcc/testsuite/gcc.target/i386/sse-divss-1.c new file mode 100644 index 0000000..e744949 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse-divss-1.c @@ -0,0 +1,40 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse" } */ + +#ifndef CHECK_H +#define CHECK_H "sse-check.h" +#endif + +#ifndef TEST +#define TEST sse_test +#endif + +#include CHECK_H + +#include + +static __m128 +__attribute__((noinline, unused)) +test (__m128 s1, __m128 s2) +{ + return _mm_div_ss (s1, s2); +} + +static void +TEST (void) +{ + union128 u, s1, s2; + float e[4]; + + s1.x = _mm_set_ps (41124.234,6678.346,8653.65635,856.43576); + s2.x = _mm_set_ps (2134.3343,6678.346,453.345635,54646.464356); + u.x = test (s1.x, s2.x); + + e[0] = s1.a[0] / s2.a[0]; + e[1] = s1.a[1]; + e[2] = s1.a[2]; + e[3] = s1.a[3]; + + if (check_union128 (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse-maxps-1.c b/gcc/testsuite/gcc.target/i386/sse-maxps-1.c new file mode 100644 index 0000000..5e6fcd6 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse-maxps-1.c @@ -0,0 +1,39 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse" } */ + +#ifndef CHECK_H +#define CHECK_H "sse-check.h" +#endif + +#ifndef TEST +#define TEST sse_test +#endif + +#include CHECK_H + +#include + +static __m128 +__attribute__((noinline, unused)) +test (__m128 s1, __m128 s2) +{ + return _mm_max_ps (s1, s2); +} + +static void +TEST (void) +{ + union128 u, s1, s2; + float e[4]; + int i; + + s1.x = _mm_set_ps (24.43, 68.346, 43.35, 546.46); + s2.x = _mm_set_ps (1.17, 2.16, 3.15, 4.14); + u.x = test (s1.x, s2.x); + + for (i = 0; i < 4; i++) + e[i] = s1.a[i] > s2.a[i] ? s1.a[i]:s2.a[i]; + + if (check_union128 (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse-maxss-1.c b/gcc/testsuite/gcc.target/i386/sse-maxss-1.c new file mode 100644 index 0000000..5b5215a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse-maxss-1.c @@ -0,0 +1,40 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse" } */ + +#ifndef CHECK_H +#define CHECK_H "sse-check.h" +#endif + +#ifndef TEST +#define TEST sse_test +#endif + +#include CHECK_H + +#include + +static __m128 +__attribute__((noinline, unused)) +test (__m128 s1, __m128 s2) +{ + return _mm_max_ss (s1, s2); +} + +static void +TEST (void) +{ + union128 u, s1, s2; + float e[4]; + + s1.x = _mm_set_ps (24.43, 68.346, 43.35, 546.46); + s2.x = _mm_set_ps (1.17, 2.16, 3.15, 4.14); + u.x = test (s1.x, s2.x); + + e[0] = s1.a[0] > s2.a[0] ? s1.a[0]:s2.a[0]; + e[1] = s1.a[1]; + e[2] = s1.a[2]; + e[3] = s1.a[3]; + + if (check_union128 (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse-minps-1.c b/gcc/testsuite/gcc.target/i386/sse-minps-1.c new file mode 100644 index 0000000..a41139f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse-minps-1.c @@ -0,0 +1,39 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse" } */ + +#ifndef CHECK_H +#define CHECK_H "sse-check.h" +#endif + +#ifndef TEST +#define TEST sse_test +#endif + +#include CHECK_H + +#include + +static __m128 +__attribute__((noinline, unused)) +test (__m128 s1, __m128 s2) +{ + return _mm_min_ps (s1, s2); +} + +static void +TEST (void) +{ + union128 u, s1, s2; + float e[4]; + int i; + + s1.x = _mm_set_ps (24.43, 68.346, 43.35, 546.46); + s2.x = _mm_set_ps (1.17, 2.16, 3.15, 4.14); + u.x = test (s1.x, s2.x); + + for (i = 0; i < 4; i++) + e[i] = s1.a[i] < s2.a[i] ? s1.a[i]:s2.a[i]; + + if (check_union128 (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse-minss-1.c b/gcc/testsuite/gcc.target/i386/sse-minss-1.c new file mode 100644 index 0000000..9280b07 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse-minss-1.c @@ -0,0 +1,40 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse" } */ + +#ifndef CHECK_H +#define CHECK_H "sse-check.h" +#endif + +#ifndef TEST +#define TEST sse_test +#endif + +#include CHECK_H + +#include + +static __m128 +__attribute__((noinline, unused)) +test (__m128 s1, __m128 s2) +{ + return _mm_min_ss (s1, s2); +} + +static void +TEST (void) +{ + union128 u, s1, s2; + float e[4]; + + s1.x = _mm_set_ps (24.43, 68.346, 43.35, 546.46); + s2.x = _mm_set_ps (1.17, 2.16, 3.15, 4.14); + u.x = test (s1.x, s2.x); + + e[0] = s1.a[0] < s2.a[0] ? s1.a[0]:s2.a[0]; + e[1] = s1.a[1]; + e[2] = s1.a[2]; + e[3] = s1.a[3]; + + if (check_union128 (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse-movaps-1.c b/gcc/testsuite/gcc.target/i386/sse-movaps-1.c new file mode 100644 index 0000000..3677ac4 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse-movaps-1.c @@ -0,0 +1,33 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse" } */ + +#ifndef CHECK_H +#define CHECK_H "sse-check.h" +#endif + +#ifndef TEST +#define TEST sse_test +#endif + +#include CHECK_H + +#include + +static __m128 +__attribute__((noinline, unused)) +test (float *e) +{ + return _mm_load_ps (e); +} + +static void +TEST (void) +{ + union128 u; + float e[4] __attribute__ ((aligned (16))) = {2134.3343,1234.635654, 1.2234, 876.8976}; + + u.x = test (e); + + if (check_union128 (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse-movaps-2.c b/gcc/testsuite/gcc.target/i386/sse-movaps-2.c new file mode 100644 index 0000000..46b971a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse-movaps-2.c @@ -0,0 +1,35 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse" } */ + +#ifndef CHECK_H +#define CHECK_H "sse-check.h" +#endif + +#ifndef TEST +#define TEST sse_test +#endif + +#include CHECK_H + +#include + +static void +__attribute__((noinline, unused)) +test (float *e, __m128 a) +{ + _mm_store_ps (e, a); +} + +static void +TEST (void) +{ + union128 u; + float e[4] __attribute__ ((aligned (16))) = {0.0}; + + u.x = _mm_set_ps (2134.3343,1234.635654, 1.414, 3.3421); + + test (e, u.x); + + if (check_union128 (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse-movhlps-1.c b/gcc/testsuite/gcc.target/i386/sse-movhlps-1.c new file mode 100644 index 0000000..7023bf9 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse-movhlps-1.c @@ -0,0 +1,40 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse" } */ + +#ifndef CHECK_H +#define CHECK_H "sse-check.h" +#endif + +#ifndef TEST +#define TEST sse_test +#endif + +#include CHECK_H + +#include + +static __m128 +__attribute__((noinline, unused)) +test (__m128 s1, __m128 s2) +{ + return _mm_movehl_ps (s1, s2); +} + +static void +TEST (void) +{ + union128 u, s1, s2; + float e[4]; + + s1.x = _mm_set_ps (24.43, 68.346, 43.35, 546.46); + s2.x = _mm_set_ps (1.17, 2.16, 3.15, 4.14); + u.x = test (s1.x, s2.x); + + e[0] = s2.a[2]; + e[1] = s2.a[3]; + e[2] = s1.a[2]; + e[3] = s1.a[3]; + + if (check_union128 (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse-movhps-1.c b/gcc/testsuite/gcc.target/i386/sse-movhps-1.c new file mode 100644 index 0000000..9f28927 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse-movhps-1.c @@ -0,0 +1,42 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse" } */ + +#ifndef CHECK_H +#define CHECK_H "sse-check.h" +#endif + +#ifndef TEST +#define TEST sse_test +#endif + +#include CHECK_H + +#include + +static __m128 +__attribute__((noinline, unused)) +test (__m128 a, __m64 *p) +{ + return _mm_loadh_pi (a, p); +} + +static void +TEST (void) +{ + union128 u, s1; + float d[2] = {24.43, 68.346}; + float e[4] = {1.17, 2.16, 3.15, 4.14}; + + s1.x = _mm_set_ps (5.13, 6.12, 7.11, 8.9); + u.x = _mm_loadu_ps (e); + + u.x = test (s1.x, (__m64 *)d); + + e[0] = s1.a[0]; + e[1] = s1.a[1]; + e[2] = d[0]; + e[3] = d[1]; + + if (check_union128 (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse-movhps-2.c b/gcc/testsuite/gcc.target/i386/sse-movhps-2.c new file mode 100644 index 0000000..023937b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse-movhps-2.c @@ -0,0 +1,39 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse" } */ + +#ifndef CHECK_H +#define CHECK_H "sse-check.h" +#endif + +#ifndef TEST +#define TEST sse_test +#endif + +#include CHECK_H + +#include + +static void +__attribute__((noinline, unused)) +test (__m64 *p, __m128 a) +{ + return _mm_storeh_pi (p, a); +} + +static void +TEST (void) +{ + union128 s1; + float e[2]; + float d[2]; + + s1.x = _mm_set_ps (5.13, 6.12, 7.11, 8.9); + + test ((__m64 *)d, s1.x); + + e[0] = s1.a[2]; + e[1] = s1.a[3]; + + if (checkVf (d, e, 2)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse-movlhps-1.c b/gcc/testsuite/gcc.target/i386/sse-movlhps-1.c new file mode 100644 index 0000000..aba9a9a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse-movlhps-1.c @@ -0,0 +1,42 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse" } */ + +#ifndef CHECK_H +#define CHECK_H "sse-check.h" +#endif + +#ifndef TEST +#define TEST sse_test +#endif + +#include CHECK_H + +#include + +static __m128 +__attribute__((noinline, unused)) +test (__m128 a, __m128 b) +{ + return _mm_movelh_ps (a, b); +} + +static void +TEST (void) +{ + union128 u, s1, s2; + float e[4]; + + s1.x = _mm_set_ps (24.43, 68.346, 43.35, 546.46); + s2.x = _mm_set_ps (1.17, 2.16, 3.15, 4.14); + u.x = _mm_set1_ps (0.0); + + u.x = test (s1.x, s2.x); + + e[0] = s1.a[0]; + e[1] = s1.a[1]; + e[2] = s2.a[0]; + e[3] = s2.a[1]; + + if (check_union128 (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse-movmskps-1.c b/gcc/testsuite/gcc.target/i386/sse-movmskps-1.c new file mode 100644 index 0000000..f1f0d7e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse-movmskps-1.c @@ -0,0 +1,42 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse" } */ + +#ifndef CHECK_H +#define CHECK_H "sse-check.h" +#endif + +#ifndef TEST +#define TEST sse_test +#endif + +#include CHECK_H + +#include + +static int +__attribute__((noinline, unused)) +test (__m128 a) +{ + return _mm_movemask_ps (a); +} + +static void +TEST (void) +{ + union128 u; + float s[4] = {2134.3343,1234.635654, 1.2234, 876.8976}; + int d; + int e = 0; + int i; + + u.x = _mm_loadu_ps (s); + d = test (u.x); + + for (i = 0; i < 4; i++) + if (s[i] < 0) + e |= (1 << i); + + if (checkVi (&d, &e, 1)) + abort (); + +} diff --git a/gcc/testsuite/gcc.target/i386/sse-movntps-1.c b/gcc/testsuite/gcc.target/i386/sse-movntps-1.c new file mode 100644 index 0000000..8c45da3 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse-movntps-1.c @@ -0,0 +1,34 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse" } */ + +#ifndef CHECK_H +#define CHECK_H "sse-check.h" +#endif + +#ifndef TEST +#define TEST sse_test +#endif + +#include CHECK_H + +#include + +static void +__attribute__((noinline, unused)) +test (float *p, __m128 s) +{ + return _mm_stream_ps (p, s); +} + +static void +TEST (void) +{ + union128 u; + float e[4] __attribute__ ((aligned(16))); + + u.x = _mm_set_ps (24.43, 68.346, 43.35, 546.46); + test (e, u.x); + + if (check_union128 (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse-movss-1.c b/gcc/testsuite/gcc.target/i386/sse-movss-1.c new file mode 100644 index 0000000..eccdf5a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse-movss-1.c @@ -0,0 +1,39 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse" } */ + +#ifndef CHECK_H +#define CHECK_H "sse-check.h" +#endif + +#ifndef TEST +#define TEST sse_test +#endif + +#include CHECK_H + +#include + +static __m128 +__attribute__((noinline, unused)) +test (float *e) +{ + return _mm_load_ss (e); +} + +static void +TEST (void) +{ + union128 u; + float e[4] = {1.1, 2.2, 3.3, 4.4}; + + u.x = _mm_set_ps (2134.3343,1234.635654, 1.2234, 876.8976); + + u.x = test (e); + + e[1] = u.a[1]; + e[2] = u.a[2]; + e[3] = u.a[3]; + + if (check_union128 (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse-movss-2.c b/gcc/testsuite/gcc.target/i386/sse-movss-2.c new file mode 100644 index 0000000..f64fa4d --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse-movss-2.c @@ -0,0 +1,38 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse" } */ + +#ifndef CHECK_H +#define CHECK_H "sse-check.h" +#endif + +#ifndef TEST +#define TEST sse_test +#endif + +#include CHECK_H + +#include + +static void +__attribute__((noinline, unused)) +test (float *e, __m128 a) +{ + return _mm_store_ss (e, a); +} + +static void +TEST (void) +{ + union128 u; + float d[1]; + float e[1]; + + u.x = _mm_set_ps (2134.3343,1234.635654, 1.2234, 876.8976); + + test (d, u.x); + + e[0] = u.a[0]; + + if (checkVf (d, e, 1)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse-movss-3.c b/gcc/testsuite/gcc.target/i386/sse-movss-3.c new file mode 100644 index 0000000..1212622 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse-movss-3.c @@ -0,0 +1,41 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse" } */ + +#ifndef CHECK_H +#define CHECK_H "sse-check.h" +#endif + +#ifndef TEST +#define TEST sse_test +#endif + +#include CHECK_H + +#include + +static __m128 +__attribute__((noinline, unused)) +test (__m128 a, __m128 b) +{ + return _mm_move_ss (a, b); +} + +static void +TEST (void) +{ + union128 u, s1, s2; + float e[4]; + + s1.x = _mm_set_ps (2134.3343,1234.635654, 1.2234, 876.8976); + s2.x = _mm_set_ps (1.1, 2.2, 3.3, 4.4); + u.x = _mm_set_ps (5.5, 6.6, 7.7, 8.8); + u.x = test (s1.x, s2.x); + + e[0] = s2.a[0]; + e[1] = s1.a[1]; + e[2] = s1.a[2]; + e[3] = s1.a[3]; + + if (check_union128 (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse-movups-1.c b/gcc/testsuite/gcc.target/i386/sse-movups-1.c new file mode 100644 index 0000000..222da79 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse-movups-1.c @@ -0,0 +1,33 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse" } */ + +#ifndef CHECK_H +#define CHECK_H "sse-check.h" +#endif + +#ifndef TEST +#define TEST sse_test +#endif + +#include CHECK_H + +#include + +static __m128 +__attribute__((noinline, unused)) +test (float *e) +{ + return _mm_loadu_ps (e); +} + +static void +TEST (void) +{ + union128 u; + float e[4] = {2134.3343,1234.635654, 1.2234, 876.8976}; + + u.x = test (e); + + if (check_union128 (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse-movups-2.c b/gcc/testsuite/gcc.target/i386/sse-movups-2.c new file mode 100644 index 0000000..4165723 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse-movups-2.c @@ -0,0 +1,35 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse" } */ + +#ifndef CHECK_H +#define CHECK_H "sse-check.h" +#endif + +#ifndef TEST +#define TEST sse_test +#endif + +#include CHECK_H + +#include + +static void +__attribute__((noinline, unused)) +test (float *e, __m128 a) +{ + _mm_storeu_ps (e, a); +} + +static void +TEST (void) +{ + union128 u; + float e[4] = {0.0}; + + u.x = _mm_set_ps (2134.3343,1234.635654, 1.414, 3.3421); + + test (e, u.x); + + if (check_union128 (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse-mulps-1.c b/gcc/testsuite/gcc.target/i386/sse-mulps-1.c new file mode 100644 index 0000000..a07b5ab --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse-mulps-1.c @@ -0,0 +1,40 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse" } */ + +#ifndef CHECK_H +#define CHECK_H "sse-check.h" +#endif + +#ifndef TEST +#define TEST sse_test +#endif + +#include CHECK_H + +#include + +static __m128 +__attribute__((noinline, unused)) +test (__m128 s1, __m128 s2) +{ + return _mm_mul_ps (s1, s2); +} + +static void +TEST (void) +{ + union128 u, s1, s2; + float e[4]; + + s1.x = _mm_set_ps (41124.234,6678.346,8653.65635,856.43576); + s2.x = _mm_set_ps (2134.3343,6678.346,453.345635,54646.464356); + u.x = test (s1.x, s2.x); + + e[0] = s1.a[0] * s2.a[0]; + e[1] = s1.a[1] * s2.a[1]; + e[2] = s1.a[2] * s2.a[2]; + e[3] = s1.a[3] * s2.a[3]; + + if (check_union128 (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse-mulss-1.c b/gcc/testsuite/gcc.target/i386/sse-mulss-1.c new file mode 100644 index 0000000..7b45063 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse-mulss-1.c @@ -0,0 +1,40 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse" } */ + +#ifndef CHECK_H +#define CHECK_H "sse-check.h" +#endif + +#ifndef TEST +#define TEST sse_test +#endif + +#include CHECK_H + +#include + +static __m128 +__attribute__((noinline, unused)) +test (__m128 s1, __m128 s2) +{ + return _mm_mul_ss (s1, s2); +} + +static void +TEST (void) +{ + union128 u, s1, s2; + float e[4]; + + s1.x = _mm_set_ps (41124.234,6678.346,8653.65635,856.43576); + s2.x = _mm_set_ps (2134.3343,6678.346,453.345635,54646.464356); + u.x = test (s1.x, s2.x); + + e[0] = s1.a[0] * s2.a[0]; + e[1] = s1.a[1]; + e[2] = s1.a[2]; + e[3] = s1.a[3]; + + if (check_union128 (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse-orps-1.c b/gcc/testsuite/gcc.target/i386/sse-orps-1.c new file mode 100644 index 0000000..6c8dac5 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse-orps-1.c @@ -0,0 +1,47 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse" } */ + +#ifndef CHECK_H +#define CHECK_H "sse-check.h" +#endif + +#ifndef TEST +#define TEST sse_test +#endif + +#include CHECK_H + +#include + +static __m128 +__attribute__((noinline, unused)) +test (__m128 s1, __m128 s2) +{ + return _mm_or_ps (s1, s2); +} + +static void +TEST (void) +{ + union { + float f[4]; + int i[4]; + }source1, source2, e; + + union128 u, s1, s2; + int i; + + s1.x = _mm_set_ps (24.43, 168.346, 43.35, 546.46); + s2.x = _mm_set_ps (10.17, 2.16, 3.15, 4.14); + + _mm_storeu_ps (source1.f, s1.x); + _mm_storeu_ps (source2.f, s2.x); + + u.x = test (s1.x, s2.x); + + for (i = 0; i < 4; i++) + e.i[i] = source1.i[i] | source2.i[i]; + + if (check_union128 (u, e.f)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse-rcpps-1.c b/gcc/testsuite/gcc.target/i386/sse-rcpps-1.c new file mode 100644 index 0000000..7a1a8fa --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse-rcpps-1.c @@ -0,0 +1,42 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse" } */ + +#ifndef CHECK_H +#define CHECK_H "sse-check.h" +#endif + +#ifndef TEST +#define TEST sse_test +#endif + +#include CHECK_H + +#include + +static __m128 +__attribute__((noinline, unused)) +test (__m128 s1) +{ + return _mm_rcp_ps (s1); +} + +static void +TEST (void) +{ + union128 u, s1; + float e[4]; + int i; + + s1.x = _mm_set_ps (24.43, 68.346, 43.35, 546.46); + u.x = test (s1.x); + + for (i = 0; i < 4; i++) + { + __m128 tmp = _mm_load_ss (&s1.a[i]); + tmp = _mm_rcp_ss (tmp); + _mm_store_ss (&e[i], tmp); + } + + if (check_union128 (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse-rsqrtps-1.c b/gcc/testsuite/gcc.target/i386/sse-rsqrtps-1.c new file mode 100644 index 0000000..4052c21 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse-rsqrtps-1.c @@ -0,0 +1,42 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse" } */ + +#ifndef CHECK_H +#define CHECK_H "sse-check.h" +#endif + +#ifndef TEST +#define TEST sse_test +#endif + +#include CHECK_H + +#include + +static __m128 +__attribute__((noinline, unused)) +test (__m128 s1) +{ + return _mm_rsqrt_ps (s1); +} + +static void +TEST (void) +{ + union128 u, s1; + float e[4]; + int i; + + s1.x = _mm_set_ps (24.43, 68.346, 43.35, 546.46); + u.x = test (s1.x); + + for (i = 0; i < 4; i++) + { + __m128 tmp = _mm_load_ss (&s1.a[i]); + tmp = _mm_rsqrt_ss (tmp); + _mm_store_ss (&e[i], tmp); + } + + if (check_union128 (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse-sqrtps-1.c b/gcc/testsuite/gcc.target/i386/sse-sqrtps-1.c new file mode 100644 index 0000000..9f0658d --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse-sqrtps-1.c @@ -0,0 +1,41 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse" } */ + +#ifndef CHECK_H +#define CHECK_H "sse-check.h" +#endif + +#ifndef TEST +#define TEST sse_test +#endif + +#include CHECK_H + +#include + +static __m128 +__attribute__((noinline, unused)) +test (__m128 s1) +{ + return _mm_sqrt_ps (s1); +} + +static void +TEST (void) +{ + union128 u, s1; + float e[4]; + int i; + + s1.x = _mm_set_ps (24.43, 68.346, 43.35, 546.46); + u.x = test (s1.x); + + for (i = 0; i < 4; i++) { + __m128 tmp = _mm_load_ss (&s1.a[i]); + tmp = _mm_sqrt_ss (tmp); + _mm_store_ss (&e[i], tmp); + } + + if (check_union128 (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse-subps-1.c b/gcc/testsuite/gcc.target/i386/sse-subps-1.c new file mode 100644 index 0000000..2e7e8d5 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse-subps-1.c @@ -0,0 +1,40 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse" } */ + +#ifndef CHECK_H +#define CHECK_H "sse-check.h" +#endif + +#ifndef TEST +#define TEST sse_test +#endif + +#include CHECK_H + +#include + +static __m128 +__attribute__((noinline, unused)) +test (__m128 s1, __m128 s2) +{ + return _mm_sub_ps (s1, s2); +} + +static void +TEST (void) +{ + union128 u, s1, s2; + float e[4]; + + s1.x = _mm_set_ps (41124.234,6678.346,8653.65635,856.43576); + s2.x = _mm_set_ps (2134.3343,6678.346,453.345635,54646.464356); + u.x = test (s1.x, s2.x); + + e[0] = s1.a[0] - s2.a[0]; + e[1] = s1.a[1] - s2.a[1]; + e[2] = s1.a[2] - s2.a[2]; + e[3] = s1.a[3] - s2.a[3]; + + if (check_union128 (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse-subss-1.c b/gcc/testsuite/gcc.target/i386/sse-subss-1.c new file mode 100644 index 0000000..5b3ef26 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse-subss-1.c @@ -0,0 +1,40 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse" } */ + +#ifndef CHECK_H +#define CHECK_H "sse-check.h" +#endif + +#ifndef TEST +#define TEST sse_test +#endif + +#include CHECK_H + +#include + +static __m128 +__attribute__((noinline, unused)) +test (__m128 s1, __m128 s2) +{ + return _mm_sub_ss (s1, s2); +} + +static void +TEST (void) +{ + union128 u, s1, s2; + float e[4]; + + s1.x = _mm_set_ps (41124.234,6678.346,8653.65635,856.43576); + s2.x = _mm_set_ps (2134.3343,6678.346,453.345635,54646.464356); + u.x = test (s1.x, s2.x); + + e[0] = s1.a[0] - s2.a[0]; + e[1] = s1.a[1]; + e[2] = s1.a[2]; + e[3] = s1.a[3]; + + if (check_union128 (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse-ucomiss-1.c b/gcc/testsuite/gcc.target/i386/sse-ucomiss-1.c new file mode 100644 index 0000000..b38b1fd --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse-ucomiss-1.c @@ -0,0 +1,37 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse" } */ + +#ifndef CHECK_H +#define CHECK_H "sse-check.h" +#endif + +#ifndef TEST +#define TEST sse_test +#endif + +#include CHECK_H + +#include + +static int +__attribute__((noinline, unused)) +test (__m128 s1, __m128 s2) +{ + return _mm_ucomieq_ss (s1, s2); +} + +static void +TEST (void) +{ + union128 s1, s2; + int d[1]; + int e[1]; + + s1.x = _mm_set_ps (24.43, 68.346, 43.35, 546.46); + s2.x = _mm_set_ps (1.17, 2.16, 3.15, 4.14); + d[0] = test (s1.x, s2.x); + e[0] = s1.a[0] == s2.a[0]; + + if (checkVi (d, e, 1)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse-ucomiss-2.c b/gcc/testsuite/gcc.target/i386/sse-ucomiss-2.c new file mode 100644 index 0000000..e0212a4 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse-ucomiss-2.c @@ -0,0 +1,37 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse" } */ + +#ifndef CHECK_H +#define CHECK_H "sse-check.h" +#endif + +#ifndef TEST +#define TEST sse_test +#endif + +#include CHECK_H + +#include + +static int +__attribute__((noinline, unused)) +test (__m128 s1, __m128 s2) +{ + return _mm_ucomilt_ss (s1, s2); +} + +static void +TEST (void) +{ + union128 s1, s2; + int d[1]; + int e[1]; + + s1.x = _mm_set_ps (24.43, 68.346, 43.35, 546.46); + s2.x = _mm_set_ps (1.17, 2.16, 3.15, 4.14); + d[0] = test (s1.x, s2.x); + e[0] = s1.a[0] < s2.a[0]; + + if (checkVi (d, e, 1)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse-ucomiss-3.c b/gcc/testsuite/gcc.target/i386/sse-ucomiss-3.c new file mode 100644 index 0000000..dc728fb --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse-ucomiss-3.c @@ -0,0 +1,37 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse" } */ + +#ifndef CHECK_H +#define CHECK_H "sse-check.h" +#endif + +#ifndef TEST +#define TEST sse_test +#endif + +#include CHECK_H + +#include + +static int +__attribute__((noinline, unused)) +test (__m128 s1, __m128 s2) +{ + return _mm_ucomile_ss (s1, s2); +} + +static void +TEST (void) +{ + union128 s1, s2; + int d[1]; + int e[1]; + + s1.x = _mm_set_ps (24.43, 68.346, 43.35, 546.46); + s2.x = _mm_set_ps (1.17, 2.16, 3.15, 4.14); + d[0] = test (s1.x, s2.x); + e[0] = s1.a[0] <= s2.a[0]; + + if (checkVi (d, e, 1)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse-ucomiss-4.c b/gcc/testsuite/gcc.target/i386/sse-ucomiss-4.c new file mode 100644 index 0000000..3251c0b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse-ucomiss-4.c @@ -0,0 +1,37 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse" } */ + +#ifndef CHECK_H +#define CHECK_H "sse-check.h" +#endif + +#ifndef TEST +#define TEST sse_test +#endif + +#include CHECK_H + +#include + +static int +__attribute__((noinline, unused)) +test (__m128 s1, __m128 s2) +{ + return _mm_ucomigt_ss (s1, s2); +} + +static void +TEST (void) +{ + union128 s1, s2; + int d[1]; + int e[1]; + + s1.x = _mm_set_ps (24.43, 68.346, 43.35, 546.46); + s2.x = _mm_set_ps (1.17, 2.16, 3.15, 4.14); + d[0] = test (s1.x, s2.x); + e[0] = s1.a[0] > s2.a[0]; + + if (checkVi (d, e, 1)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse-ucomiss-5.c b/gcc/testsuite/gcc.target/i386/sse-ucomiss-5.c new file mode 100644 index 0000000..ad34f01 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse-ucomiss-5.c @@ -0,0 +1,37 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse" } */ + +#ifndef CHECK_H +#define CHECK_H "sse-check.h" +#endif + +#ifndef TEST +#define TEST sse_test +#endif + +#include CHECK_H + +#include + +static int +__attribute__((noinline, unused)) +test (__m128 s1, __m128 s2) +{ + return _mm_ucomige_ss (s1, s2); +} + +static void +TEST (void) +{ + union128 s1, s2; + int d[1]; + int e[1]; + + s1.x = _mm_set_ps (24.43, 68.346, 43.35, 546.46); + s2.x = _mm_set_ps (1.17, 2.16, 3.15, 4.14); + d[0] = test (s1.x, s2.x); + e[0] = s1.a[0] >= s2.a[0]; + + if (checkVi (d, e, 1)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse-ucomiss-6.c b/gcc/testsuite/gcc.target/i386/sse-ucomiss-6.c new file mode 100644 index 0000000..b9b2f4b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse-ucomiss-6.c @@ -0,0 +1,37 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse" } */ + +#ifndef CHECK_H +#define CHECK_H "sse-check.h" +#endif + +#ifndef TEST +#define TEST sse_test +#endif + +#include CHECK_H + +#include + +static int +__attribute__((noinline, unused)) +test (__m128 s1, __m128 s2) +{ + return _mm_ucomineq_ss (s1, s2); +} + +static void +TEST (void) +{ + union128 s1, s2; + int d[1]; + int e[1]; + + s1.x = _mm_set_ps (24.43, 68.346, 43.35, 546.46); + s2.x = _mm_set_ps (1.17, 2.16, 3.15, 4.14); + d[0] = test (s1.x, s2.x); + e[0] = s1.a[0] != s2.a[0]; + + if (checkVi (d, e, 1)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse-unpckhps-1.c b/gcc/testsuite/gcc.target/i386/sse-unpckhps-1.c new file mode 100644 index 0000000..be4ab36 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse-unpckhps-1.c @@ -0,0 +1,40 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse" } */ + +#ifndef CHECK_H +#define CHECK_H "sse-check.h" +#endif + +#ifndef TEST +#define TEST sse_test +#endif + +#include CHECK_H + +#include + +static __m128 +__attribute__((noinline, unused)) +test (__m128 s1, __m128 s2) +{ + return _mm_unpackhi_ps (s1, s2); +} + +static void +TEST (void) +{ + union128 u, s1, s2; + float e[4]; + + s1.x = _mm_set_ps (41124.234,6678.346,8653.65635,856.43576); + s2.x = _mm_set_ps (2134.3343,6678.346,453.345635,54646.464356); + u.x = test (s1.x, s2.x); + + e[0] = s1.a[2]; + e[1] = s2.a[2]; + e[2] = s1.a[3]; + e[3] = s2.a[3]; + + if (check_union128 (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse-unpcklps-1.c b/gcc/testsuite/gcc.target/i386/sse-unpcklps-1.c new file mode 100644 index 0000000..5a5da20 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse-unpcklps-1.c @@ -0,0 +1,40 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse" } */ + +#ifndef CHECK_H +#define CHECK_H "sse-check.h" +#endif + +#ifndef TEST +#define TEST sse_test +#endif + +#include CHECK_H + +#include + +static __m128 +__attribute__((noinline, unused)) +test (__m128 s1, __m128 s2) +{ + return _mm_unpacklo_ps (s1, s2); +} + +static void +TEST (void) +{ + union128 u, s1, s2; + float e[4]; + + s1.x = _mm_set_ps (41124.234,6678.346,8653.65635,856.43576); + s2.x = _mm_set_ps (2134.3343,6678.346,453.345635,54646.464356); + u.x = test (s1.x, s2.x); + + e[0] = s1.a[0]; + e[1] = s2.a[0]; + e[2] = s1.a[1]; + e[3] = s2.a[1]; + + if (check_union128 (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse-xorps-1.c b/gcc/testsuite/gcc.target/i386/sse-xorps-1.c new file mode 100644 index 0000000..6f96e69 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse-xorps-1.c @@ -0,0 +1,47 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse" } */ + +#ifndef CHECK_H +#define CHECK_H "sse-check.h" +#endif + +#ifndef TEST +#define TEST sse_test +#endif + +#include CHECK_H + +#include + +static __m128 +__attribute__((noinline, unused)) +test (__m128 s1, __m128 s2) +{ + return _mm_xor_ps (s1, s2); +} + +static void +TEST (void) +{ + union { + float f[4]; + int i[4]; + }source1, source2, e; + + union128 u, s1, s2; + int i; + + s1.x = _mm_set_ps (24.43, 68.346, 43.35, 546.46); + s2.x = _mm_set_ps (1.17, 2.16, 3.15, 4.14); + + _mm_storeu_ps (source1.f, s1.x); + _mm_storeu_ps (source2.f, s2.x); + + u.x = test (s1.x, s2.x); + + for (i = 0; i < 4; i++) + e.i[i] = source1.i[i] ^ source2.i[i]; + + if (check_union128 (u, e.f)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-addpd-1.c b/gcc/testsuite/gcc.target/i386/sse2-addpd-1.c new file mode 100644 index 0000000..2c1e81d --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-addpd-1.c @@ -0,0 +1,38 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128d +__attribute__((noinline, unused)) +test (__m128d s1, __m128d s2) +{ + return _mm_add_pd (s1, s2); +} + +static void +TEST (void) +{ + union128d u, s1, s2; + double e[2]; + + s1.x = _mm_set_pd (2134.3343,1234.635654); + s2.x = _mm_set_pd (41124.234,2344.2354); + u.x = test (s1.x, s2.x); + + e[0] = s1.a[0] + s2.a[0]; + e[1] = s1.a[1] + s2.a[1]; + + if (check_union128d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-addsd-1.c b/gcc/testsuite/gcc.target/i386/sse2-addsd-1.c new file mode 100644 index 0000000..d81b1bb --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-addsd-1.c @@ -0,0 +1,38 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128d +__attribute__((noinline, unused)) +test (__m128d s1, __m128d s2) +{ + return _mm_add_sd (s1, s2); +} + +static void +TEST (void) +{ + union128d u, s1, s2; + double e[2]; + + s1.x = _mm_set_pd (2134.3343,1234.635654); + s2.x = _mm_set_pd (41124.234,2344.2354); + u.x = test (s1.x, s2.x); + + e[0] = s1.a[0] + s2.a[0]; + e[1] = s1.a[1]; + + if (check_union128d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-andnpd-1.c b/gcc/testsuite/gcc.target/i386/sse2-andnpd-1.c new file mode 100644 index 0000000..36b3c31 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-andnpd-1.c @@ -0,0 +1,40 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128d +__attribute__((noinline, unused)) +test (__m128d s1, __m128d s2) +{ + return _mm_andnot_pd (s1, s2); +} + +static void +TEST (void) +{ + union128d u, s1, s2; + long long source1[2]={34545, 95567}; + long long source2[2]={674, 57897}; + long long e[2]; + + s1.x = _mm_loadu_pd ((double *)source1); + s2.x = _mm_loadu_pd ((double *)source2); + u.x = test (s1.x, s2.x); + + e[0] = (~source1[0]) & source2[0]; + e[1] = (~source1[1]) & source2[1]; + + if (check_union128d (u, (double *)e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-andpd-1.c b/gcc/testsuite/gcc.target/i386/sse2-andpd-1.c new file mode 100644 index 0000000..90902bf --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-andpd-1.c @@ -0,0 +1,47 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128d +__attribute__((noinline, unused)) +test (__m128d s1, __m128d s2) +{ + return _mm_and_pd (s1, s2); +} + +static void +TEST (void) +{ + union128d u, s1, s2; + + union + { + double d[2]; + long long ll[2]; + }source1, source2, e; + + s1.x = _mm_set_pd (34545, 95567); + s2.x = _mm_set_pd (674, 57897); + + _mm_storeu_pd (source1.d, s1.x); + _mm_storeu_pd (source2.d, s2.x); + + u.x = test (s1.x, s2.x); + + e.ll[0] = source1.ll[0] & source2.ll[0]; + e.ll[1] = source1.ll[1] & source2.ll[1]; + + if (check_union128d (u, e.d)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-comisd-1.c b/gcc/testsuite/gcc.target/i386/sse2-comisd-1.c new file mode 100644 index 0000000..e8478d9 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-comisd-1.c @@ -0,0 +1,37 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static int +__attribute__((noinline, unused)) +test (__m128d s1, __m128d s2) +{ + return _mm_comieq_sd (s1, s2); +} + +static void +TEST (void) +{ + union128d s1, s2; + int d[1]; + int e[1]; + + s1.x = _mm_set_pd (2134.3343,2344.2354); + s2.x = _mm_set_pd (41124.234,2344.2354); + d[0] = test (s1.x, s2.x); + e[0] = s1.a[0] == s2.a[0]; + + if (checkVi (d, e, 1)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-comisd-2.c b/gcc/testsuite/gcc.target/i386/sse2-comisd-2.c new file mode 100644 index 0000000..f18cf16 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-comisd-2.c @@ -0,0 +1,37 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static int +__attribute__((noinline, unused)) +test (__m128d s1, __m128d s2) +{ + return _mm_comilt_sd (s1, s2); +} + +static void +TEST (void) +{ + union128d s1, s2; + int d[1]; + int e[1]; + + s1.x = _mm_set_pd (2134.3343,2344.2354); + s2.x = _mm_set_pd (41124.234,2344.2354); + d[0] = test (s1.x, s2.x); + e[0] = s1.a[0] < s2.a[0]; + + if (checkVi (d, e, 1)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-comisd-3.c b/gcc/testsuite/gcc.target/i386/sse2-comisd-3.c new file mode 100644 index 0000000..6bd8855 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-comisd-3.c @@ -0,0 +1,37 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static int +__attribute__((noinline, unused)) +test (__m128d s1, __m128d s2) +{ + return _mm_comile_sd (s1, s2); +} + +static void +TEST (void) +{ + union128d s1, s2; + int d[1]; + int e[1]; + + s1.x = _mm_set_pd (2134.3343,2344.2354); + s2.x = _mm_set_pd (41124.234,2344.2354); + d[0] = test (s1.x, s2.x); + e[0] = s1.a[0] <= s2.a[0]; + + if (checkVi (d, e, 1)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-comisd-4.c b/gcc/testsuite/gcc.target/i386/sse2-comisd-4.c new file mode 100644 index 0000000..cf377c4 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-comisd-4.c @@ -0,0 +1,37 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static int +__attribute__((noinline, unused)) +test (__m128d s1, __m128d s2) +{ + return _mm_comigt_sd (s1, s2); +} + +static void +TEST (void) +{ + union128d s1, s2; + int d[1]; + int e[1]; + + s1.x = _mm_set_pd (2134.3343,12344.2354); + s2.x = _mm_set_pd (41124.234,2344.2354); + d[0] = test (s1.x, s2.x); + e[0] = s1.a[0] > s2.a[0]; + + if (checkVi (d, e, 1)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-comisd-5.c b/gcc/testsuite/gcc.target/i386/sse2-comisd-5.c new file mode 100644 index 0000000..dd2127b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-comisd-5.c @@ -0,0 +1,37 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static int +__attribute__((noinline, unused)) +test (__m128d s1, __m128d s2) +{ + return _mm_comige_sd (s1, s2); +} + +static void +TEST (void) +{ + union128d s1, s2; + int d[1]; + int e[1]; + + s1.x = _mm_set_pd (2134.3343,2344.2354); + s2.x = _mm_set_pd (41124.234,2344.2354); + d[0] = test (s1.x, s2.x); + e[0] = s1.a[0] >= s2.a[0]; + + if (checkVi (d, e, 1)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-comisd-6.c b/gcc/testsuite/gcc.target/i386/sse2-comisd-6.c new file mode 100644 index 0000000..1337117 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-comisd-6.c @@ -0,0 +1,37 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static int +__attribute__((noinline, unused)) +test (__m128d s1, __m128d s2) +{ + return _mm_comineq_sd (s1, s2); +} + +static void +TEST (void) +{ + union128d s1, s2; + int d[1]; + int e[1]; + + s1.x = _mm_set_pd (2134.3343,2344.2354); + s2.x = _mm_set_pd (41124.234,2344.2354); + d[0] = test (s1.x, s2.x); + e[0] = s1.a[0] != s2.a[0]; + + if (checkVi (d, e, 1)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-cvtdq2pd-1.c b/gcc/testsuite/gcc.target/i386/sse2-cvtdq2pd-1.c new file mode 100644 index 0000000..5640e39 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-cvtdq2pd-1.c @@ -0,0 +1,39 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128d +__attribute__((noinline, unused)) +test (__m128i p) +{ + return _mm_cvtepi32_pd (p); +} + +static void +TEST (void) +{ + union128d u; + union128i_d s; + double e[2]; + + s.x = _mm_set_epi32 (123, 321, 456, 987); + + u.x = test (s.x); + + e[0] = (double)s.a[0]; + e[1] = (double)s.a[1]; + + if (check_union128d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-cvtdq2ps-1.c b/gcc/testsuite/gcc.target/i386/sse2-cvtdq2ps-1.c new file mode 100644 index 0000000..a8839a4 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-cvtdq2ps-1.c @@ -0,0 +1,41 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128 +__attribute__((noinline, unused)) +test (__m128i p) +{ + return _mm_cvtepi32_ps (p); +} + +static void +TEST (void) +{ + union128 u; + union128i_d s; + float e[4]; + + s.x = _mm_set_epi32 (123, 321, 456, 987); + + u.x = test (s.x); + + e[0] = (float)s.a[0]; + e[1] = (float)s.a[1]; + e[2] = (float)s.a[2]; + e[3] = (float)s.a[3]; + + if (check_union128 (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-cvtpd2dq-1.c b/gcc/testsuite/gcc.target/i386/sse2-cvtpd2dq-1.c new file mode 100644 index 0000000..f25290c --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-cvtpd2dq-1.c @@ -0,0 +1,39 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (__m128d p) +{ + return _mm_cvtpd_epi32 (p); +} + +static void +TEST (void) +{ + union128i_d u; + union128d s; + int e[4] = {0}; + + s.x = _mm_set_pd (2.78, 7777768.82); + + u.x = test (s.x); + + e[0] = (int)(s.a[0] + 0.5); + e[1] = (int)(s.a[1] + 0.5); + + if (check_union128i_d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-cvtpd2ps-1.c b/gcc/testsuite/gcc.target/i386/sse2-cvtpd2ps-1.c new file mode 100644 index 0000000..365d5e7 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-cvtpd2ps-1.c @@ -0,0 +1,39 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128 +__attribute__((noinline, unused)) +test (__m128d p) +{ + return _mm_cvtpd_ps (p); +} + +static void +TEST (void) +{ + union128 u; + union128d s; + float e[4] = {0}; + + s.x = _mm_set_pd (123.321, 456.987); + + u.x = test (s.x); + + e[0] = (float)s.a[0]; + e[1] = (float)s.a[1]; + + if (check_union128 (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-cvtps2dq-1.c b/gcc/testsuite/gcc.target/i386/sse2-cvtps2dq-1.c new file mode 100644 index 0000000..68c2a99 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-cvtps2dq-1.c @@ -0,0 +1,41 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (__m128 p) +{ + return _mm_cvtps_epi32 (p); +} + +static void +TEST (void) +{ + union128i_d u; + union128 s; + int e[4] = {0}; + + s.x = _mm_set_ps (2.78, 7777768.82, 2.331, 3.456); + + u.x = test (s.x); + + e[0] = (int)(s.a[0] + 0.5); + e[1] = (int)(s.a[1] + 0.5); + e[2] = (int)(s.a[2] + 0.5); + e[3] = (int)(s.a[3] + 0.5); + + if (check_union128i_d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-cvtps2pd-1.c b/gcc/testsuite/gcc.target/i386/sse2-cvtps2pd-1.c new file mode 100644 index 0000000..16093ef --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-cvtps2pd-1.c @@ -0,0 +1,39 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128d +__attribute__((noinline, unused)) +test (__m128 p) +{ + return _mm_cvtps_pd (p); +} + +static void +TEST (void) +{ + union128d u; + union128 s; + double e[2]; + + s.x = _mm_set_ps (2.78, 7777768.82, 2.331, 3.456); + + u.x = test (s.x); + + e[0] = (double)s.a[0]; + e[1] = (double)s.a[1]; + + if (check_union128d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-cvtsd2si-1.c b/gcc/testsuite/gcc.target/i386/sse2-cvtsd2si-1.c new file mode 100644 index 0000000..75770ee --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-cvtsd2si-1.c @@ -0,0 +1,39 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + + +static int +__attribute__((noinline, unused)) +test (__m128d p) +{ + return _mm_cvtsd_si32 (p); +} + +static void +TEST (void) +{ + union128d s; + int e; + int d; + + s.x = _mm_set_pd (123.321, 456.987); + + d = test (s.x); + + e = (int)(s.a[0] + 0.5); + + if (d != e) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-cvtsd2si-2.c b/gcc/testsuite/gcc.target/i386/sse2-cvtsd2si-2.c new file mode 100644 index 0000000..dfc543f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-cvtsd2si-2.c @@ -0,0 +1,39 @@ +/* { dg-do run } */ +/* { dg-require-effective-target lp64 } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static long long +__attribute__((noinline, unused)) +test (__m128d p) +{ + return _mm_cvtsd_si64 (p); +} + +static void +TEST (void) +{ + union128d s; + long long e; + long long d; + + s.x = _mm_set_pd (829496729501.4, 429496729501.4); + + d = test (s.x); + + e = (long long)(s.a[0] + 0.5); + + if (d != e) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-cvtsd2ss-1.c b/gcc/testsuite/gcc.target/i386/sse2-cvtsd2ss-1.c new file mode 100644 index 0000000..ae0b2c3 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-cvtsd2ss-1.c @@ -0,0 +1,41 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + + +static __m128 +__attribute__((noinline, unused)) +test (__m128 p1, __m128d p2) +{ + return _mm_cvtsd_ss (p1, p2); +} + +static void +TEST (void) +{ + union128d s1; + union128 u, s2; + double source1[2] = {123.345, 67.3321}; + float e[4] = {5633.098, 93.21, 3.34, 4555.2}; + + s1.x = _mm_loadu_pd (source1); + s2.x = _mm_loadu_ps (e); + + u.x = test(s2.x, s1.x); + + e[0] = (float)source1[0]; + + if (check_union128(u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-cvtsi2sd-1.c b/gcc/testsuite/gcc.target/i386/sse2-cvtsi2sd-1.c new file mode 100644 index 0000000..12ca895 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-cvtsi2sd-1.c @@ -0,0 +1,37 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128d +__attribute__((noinline, unused)) +test (__m128d p, int b) +{ + return _mm_cvtsi32_sd (p, b); +} + +static void +TEST (void) +{ + union128d u, s; + int b = 128; + double e[2]; + + s.x = _mm_set_pd (123.321, 456.987); + + u.x = test (s.x, b); + e[0] = (double)b; + e[1] = s.a[1]; + if (check_union128d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-cvtsi2sd-2.c b/gcc/testsuite/gcc.target/i386/sse2-cvtsi2sd-2.c new file mode 100644 index 0000000..29d6d86 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-cvtsi2sd-2.c @@ -0,0 +1,38 @@ +/* { dg-do run } */ +/* { dg-require-effective-target lp64 } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128d +__attribute__((noinline, unused)) +test (__m128d p, long long b) +{ + return _mm_cvtsi64_sd (p, b); +} + +static void +TEST (void) +{ + union128d u, s; + long long b = 42949672951333LL; + double e[2]; + + s.x = _mm_set_pd (123.321, 456.987); + + u.x = test (s.x, b); + e[0] = (double)b; + e[1] = s.a[1]; + if (check_union128d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-cvtss2sd-1.c b/gcc/testsuite/gcc.target/i386/sse2-cvtss2sd-1.c new file mode 100644 index 0000000..e8172d3 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-cvtss2sd-1.c @@ -0,0 +1,40 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128d +__attribute__((noinline, unused)) +test (__m128d a, __m128 b) +{ + return _mm_cvtss_sd (a, b); +} + +static void +TEST (void) +{ + union128d u, s1; + union128 s2; + double e[2]; + + s1.x = _mm_set_pd (123.321, 456.987); + s2.x = _mm_set_ps (123.321, 456.987, 666.45, 231.987); + + u.x = test (s1.x, s2.x); + + e[0] = (double)s2.a[0]; + e[1] = s1.a[1]; + + if (check_union128d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-cvttpd2dq-1.c b/gcc/testsuite/gcc.target/i386/sse2-cvttpd2dq-1.c new file mode 100644 index 0000000..93dd624 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-cvttpd2dq-1.c @@ -0,0 +1,39 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (__m128d p) +{ + return _mm_cvttpd_epi32 (p); +} + +static void +TEST (void) +{ + union128d s; + union128i_d u; + int e[4] = {0}; + + s.x = _mm_set_pd (123.321, 456.987); + + u.x = test (s.x); + + e[0] = (int)s.a[0]; + e[1] = (int)s.a[1]; + + if (check_union128i_d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-cvttps2dq-1.c b/gcc/testsuite/gcc.target/i386/sse2-cvttps2dq-1.c new file mode 100644 index 0000000..1c963a1 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-cvttps2dq-1.c @@ -0,0 +1,41 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (__m128 p) +{ + return _mm_cvttps_epi32 (p); +} + +static void +TEST (void) +{ + union128 s; + union128i_d u; + int e[4] = {0}; + + s.x = _mm_set_ps (123.321, 456.987, 33.56, 7765.321); + + u.x = test (s.x); + + e[0] = (int)s.a[0]; + e[1] = (int)s.a[1]; + e[2] = (int)s.a[2]; + e[3] = (int)s.a[3]; + + if (check_union128i_d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-cvttsd2si-1.c b/gcc/testsuite/gcc.target/i386/sse2-cvttsd2si-1.c new file mode 100644 index 0000000..a87ec1a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-cvttsd2si-1.c @@ -0,0 +1,37 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static int +__attribute__((noinline, unused)) +test (__m128d p) +{ + return _mm_cvttsd_si32 (p); +} + +static void +TEST (void) +{ + union128d s; + int e; + int d; + + s.x = _mm_set_pd (123.321, 456.987); + + d = test (s.x); + e = (int)(s.a[0]); + + if (d != e) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-cvttsd2si-2.c b/gcc/testsuite/gcc.target/i386/sse2-cvttsd2si-2.c new file mode 100644 index 0000000..ec0fe20 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-cvttsd2si-2.c @@ -0,0 +1,38 @@ +/* { dg-do run } */ +/* { dg-require-effective-target lp64 } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static long long +__attribute__((noinline, unused)) +test (__m128d p) +{ + return _mm_cvttsd_si64 (p); +} + +static void +TEST (void) +{ + union128d s; + long long e; + long long d; + + s.x = _mm_set_pd (123.321, 42949672339501.4); + + d = test (s.x); + e = (long long)(s.a[0]); + + if (d != e) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-divpd-1.c b/gcc/testsuite/gcc.target/i386/sse2-divpd-1.c new file mode 100644 index 0000000..cc4f9d11 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-divpd-1.c @@ -0,0 +1,38 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128d +__attribute__((noinline, unused)) +test (__m128d s1, __m128d s2) +{ + return _mm_div_pd (s1, s2); +} + +static void +TEST (void) +{ + union128d u, s1, s2; + double e[2]; + + s1.x = _mm_set_pd (2134.3343,1234.635654); + s2.x = _mm_set_pd (41124.234,2344.2354); + u.x = test (s1.x, s2.x); + + e[0] = s1.a[0] / s2.a[0]; + e[1] = s1.a[1] / s2.a[1]; + + if (check_union128d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-divsd-1.c b/gcc/testsuite/gcc.target/i386/sse2-divsd-1.c new file mode 100644 index 0000000..e8b9e8c --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-divsd-1.c @@ -0,0 +1,38 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128d +__attribute__((noinline, unused)) +test (__m128d s1, __m128d s2) +{ + return _mm_div_sd (s1, s2); +} + +static void +TEST (void) +{ + union128d u, s1, s2; + double e[2]; + + s1.x = _mm_set_pd (2134.3343,1234.635654); + s2.x = _mm_set_pd (41124.234,2344.2354); + u.x = test (s1.x, s2.x); + + e[0] = s1.a[0] / s2.a[0]; + e[1] = s1.a[1]; + + if (check_union128d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-maxpd-1.c b/gcc/testsuite/gcc.target/i386/sse2-maxpd-1.c new file mode 100644 index 0000000..3ca51a2 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-maxpd-1.c @@ -0,0 +1,38 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128d +__attribute__((noinline, unused)) +test (__m128d s1, __m128d s2) +{ + return _mm_max_pd (s1, s2); +} + +static void +TEST (void) +{ + union128d u, s1, s2; + double e[2]; + + s1.x = _mm_set_pd (2134.3343,1234.635654); + s2.x = _mm_set_pd (41124.234,2344.2354); + u.x = test (s1.x, s2.x); + + e[0] = s1.a[0] > s2.a[0] ? s1.a[0]:s2.a[0]; + e[1] = s1.a[1] > s2.a[1] ? s1.a[1]:s2.a[1]; + + if (check_union128d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-maxsd-1.c b/gcc/testsuite/gcc.target/i386/sse2-maxsd-1.c new file mode 100644 index 0000000..e2c6829 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-maxsd-1.c @@ -0,0 +1,38 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128d +__attribute__((noinline, unused)) +test (__m128d s1, __m128d s2) +{ + return _mm_max_sd (s1, s2); +} + +static void +TEST (void) +{ + union128d u, s1, s2; + double e[2]; + + s1.x = _mm_set_pd (2134.3343,1234.635654); + s2.x = _mm_set_pd (41124.234,2344.2354); + u.x = test (s1.x, s2.x); + + e[0] = s1.a[0] > s2.a[0] ? s1.a[0]:s2.a[0]; + e[1] = s1.a[1]; + + if (check_union128d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-minpd-1.c b/gcc/testsuite/gcc.target/i386/sse2-minpd-1.c new file mode 100644 index 0000000..9ec53e2 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-minpd-1.c @@ -0,0 +1,38 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128d +__attribute__((noinline, unused)) +test (__m128d s1, __m128d s2) +{ + return _mm_min_pd (s1, s2); +} + +static void +TEST (void) +{ + union128d u, s1, s2; + double e[2]; + + s1.x = _mm_set_pd (2134.3343,1234.635654); + s2.x = _mm_set_pd (41124.234,2344.2354); + u.x = test (s1.x, s2.x); + + e[0] = s1.a[0] < s2.a[0] ? s1.a[0]:s2.a[0]; + e[1] = s1.a[1] < s2.a[1] ? s1.a[1]:s2.a[1]; + + if (check_union128d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-minsd-1.c b/gcc/testsuite/gcc.target/i386/sse2-minsd-1.c new file mode 100644 index 0000000..50dc124 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-minsd-1.c @@ -0,0 +1,38 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128d +__attribute__((noinline, unused)) +test (__m128d s1, __m128d s2) +{ + return _mm_min_sd (s1, s2); +} + +static void +TEST (void) +{ + union128d u, s1, s2; + double e[2]; + + s1.x = _mm_set_pd (2134.3343,1234.635654); + s2.x = _mm_set_pd (41124.234,2344.2354); + u.x = test (s1.x, s2.x); + + e[0] = s1.a[0] < s2.a[0] ? s1.a[0]:s2.a[0]; + e[1] = s1.a[1]; + + if (check_union128d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-movapd-1.c b/gcc/testsuite/gcc.target/i386/sse2-movapd-1.c new file mode 100644 index 0000000..0a047dd --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-movapd-1.c @@ -0,0 +1,33 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128d +__attribute__((noinline, unused)) +test (double *e) +{ + return _mm_load_pd (e); +} + +static void +TEST (void) +{ + union128d u; + double e[2] __attribute__ ((aligned (8))) = {2134.3343,1234.635654}; + + u.x = test (e); + + if (check_union128d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-movapd-2.c b/gcc/testsuite/gcc.target/i386/sse2-movapd-2.c new file mode 100644 index 0000000..decfd22 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-movapd-2.c @@ -0,0 +1,35 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static void +__attribute__((noinline, unused)) +test (double *e, __m128d a) +{ + _mm_store_pd (e, a); +} + +static void +TEST (void) +{ + union128d u; + double e[2] __attribute__ ((aligned (8))) = {0.0}; + + u.x = _mm_set_pd (2134.3343,1234.635654); + + test (e, u.x); + + if (check_union128d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-movd-1.c b/gcc/testsuite/gcc.target/i386/sse2-movd-1.c new file mode 100644 index 0000000..2475bbc --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-movd-1.c @@ -0,0 +1,36 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (int b) +{ + return _mm_cvtsi32_si128 (b); +} + +static void +TEST (void) +{ + union128i_d u; + int b = 128; + int e[4] = {0}; + + u.x = test (b); + + e[0] = b; + + if (check_union128i_d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-movd-2.c b/gcc/testsuite/gcc.target/i386/sse2-movd-2.c new file mode 100644 index 0000000..f986e6e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-movd-2.c @@ -0,0 +1,33 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static int +__attribute__((noinline, unused)) +test (__m128i b) +{ + return _mm_cvtsi128_si32 (b); +} + +static void +TEST (void) +{ + union128i_d u; + int e; + + u.x = _mm_set_epi32 (2134, -128, 655366, 9999); + e = test (u.x); + if (e != u.a[0]) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-movdqa-1.c b/gcc/testsuite/gcc.target/i386/sse2-movdqa-1.c new file mode 100644 index 0000000..cf95b62 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-movdqa-1.c @@ -0,0 +1,33 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (__m128i *p) +{ + return _mm_load_si128 (p); +} + +static void +TEST (void) +{ + union128i_d u; + int e[4] __attribute__ ((aligned(16))) = {1, 2, 3, 4}; + + u.x = test ((__m128i *)e); + + if (check_union128i_d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-movdqa-2.c b/gcc/testsuite/gcc.target/i386/sse2-movdqa-2.c new file mode 100644 index 0000000..7bf49dc --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-movdqa-2.c @@ -0,0 +1,35 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static void +__attribute__((noinline, unused)) +test (__m128i *p, __m128i a) +{ + return _mm_store_si128 (p, a); +} + +static void +TEST (void) +{ + union128i_d u; + int e[4] __attribute__ ((aligned(16))) = {0}; + + u.x = _mm_set_epi32 (1, 2, 3, 4); + + test ((__m128i *)e, u.x); + + if (check_union128i_d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-movdqu-1.c b/gcc/testsuite/gcc.target/i386/sse2-movdqu-1.c new file mode 100644 index 0000000..c24e128 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-movdqu-1.c @@ -0,0 +1,33 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (__m128i *p) +{ + return _mm_loadu_si128 (p); +} + +static void +TEST (void) +{ + union128i_d u; + int e[4] = {1, 2, 3, 4}; + + u.x = test ((__m128i *)e); + + if (check_union128i_d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-movdqu-2.c b/gcc/testsuite/gcc.target/i386/sse2-movdqu-2.c new file mode 100644 index 0000000..9ab0195 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-movdqu-2.c @@ -0,0 +1,35 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static void +__attribute__((noinline, unused)) +test (__m128i *p, __m128i a) +{ + return _mm_storeu_si128 (p, a); +} + +static void +TEST (void) +{ + union128i_d u; + int e[4] = {0}; + + u.x = _mm_set_epi32 (1, 2, 3, 4); + + test ((__m128i *)e, u.x); + + if (check_union128i_d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-movhpd-1.c b/gcc/testsuite/gcc.target/i386/sse2-movhpd-1.c new file mode 100644 index 0000000..82e7671 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-movhpd-1.c @@ -0,0 +1,38 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mfpmath=sse -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128d +__attribute__((noinline, unused)) +test (__m128d s1, double *p) +{ + return _mm_loadh_pd (s1, p); +} + +static void +TEST (void) +{ + union128d u, s1; + double s2[2] = {41124.234,2344.2354}; + double e[2]; + + s1.x = _mm_set_pd (2134.3343,1234.635654); + u.x = test (s1.x, s2); + + e[0] = s1.a[0]; + e[1] = s2[0]; + + if (check_union128d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-movhpd-2.c b/gcc/testsuite/gcc.target/i386/sse2-movhpd-2.c new file mode 100644 index 0000000..335c898 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-movhpd-2.c @@ -0,0 +1,37 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mfpmath=sse -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static void +__attribute__((noinline, unused)) +test (double *p, __m128d a) +{ + return _mm_storeh_pd (p, a); +} + +static void +TEST (void) +{ + union128d s; + double d[1]; + double e[1]; + + s.x = _mm_set_pd (2134.3343,1234.635654); + test (d, s.x); + + e[0] = s.a[1]; + + if (e[0] != d[0]) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-movlpd-1.c b/gcc/testsuite/gcc.target/i386/sse2-movlpd-1.c new file mode 100644 index 0000000..548f2e6 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-movlpd-1.c @@ -0,0 +1,40 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128d +__attribute__((noinline, unused)) +test (__m128d a, double *e) +{ + return _mm_loadl_pd (a, e); +} + +static void +TEST (void) +{ + union128d u, s1; + double d[2] = {2134.3343,1234.635654}; + double e[2]; + + s1.x = _mm_set_pd (41124.234,2344.2354); + u.x = _mm_loadu_pd (d); + + u.x = test (s1.x, d); + + e[0] = d[0]; + e[1] = s1.a[1]; + + if (check_union128d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-movlpd-2.c b/gcc/testsuite/gcc.target/i386/sse2-movlpd-2.c new file mode 100644 index 0000000..d63aedf --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-movlpd-2.c @@ -0,0 +1,37 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static void +__attribute__((noinline, unused)) +test (double *e, __m128d a) +{ + return _mm_storel_pd (e, a); +} + +static void +TEST (void) +{ + union128d u; + double e[2]; + + u.x = _mm_set_pd (41124.234,2344.2354); + + test (e, u.x); + + e[1] = u.a[1]; + + if (check_union128d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-movmskpd-1.c b/gcc/testsuite/gcc.target/i386/sse2-movmskpd-1.c new file mode 100644 index 0000000..cef6f8d --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-movmskpd-1.c @@ -0,0 +1,44 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static int +__attribute__((noinline, unused)) +test (__m128d p) +{ + return _mm_movemask_pd (p); +} + +static void +TEST (void) +{ + double source[2] = {1.234, -2234.23}; + union128d s1; + int d; + int e; + + s1.x = _mm_loadu_pd (source); + + d = test (s1.x); + + e = 0; + if (source[0] < 0) + e |= 1; + + if (source[1] < 0) + e |= 1 << 1; + + if (checkVi (&d, &e, 1)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-movntdq-1.c b/gcc/testsuite/gcc.target/i386/sse2-movntdq-1.c new file mode 100644 index 0000000..b219e29 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-movntdq-1.c @@ -0,0 +1,35 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static void +__attribute__((noinline, unused)) +test (__m128i *p, __m128i s) +{ + return _mm_stream_si128 (p, s); +} + +static void +TEST (void) +{ + union128i_d u; + int e[4] __attribute__ ((aligned(32))); + + u.x = _mm_set_epi32 (21, 34, 334, 8567); + + test ((__m128i *)e, u.x); + + if (check_union128i_d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-movntpd-1.c b/gcc/testsuite/gcc.target/i386/sse2-movntpd-1.c new file mode 100644 index 0000000..7f5274e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-movntpd-1.c @@ -0,0 +1,34 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static void +__attribute__((noinline, unused)) +test (double *p, __m128d s) +{ + return _mm_stream_pd (p, s); +} + +static void +TEST (void) +{ + union128d u; + double e[2] __attribute__ ((aligned(32))); + + u.x = _mm_set_pd (2134.3343,1234.635654); + test (e, u.x); + + if (check_union128d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-movq-1.c b/gcc/testsuite/gcc.target/i386/sse2-movq-1.c new file mode 100644 index 0000000..9d22df9 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-movq-1.c @@ -0,0 +1,35 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (__m128i b) +{ + return _mm_move_epi64 (b); +} + +static void +TEST (void) +{ + union128i_q u, s1; + long long e[2] = {0}; + + s1.x = _mm_set_epi64x(12876, 3376590); + u.x = test (s1.x); + e[0] = s1.a[0]; + + if (check_union128i_q (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-movq-2.c b/gcc/testsuite/gcc.target/i386/sse2-movq-2.c new file mode 100644 index 0000000..1b4c02a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-movq-2.c @@ -0,0 +1,37 @@ +/* { dg-do run } */ +/* { dg-require-effective-target lp64 } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (long long b) +{ + return _mm_cvtsi64_si128 (b); +} + +static void +TEST (void) +{ + union128i_q u; + long long b = 4294967295133LL; + long long e[2] = {0}; + + u.x = test (b); + + e[0] = b; + + if (check_union128i_q (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-movq-3.c b/gcc/testsuite/gcc.target/i386/sse2-movq-3.c new file mode 100644 index 0000000..3538bd3 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-movq-3.c @@ -0,0 +1,34 @@ +/* { dg-do run } */ +/* { dg-require-effective-target lp64 } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static long long +__attribute__((noinline, unused)) +test (__m128i b) +{ + return _mm_cvtsi128_si64 (b); +} + +static void +TEST (void) +{ + union128i_q u; + long long e; + + u.x = _mm_set_epi64x (4294967295133LL, 3844294967295133LL); + e = test (u.x); + if (e != u.a[0]) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-movsd-1.c b/gcc/testsuite/gcc.target/i386/sse2-movsd-1.c new file mode 100644 index 0000000..98f9987 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-movsd-1.c @@ -0,0 +1,38 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128d +__attribute__((noinline, unused)) +test (double *p) +{ + return _mm_load_sd (p); +} + +static void +TEST (void) +{ + union128d u; + double d[2] = {128.023, 3345.1234}; + double e[2]; + + u.x = _mm_loadu_pd (e); + u.x = test (d); + + e[0] = d[0]; + e[1] = 0.0; + + if (check_union128d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-movsd-2.c b/gcc/testsuite/gcc.target/i386/sse2-movsd-2.c new file mode 100644 index 0000000..e6e83d1 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-movsd-2.c @@ -0,0 +1,37 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static void +__attribute__((noinline, unused)) +test (double *p, __m128d a) +{ + _mm_store_sd (p, a); +} + +static void +TEST (void) +{ + union128d u; + double d[1]; + double e[1]; + + u.x = _mm_set_pd (128.023, 3345.1234); + test (d, u.x); + + e[0] = u.a[0]; + + if (checkVd (d, e, 1)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-movupd-1.c b/gcc/testsuite/gcc.target/i386/sse2-movupd-1.c new file mode 100644 index 0000000..f9bf585 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-movupd-1.c @@ -0,0 +1,33 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128d +__attribute__((noinline, unused)) +test (double *e) +{ + return _mm_loadu_pd (e); +} + +static void +TEST (void) +{ + union128d u; + double e[2] = {2134.3343,1234.635654}; + + u.x = test (e); + + if (check_union128d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-movupd-2.c b/gcc/testsuite/gcc.target/i386/sse2-movupd-2.c new file mode 100644 index 0000000..b5c59b8 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-movupd-2.c @@ -0,0 +1,35 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static void +__attribute__((noinline, unused)) +test (double *e, __m128d a) +{ + _mm_storeu_pd (e, a); +} + +static void +TEST (void) +{ + union128d u; + double e[2] = {0.0}; + + u.x = _mm_set_pd (2134.3343,1234.635654); + + test (e, u.x); + + if (check_union128d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-mulpd-1.c b/gcc/testsuite/gcc.target/i386/sse2-mulpd-1.c new file mode 100644 index 0000000..c87e9e2 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-mulpd-1.c @@ -0,0 +1,38 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128d +__attribute__((noinline, unused)) +test (__m128d s1, __m128d s2) +{ + return _mm_mul_pd (s1, s2); +} + +static void +TEST (void) +{ + union128d u, s1, s2; + double e[2]; + + s1.x = _mm_set_pd (2134.3343,1234.635654); + s2.x = _mm_set_pd (41124.234,2344.2354); + u.x = test (s1.x, s2.x); + + e[0] = s1.a[0] * s2.a[0]; + e[1] = s1.a[1] * s2.a[1]; + + if (check_union128d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-mulsd-1.c b/gcc/testsuite/gcc.target/i386/sse2-mulsd-1.c new file mode 100644 index 0000000..1b66573 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-mulsd-1.c @@ -0,0 +1,38 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128d +__attribute__((noinline, unused)) +test (__m128d s1, __m128d s2) +{ + return _mm_mul_sd (s1, s2); +} + +static void +TEST (void) +{ + union128d u, s1, s2; + double e[2]; + + s1.x = _mm_set_pd (2134.3343,1234.635654); + s2.x = _mm_set_pd (41124.234,2344.2354); + u.x = test (s1.x, s2.x); + + e[0] = s1.a[0] * s2.a[0]; + e[1] = s1.a[1]; + + if (check_union128d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-orpd-1.c b/gcc/testsuite/gcc.target/i386/sse2-orpd-1.c new file mode 100644 index 0000000..4eaa70a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-orpd-1.c @@ -0,0 +1,47 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128d +__attribute__((noinline, unused)) +test (__m128d s1, __m128d s2) +{ + return _mm_or_pd (s1, s2); +} + +static void +TEST (void) +{ + union128d u, s1, s2; + + union + { + double d[2]; + long long ll[2]; + }d1, d2, e; + + s1.x = _mm_set_pd (1234, 44386); + s2.x = _mm_set_pd (5198, 23098); + + _mm_storeu_pd (d1.d, s1.x); + _mm_storeu_pd (d2.d, s2.x); + + u.x = test (s1.x, s2.x); + + e.ll[0] = d1.ll[0] | d2.ll[0]; + e.ll[1] = d1.ll[1] | d2.ll[1]; + + if (check_union128d (u, e.d)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-packssdw-1.c b/gcc/testsuite/gcc.target/i386/sse2-packssdw-1.c new file mode 100644 index 0000000..a610326 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-packssdw-1.c @@ -0,0 +1,57 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (__m128i s1, __m128i s2) +{ + return _mm_packs_epi32 (s1, s2); +} + +static void +TEST (void) +{ + union128i_d s1, s2; + union128i_w u; + short e[8]; + int i; + + s1.x = _mm_set_epi32 (2134, -128, 655366, 9999); + s2.x = _mm_set_epi32 (41124, 234, 2, -800900); + u.x = test (s1.x, s2.x); + + for (i = 0; i < 4; i++) + { + if (s1.a[i] > 32767) + e[i] = 32767; + else if (s1.a[i] < -32768) + e[i] = -32768; + else + e[i] = s1.a[i]; + } + + for (i = 0; i < 4; i++) + { + if (s2.a[i] > 32767) + e[i+4] = 32767; + else if (s2.a[i] < -32768) + e[i+4] = -32768; + else + e[i+4] = s2.a[i]; + } + + if (check_union128i_w (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-packsswb-1.c b/gcc/testsuite/gcc.target/i386/sse2-packsswb-1.c new file mode 100644 index 0000000..76532fb --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-packsswb-1.c @@ -0,0 +1,57 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (__m128i s1, __m128i s2) +{ + return _mm_packs_epi16 (s1, s2); +} + +static void +TEST (void) +{ + union128i_w s1, s2; + union128i_b u; + char e[16]; + int i; + + s1.x = _mm_set_epi16 (2134, -128, 1234, 6354, 1002, 3004, 4050, 9999); + s2.x = _mm_set_epi16 (41124, 234, 2344, 2354, 607, 1, 2, -8009); + u.x = test (s1.x, s2.x); + + for (i = 0; i < 8; i++) + { + if (s1.a[i] > 127) + e[i] = 127; + else if (s1.a[i] < -128) + e[i] = -128; + else + e[i] = s1.a[i]; + } + + for (i = 0; i < 8; i++) + { + if (s2.a[i] > 127) + e[i+8] = 127; + else if (s2.a[i] < -128) + e[i+8] = -128; + else + e[i+8] = s2.a[i]; + } + + if (check_union128i_b (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-packuswb-1.c b/gcc/testsuite/gcc.target/i386/sse2-packuswb-1.c new file mode 100644 index 0000000..d176ac0 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-packuswb-1.c @@ -0,0 +1,48 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (__m128i s1, __m128i s2) +{ + return _mm_packus_epi16 (s1, s2); +} + +static void +TEST (void) +{ + union128i_w s1, s2; + union128i_ub u; + unsigned char e[16]; + int i, tmp; + + s1.x = _mm_set_epi16 (1, 2, 3, 4, -5, -6, -7, -8); + s2.x = _mm_set_epi16 (-9, -10, -11, -12, 13, 14, 15, 16); + u.x = test (s1.x, s2.x); + + for (i=0; i<8; i++) + { + tmp = s1.a[i]<0 ? 0 : s1.a[i]; + tmp = tmp>255 ? 255 : tmp; + e[i] = tmp; + + tmp = s2.a[i]<0 ? 0 : s2.a[i]; + tmp = tmp>255 ? 255 : tmp; + e[i+8] = tmp; + } + + if (check_union128i_ub (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-paddb-1.c b/gcc/testsuite/gcc.target/i386/sse2-paddb-1.c new file mode 100644 index 0000000..d9414ca --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-paddb-1.c @@ -0,0 +1,39 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (__m128i s1, __m128i s2) +{ + return _mm_add_epi8 (s1, s2); +} + +static void +TEST (void) +{ + union128i_b u, s1, s2; + char e[16]; + int i; + + s1.x = _mm_set_epi8 (1,2,3,4,10,20,30,90,-80,-40,-100,-15,98, 25, 98,7); + s2.x = _mm_set_epi8 (88, 44, 33, 22, 11, 98, 76, -100, -34, -78, -39, 6, 3, 4, 5, 119); + u.x = test (s1.x, s2.x); + + for (i = 0; i < 16; i++) + e[i] = s1.a[i] + s2.a[i]; + + if (check_union128i_b (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-paddd-1.c b/gcc/testsuite/gcc.target/i386/sse2-paddd-1.c new file mode 100644 index 0000000..c2d9b04 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-paddd-1.c @@ -0,0 +1,39 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (__m128i s1, __m128i s2) +{ + return _mm_add_epi32 (s1, s2); +} + +static void +TEST (void) +{ + union128i_d u, s1, s2; + int e[4]; + int i; + + s1.x = _mm_set_epi32 (30,90,-80,-40); + s2.x = _mm_set_epi32 (76, -100, -34, -78); + u.x = test (s1.x, s2.x); + + for (i = 0; i < 4; i++) + e[i] = s1.a[i] + s2.a[i]; + + if (check_union128i_d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-paddq-1.c b/gcc/testsuite/gcc.target/i386/sse2-paddq-1.c new file mode 100644 index 0000000..4867cb4 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-paddq-1.c @@ -0,0 +1,39 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (__m128i s1, __m128i s2) +{ + return _mm_add_epi64 (s1, s2); +} + +static void +TEST (void) +{ + union128i_q u, s1, s2; + long long e[2]; + int i; + + s1.x = _mm_set_epi64x (90,-80); + s2.x = _mm_set_epi64x (76, -100); + u.x = test (s1.x, s2.x); + + for (i = 0; i < 2; i++) + e[i] = s1.a[i] + s2.a[i]; + + if (check_union128i_q (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-paddsb-1.c b/gcc/testsuite/gcc.target/i386/sse2-paddsb-1.c new file mode 100644 index 0000000..bb3bafc --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-paddsb-1.c @@ -0,0 +1,48 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (__m128i s1, __m128i s2) +{ + return _mm_adds_epi8 (s1, s2); +} + +static void +TEST (void) +{ + union128i_b u, s1, s2; + char e[16]; + int i, tmp; + + s1.x = _mm_set_epi8 (1,2,3,4,10,20,30,90,-80,-40,-100,-15,98, 25, 98,7); + s2.x = _mm_set_epi8 (88, 44, 33, 22, 11, 98, 76, -100, -34, -78, -39, 6, 3, 4, 5, 119); + u.x = test (s1.x, s2.x); + + for (i = 0; i < 16; i++) + { + tmp = s1.a[i] + s2.a[i]; + + if (tmp > 127) + tmp = 127; + if (tmp < -128) + tmp = -128; + + e[i] = tmp; + } + + if (check_union128i_b (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-paddsw-1.c b/gcc/testsuite/gcc.target/i386/sse2-paddsw-1.c new file mode 100644 index 0000000..885ed26 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-paddsw-1.c @@ -0,0 +1,48 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (__m128i s1, __m128i s2) +{ + return _mm_adds_epi16 (s1, s2); +} + +static void +TEST (void) +{ + union128i_w u, s1, s2; + short e[8]; + int i, tmp; + + s1.x = _mm_set_epi16 (10,20,30,90,-80,-40,-100,-15); + s2.x = _mm_set_epi16 (11, 98, 76, -100, -34, -78, -39, 14); + u.x = test (s1.x, s2.x); + + for (i = 0; i < 8; i++) + { + tmp = s1.a[i] + s2.a[i]; + + if (tmp > 32767) + tmp = 32767; + if (tmp < -32768) + tmp = -32768; + + e[i] = tmp; + } + + if (check_union128i_w (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-paddusb-1.c b/gcc/testsuite/gcc.target/i386/sse2-paddusb-1.c new file mode 100644 index 0000000..ee1f038 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-paddusb-1.c @@ -0,0 +1,48 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (__m128i s1, __m128i s2) +{ + return _mm_adds_epu8 (s1, s2); +} + +static void +TEST (void) +{ + union128i_b u, s1, s2; + char e[16] = {0}; + int i, tmp; + + s1.x = _mm_set_epi8 (30, 2, 3, 4, 10, 20, 30, 90, 80, 40, 100, 15, 98, 25, 98, 7); + s2.x = _mm_set_epi8 (88, 44, 33, 22, 11, 98, 76, 100, 34, 78, 39, 6, 3, 4, 5, 119); + u.x = test (s1.x, s2.x); + + for (i = 0; i < 16; i++) + { + tmp = s1.a[i] + s2.a[i]; + + if (tmp > 255) + tmp = -1; + if (tmp < 0) + tmp = 0; + + e[i] = tmp; + } + + if (check_union128i_b (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-paddusw-1.c b/gcc/testsuite/gcc.target/i386/sse2-paddusw-1.c new file mode 100644 index 0000000..449d141 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-paddusw-1.c @@ -0,0 +1,49 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (__m128i s1, __m128i s2) +{ + return _mm_adds_epu16 (s1, s2); +} + +static void +TEST (void) +{ + union128i_w u, s1, s2; + short e[8]; + int i, tmp; + + s1.x = _mm_set_epi16 (10,20,30,90,80,40,100,15); + s2.x = _mm_set_epi16 (11, 98, 76, 100, 34, 78, 39, 14); + u.x = test (s1.x, s2.x); + + for (i = 0; i < 8; i++) + { + tmp = s1.a[i] + s2.a[i]; + + if (tmp > 65535) + tmp = -1; + + if (tmp < 0) + tmp = 0; + + e[i] = tmp; + } + + if (check_union128i_w (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-paddw-1.c b/gcc/testsuite/gcc.target/i386/sse2-paddw-1.c new file mode 100644 index 0000000..db1664f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-paddw-1.c @@ -0,0 +1,39 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (__m128i s1, __m128i s2) +{ + return _mm_add_epi16 (s1, s2); +} + +static void +TEST (void) +{ + union128i_w u, s1, s2; + short e[8]; + int i; + + s1.x = _mm_set_epi16 (10,20,30,90,-80,-40,-100,-15); + s2.x = _mm_set_epi16 (11, 98, 76, -100, -34, -78, -39, 14); + u.x = test (s1.x, s2.x); + + for (i = 0; i < 8; i++) + e[i] = s1.a[i] + s2.a[i]; + + if (check_union128i_w (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-pand-1.c b/gcc/testsuite/gcc.target/i386/sse2-pand-1.c new file mode 100644 index 0000000..cab3c1f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-pand-1.c @@ -0,0 +1,39 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (__m128i s1, __m128i s2) +{ + return _mm_and_si128 (s1, s2); +} + +static void +TEST (void) +{ + union128i_b u, s1, s2; + char e[16]; + int i; + + s1.x = _mm_set_epi8 (1,2,3,4,10,20,30,90,-80,-40,-100,-15,98, 25, 98,7); + s2.x = _mm_set_epi8 (88, 44, 33, 22, 11, 98, 76, -100, -34, -78, -39, 6, 3, 4, 5, 119); + u.x = test (s1.x, s2.x); + + for (i = 0; i < 16; i++) + e[i] = s1.a[i] & s2.a[i]; + + if (check_union128i_b (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-pandn-1.c b/gcc/testsuite/gcc.target/i386/sse2-pandn-1.c new file mode 100644 index 0000000..5a300c1 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-pandn-1.c @@ -0,0 +1,39 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (__m128i s1, __m128i s2) +{ + return _mm_andnot_si128 (s1, s2); +} + +static void +TEST (void) +{ + union128i_b u, s1, s2; + char e[16]; + int i; + + s1.x = _mm_set_epi8 (1,2,3,4,10,20,30,90,-80,-40,-100,-15,98, 25, 98,7); + s2.x = _mm_set_epi8 (88, 44, 33, 22, 11, 98, 76, -100, -34, -78, -39, 6, 3, 4, 5, 119); + u.x = test (s1.x, s2.x); + + for (i = 0; i < 16; i++) + e[i] = (~s1.a[i]) & s2.a[i]; + + if (check_union128i_b (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-pavgb-1.c b/gcc/testsuite/gcc.target/i386/sse2-pavgb-1.c new file mode 100644 index 0000000..cb80431c --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-pavgb-1.c @@ -0,0 +1,39 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (__m128i s1, __m128i s2) +{ + return _mm_avg_epu8 (s1, s2); +} + +static void +TEST (void) +{ + union128i_ub u, s1, s2; + unsigned char e[16]; + int i; + + s1.x = _mm_set_epi8 (1,2,3,4,10,20,30,90,80,40,100,15,98, 25, 98,7); + s2.x = _mm_set_epi8 (88, 44, 33, 22, 11, 98, 76, 100, 34, 78, 39, 6, 3, 4, 5, 119); + u.x = test (s1.x, s2.x); + + for (i = 0; i < 16; i++) + e[i] = (s1.a[i] + s2.a[i]+1)>>1; + + if (check_union128i_ub (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-pavgw-1.c b/gcc/testsuite/gcc.target/i386/sse2-pavgw-1.c new file mode 100644 index 0000000..341e5af --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-pavgw-1.c @@ -0,0 +1,39 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (__m128i s1, __m128i s2) +{ + return _mm_avg_epu16 (s1, s2); +} + +static void +TEST (void) +{ + union128i_uw u, s1, s2; + unsigned short e[8]; + int i; + + s1.x = _mm_set_epi16 (10,20,30,90,80,40,100,15); + s2.x = _mm_set_epi16 (11, 98, 76, 100, 34, 78, 39, 14); + u.x = test (s1.x, s2.x); + + for (i = 0; i < 8; i++) + e[i] = (s1.a[i] + s2.a[i]+1)>>1; + + if (check_union128i_uw (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-pcmpeqb-1.c b/gcc/testsuite/gcc.target/i386/sse2-pcmpeqb-1.c new file mode 100644 index 0000000..240fa0d --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-pcmpeqb-1.c @@ -0,0 +1,39 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (__m128i s1, __m128i s2) +{ + return _mm_cmpeq_epi8 (s1, s2); +} + +static void +TEST (void) +{ + union128i_b u, s1, s2; + char e[16]; + int i; + + s1.x = _mm_set_epi8 (1,2,3,4,10,20,30,90,80,40,100,15,98, 25, 98,7); + s2.x = _mm_set_epi8 (88, 44, 33, 22, 11, 98, 76, 100, 34, 78, 39, 6, 3, 4, 5, 119); + u.x = test (s1.x, s2.x); + + for (i = 0; i < 16; i++) + e[i] = (s1.a[i] == s2.a[i]) ? -1:0; + + if (check_union128i_b (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-pcmpeqd-1.c b/gcc/testsuite/gcc.target/i386/sse2-pcmpeqd-1.c new file mode 100644 index 0000000..cb18d11 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-pcmpeqd-1.c @@ -0,0 +1,39 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (__m128i s1, __m128i s2) +{ + return _mm_cmpeq_epi32 (s1, s2); +} + +static void +TEST (void) +{ + union128i_d u, s1, s2; + int e[4]; + int i; + + s1.x = _mm_set_epi32 (98, 25, 98,7); + s2.x = _mm_set_epi32 (88, 44, 33, 229); + u.x = test (s1.x, s2.x); + + for (i = 0; i < 4; i++) + e[i] = (s1.a[i] == s2.a[i]) ? -1:0; + + if (check_union128i_d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-pcmpeqw-1.c b/gcc/testsuite/gcc.target/i386/sse2-pcmpeqw-1.c new file mode 100644 index 0000000..e87e9b1 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-pcmpeqw-1.c @@ -0,0 +1,39 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (__m128i s1, __m128i s2) +{ + return _mm_cmpeq_epi16 (s1, s2); +} + +static void +TEST (void) +{ + union128i_w u, s1, s2; + short e[8]; + int i; + + s1.x = _mm_set_epi16 (20,30,90,80,40,100,15,98); + s2.x = _mm_set_epi16 (34, 78, 39, 6, 3, 4, 5, 119); + u.x = test (s1.x, s2.x); + + for (i = 0; i < 8; i++) + e[i] = (s1.a[i] == s2.a[i]) ? -1:0; + + if (check_union128i_w (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-pcmpgtb-1.c b/gcc/testsuite/gcc.target/i386/sse2-pcmpgtb-1.c new file mode 100644 index 0000000..916ec3c --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-pcmpgtb-1.c @@ -0,0 +1,39 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (__m128i s1, __m128i s2) +{ + return _mm_cmpgt_epi8 (s1, s2); +} + +static void +TEST (void) +{ + union128i_b u, s1, s2; + char e[16]; + int i; + + s1.x = _mm_set_epi8 (1,2,3,4,10,20,30,90,80,40,100,15,98, 25, 98,7); + s2.x = _mm_set_epi8 (88, 44, 33, 22, 11, 98, 76, 100, 34, 78, 39, 6, 3, 4, 5, 119); + u.x = test (s1.x, s2.x); + + for (i = 0; i < 16; i++) + e[i] = (s1.a[i] > s2.a[i]) ? -1:0; + + if (check_union128i_b (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-pcmpgtd-1.c b/gcc/testsuite/gcc.target/i386/sse2-pcmpgtd-1.c new file mode 100644 index 0000000..bba5eae --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-pcmpgtd-1.c @@ -0,0 +1,39 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (__m128i s1, __m128i s2) +{ + return _mm_cmpgt_epi32 (s1, s2); +} + +static void +TEST (void) +{ + union128i_d u, s1, s2; + int e[4]; + int i; + + s1.x = _mm_set_epi32 (98, 25, 98,7); + s2.x = _mm_set_epi32 (88, 44, 33, 229); + u.x = test (s1.x, s2.x); + + for (i = 0; i < 4; i++) + e[i] = (s1.a[i] > s2.a[i]) ? -1:0; + + if (check_union128i_d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-pcmpgtw-1.c b/gcc/testsuite/gcc.target/i386/sse2-pcmpgtw-1.c new file mode 100644 index 0000000..bfa58a9 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-pcmpgtw-1.c @@ -0,0 +1,39 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (__m128i s1, __m128i s2) +{ + return _mm_cmpgt_epi16 (s1, s2); +} + +static void +TEST (void) +{ + union128i_w u, s1, s2; + short e[8]; + int i; + + s1.x = _mm_set_epi16 (20,30,90,80,40,100,15,98); + s2.x = _mm_set_epi16 (34, 78, 39, 6, 3, 4, 5, 119); + u.x = test (s1.x, s2.x); + + for (i = 0; i < 8; i++) + e[i] = (s1.a[i] > s2.a[i]) ? -1:0; + + if (check_union128i_w (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-pmaddwd-1.c b/gcc/testsuite/gcc.target/i386/sse2-pmaddwd-1.c new file mode 100644 index 0000000..df1907a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-pmaddwd-1.c @@ -0,0 +1,40 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (__m128i s1, __m128i s2) +{ + return _mm_madd_epi16 (s1, s2); +} + +static void +TEST (void) +{ + union128i_w s1, s2; + union128i_d u; + int e[4]; + int i; + + s1.x = _mm_set_epi16 (2134,3343,1234,6354, 1, 3, 4, 5); + s2.x = _mm_set_epi16 (41124,234,2344,2354,9, -1, -8, -10); + u.x = test (s1.x, s2.x); + + for (i = 0; i < 4; i++) + e[i] = (s1.a[i*2] * s2.a[i*2])+(s1.a[(i*2) + 1] * s2.a[(i*2) + 1]); + + if (check_union128i_d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-pmaxsw-1.c b/gcc/testsuite/gcc.target/i386/sse2-pmaxsw-1.c new file mode 100644 index 0000000..b07fcb6 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-pmaxsw-1.c @@ -0,0 +1,39 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (__m128i s1, __m128i s2) +{ + return _mm_max_epi16 (s1, s2); +} + +static void +TEST (void) +{ + union128i_w u, s1, s2; + short e[8]; + int i; + + s1.x = _mm_set_epi16 (1,2,3,4,5,6,7,8); + s2.x = _mm_set_epi16 (8,7,6,5,4,3,2,1); + u.x = test (s1.x, s2.x); + + for (i=0; i<8; i++) + e[i] = s1.a[i]>s2.a[i]?s1.a[i]:s2.a[i]; + + if (check_union128i_w (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-pmaxub-1.c b/gcc/testsuite/gcc.target/i386/sse2-pmaxub-1.c new file mode 100644 index 0000000..e5eafc1 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-pmaxub-1.c @@ -0,0 +1,39 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (__m128i s1, __m128i s2) +{ + return _mm_max_epu8 (s1, s2); +} + +static void +TEST (void) +{ + union128i_ub u, s1, s2; + unsigned char e[16]; + int i; + + s1.x = _mm_set_epi8 (1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16); + s2.x = _mm_set_epi8 (16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1); + u.x = test (s1.x, s2.x); + + for (i=0; i<16; i++) + e[i] = s1.a[i]>s2.a[i]?s1.a[i]:s2.a[i]; + + if (check_union128i_ub (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-pminsw-1.c b/gcc/testsuite/gcc.target/i386/sse2-pminsw-1.c new file mode 100644 index 0000000..ad26ca9 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-pminsw-1.c @@ -0,0 +1,39 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (__m128i s1, __m128i s2) +{ + return _mm_min_epi16 (s1, s2); +} + +static void +TEST (void) +{ + union128i_w u, s1, s2; + short e[8]; + int i; + + s1.x = _mm_set_epi16 (1,2,3,4,5,6,7,8); + s2.x = _mm_set_epi16 (8,7,6,5,4,3,2,1); + u.x = test (s1.x, s2.x); + + for (i=0; i<8; i++) + e[i] = s1.a[i] + +static __m128i +__attribute__((noinline, unused)) +test (__m128i s1, __m128i s2) +{ + return _mm_min_epu8 (s1, s2); +} + +static void +TEST (void) +{ + union128i_ub u, s1, s2; + unsigned char e[16]; + int i; + + s1.x = _mm_set_epi8 (1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16); + s2.x = _mm_set_epi8 (16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1); + u.x = test (s1.x, s2.x); + + for (i=0; i<16; i++) + e[i] = s1.a[i] + +static int +__attribute__((noinline, unused)) +test (__m128i s1) +{ + return _mm_movemask_epi8 (s1); +} + +static void +TEST (void) +{ + union128i_b s1; + int i, u, e=0; + + s1.x = _mm_set_epi8 (1,2,3,4,10,20,30,90,-80,-40,-100,-15,98, 25, 98,7); + u = test (s1.x); + + for (i = 0; i < 16; i++) + if (s1.a[i] & (1<<7)) + e = e | (1< + +static __m128i +__attribute__((noinline, unused)) +test (__m128i s1, __m128i s2) +{ + return _mm_mulhi_epu16 (s1, s2); +} + +static void +TEST (void) +{ + union128i_uw u, s1, s2; + unsigned short e[8]; + int i, tmp; + + s1.x = _mm_set_epi16 (10,2067,3033,90,80,40,1000,15); + s2.x = _mm_set_epi16 (11, 9834, 7444, 10222, 34, 7833, 39, 14); + u.x = test (s1.x, s2.x); + + for (i = 0; i < 8; i++) + { + tmp = s1.a[i] * s2.a[i]; + + e[i] = (tmp & 0xffff0000)>>16; + } + + if (check_union128i_uw (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-pmulhw-1.c b/gcc/testsuite/gcc.target/i386/sse2-pmulhw-1.c new file mode 100644 index 0000000..447b5ca --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-pmulhw-1.c @@ -0,0 +1,43 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (__m128i s1, __m128i s2) +{ + return _mm_mulhi_epi16 (s1, s2); +} + +static void +TEST (void) +{ + union128i_w u, s1, s2; + short e[8]; + int i, tmp; + + s1.x = _mm_set_epi16 (10,2067,-3033,90,80,40,-1000,15); + s2.x = _mm_set_epi16 (11, 9834, 7444, -10222, 34, -7833, 39, 14); + u.x = test (s1.x, s2.x); + + for (i = 0; i < 8; i++) + { + tmp = s1.a[i] * s2.a[i]; + + e[i] = (tmp & 0xffff0000)>>16; + } + + if (check_union128i_w (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-pmullw-1.c b/gcc/testsuite/gcc.target/i386/sse2-pmullw-1.c new file mode 100644 index 0000000..a68d065 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-pmullw-1.c @@ -0,0 +1,43 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (__m128i s1, __m128i s2) +{ + return _mm_mullo_epi16 (s1, s2); +} + +static void +TEST (void) +{ + union128i_w u, s1, s2; + short e[8]; + int i, tmp; + + s1.x = _mm_set_epi16 (10,2067,-3033,90,80,40,-1000,15); + s2.x = _mm_set_epi16 (11, 9834, 7444, -10222, 34, -7833, 39, 14); + u.x = test (s1.x, s2.x); + + for (i = 0; i < 8; i++) + { + tmp = s1.a[i] * s2.a[i]; + + e[i] = tmp; + } + + if (check_union128i_w (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-pmuludq-1.c b/gcc/testsuite/gcc.target/i386/sse2-pmuludq-1.c new file mode 100644 index 0000000..dac14ef --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-pmuludq-1.c @@ -0,0 +1,39 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (__m128i s1, __m128i s2) +{ + return _mm_mul_epu32 (s1, s2); +} + +static void +TEST (void) +{ + union128i_d s1, s2; + union128i_q u; + long long e[2]; + + s1.x = _mm_set_epi32 (10,2067,3033,905); + s2.x = _mm_set_epi32 (11, 9834, 7444, 10222); + u.x = test (s1.x, s2.x); + + e[0] = s1.a[0] * s2.a[0]; + e[1] = s1.a[2] * s2.a[2]; + + if (check_union128i_q (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-por-1.c b/gcc/testsuite/gcc.target/i386/sse2-por-1.c new file mode 100644 index 0000000..7c332ed --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-por-1.c @@ -0,0 +1,41 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (__m128i s1, __m128i s2) +{ + return _mm_or_si128 (s1, s2); +} + +static void +TEST (void) +{ + union128i_w u, s1, s2; + short e[8]; + int i; + + s1.x = _mm_set_epi16 (10,20,30,90,-80,-40,-100,-15); + s2.x = _mm_set_epi16 (11, 98, 76, -100, -34, -78, -39, 14); + u.x = test (s1.x, s2.x); + + for (i = 0; i < 8; i++) + { + e[i] = s1.a[i] | s2.a[i]; + } + + if (check_union128i_w (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-psadbw-1.c b/gcc/testsuite/gcc.target/i386/sse2-psadbw-1.c new file mode 100644 index 0000000..c5fa0b2 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-psadbw-1.c @@ -0,0 +1,48 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (__m128i s1, __m128i s2) +{ + return _mm_sad_epu8 (s1, s2); +} + +static void +TEST (void) +{ + union128i_ub s1, s2; + union128i_w u; + short e[8] = {0}; + unsigned char tmp[16]; + int i; + + s1.x = _mm_set_epi8 (1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16); + s2.x = _mm_set_epi8 (16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1); + u.x = test (s1.x, s2.x); + + for (i = 0; i < 16; i++) + tmp [i] = __builtin_abs (s1.a[i] - s2.a[i]); + + for (i = 0; i < 8; i++) + e[0] += tmp[i]; + + for (i = 8; i < 16; i++) + e[4] += tmp[i]; + + + if (check_union128i_w (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-pshufd-1.c b/gcc/testsuite/gcc.target/i386/sse2-pshufd-1.c new file mode 100644 index 0000000..b106283 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-pshufd-1.c @@ -0,0 +1,40 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#define N 0xec + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (__m128i s1) +{ + return _mm_shuffle_epi32 (s1, N); +} + +static void +TEST (void) +{ + union128i_d u, s1; + int e[4] = {0}; + int i; + + s1.x = _mm_set_epi32 (16,15,14,13); + u.x = test (s1.x); + + for (i = 0; i < 4; i++) + e[i] = s1.a[((N & (0x3<<(2*i)))>>(2*i))]; + + if (check_union128i_d(u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-pshufhw-1.c b/gcc/testsuite/gcc.target/i386/sse2-pshufhw-1.c new file mode 100644 index 0000000..4eec55d --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-pshufhw-1.c @@ -0,0 +1,49 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#define N 0xec + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (__m128i s1) +{ + return _mm_shufflehi_epi16 (s1, N); +} + +static void +TEST (void) +{ + union128i_q s1; + union128i_w u; + short e[8] = {0}; + int i; + int m1[4] = {0x3, 0x3<<2, 0x3<<4, 0x3<<6}; + int m2[4]; + + s1.x = _mm_set_epi64x (0xabcde,0xef58a234); + u.x = test (s1.x); + + for (i = 0; i < 4; i++) + e[i] = (s1.a[0]>>(16 * i)) & 0xffff; + + for (i = 0; i < 4; i++) + m2[i] = (N & m1[i])>>(2*i); + + for (i = 0; i < 4; i++) + e[i+4] = (s1.a[1] >> (16 * m2[i])) & 0xffff; + + if (check_union128i_w(u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-pshuflw-1.c b/gcc/testsuite/gcc.target/i386/sse2-pshuflw-1.c new file mode 100644 index 0000000..3749625 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-pshuflw-1.c @@ -0,0 +1,49 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#define N 0xec + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (__m128i s1) +{ + return _mm_shufflelo_epi16 (s1, N); +} + +static void +TEST (void) +{ + union128i_q s1; + union128i_w u; + short e[8] = {0}; + int i; + int m1[4] = {0x3, 0x3<<2, 0x3<<4, 0x3<<6}; + int m2[4]; + + s1.x = _mm_set_epi64x (0xabcde,0xef58a234); + u.x = test (s1.x); + + for (i = 0; i < 4; i++) + e[i+4] = (s1.a[1]>>(16 * i)) & 0xffff; + + for (i = 0; i < 4; i++) + m2[i] = (N & m1[i])>>(2*i); + + for (i = 0; i < 4; i++) + e[i] = (s1.a[0] >> (16 * m2[i])) & 0xffff; + + if (check_union128i_w(u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-pslld-1.c b/gcc/testsuite/gcc.target/i386/sse2-pslld-1.c new file mode 100644 index 0000000..4fbde24 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-pslld-1.c @@ -0,0 +1,42 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#define N 0xf + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (__m128i s1) +{ + return _mm_slli_epi32 (s1, N); +} + +static void +TEST (void) +{ + union128i_d u, s; + int e[4] = {0}; + int i; + + s.x = _mm_set_epi32 (1, -2, 3, 4); + + u.x = test (s.x); + + if (N < 32) + for (i = 0; i < 4; i++) + e[i] = s.a[i] << N; + + if (check_union128i_d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-pslld-2.c b/gcc/testsuite/gcc.target/i386/sse2-pslld-2.c new file mode 100644 index 0000000..adef576 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-pslld-2.c @@ -0,0 +1,42 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (__m128i s1, __m128i c) +{ + return _mm_sll_epi32 (s1, c); +} + +static void +TEST (void) +{ + union128i_d u, s; + union128i_q c; + int e[4] = {0}; + int i; + + s.x = _mm_set_epi32 (2, -3, 0x7000, 0x9000); + c.x = _mm_set_epi64x (12, 23); + + u.x = test (s.x, c.x); + + if (c.a[0] < 32) + for (i = 0; i < 4; i++) + e[i] = s.a[i] << c.a[0]; + + if (check_union128i_d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-pslldq-1.c b/gcc/testsuite/gcc.target/i386/sse2-pslldq-1.c new file mode 100644 index 0000000..3189106 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-pslldq-1.c @@ -0,0 +1,42 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#define N 0x5 + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (__m128i s1) +{ + return _mm_slli_si128 (s1, N); +} + +static void +TEST (void) +{ + union128i_b u, s; + char src[16] = {1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16}; + char e[16] = {0}; + int i; + + s.x = _mm_loadu_si128 ((__m128i *)src); + + u.x = test (s.x); + + for (i = 0; i < 16-N; i++) + e[i+N] = src[i]; + + if (check_union128i_b (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-psllq-1.c b/gcc/testsuite/gcc.target/i386/sse2-psllq-1.c new file mode 100644 index 0000000..cd916eb --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-psllq-1.c @@ -0,0 +1,42 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#define N 60 + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (__m128i s1) +{ + return _mm_slli_epi64 (s1, N); +} + +static void +TEST (void) +{ + union128i_q u, s; + long long e[2] = {0}; + int i; + + s.x = _mm_set_epi64x (-1, 0xf); + + u.x = test (s.x); + + if (N < 64) + for (i = 0; i < 2; i++) + e[i] = s.a[i] << N; + + if (check_union128i_q (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-psllq-2.c b/gcc/testsuite/gcc.target/i386/sse2-psllq-2.c new file mode 100644 index 0000000..b20e872 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-psllq-2.c @@ -0,0 +1,41 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (__m128i s1, __m128i c) +{ + return _mm_sll_epi64 (s1, c); +} + +static void +TEST (void) +{ + union128i_q u, s, c; + long long e[2] = {0}; + int i; + + s.x = _mm_set_epi64x (-1, 0xf); + c.x = _mm_set_epi64x (60,50); + + u.x = test (s.x, c.x); + + if (c.a[0] < 64) + for (i = 0; i < 2; i++) + e[i] = s.a[i] << c.a[0]; + + if (check_union128i_q (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-psllw-1.c b/gcc/testsuite/gcc.target/i386/sse2-psllw-1.c new file mode 100644 index 0000000..1fc5aa4 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-psllw-1.c @@ -0,0 +1,42 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#define N 0xb + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (__m128i s1) +{ + return _mm_slli_epi16 (s1, N); +} + +static void +TEST (void) +{ + union128i_w u, s; + short e[8] = {0}; + int i; + + s.x = _mm_set_epi16 (1, 2, 3, 4, 5, 6, 0x7000, 0x9000); + + u.x = test (s.x); + + if (N < 16) + for (i = 0; i < 8; i++) + e[i] = s.a[i] << N; + + if (check_union128i_w (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-psllw-2.c b/gcc/testsuite/gcc.target/i386/sse2-psllw-2.c new file mode 100644 index 0000000..22a54b6 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-psllw-2.c @@ -0,0 +1,42 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (__m128i s1, __m128i c) +{ + return _mm_sll_epi16 (s1, c); +} + +static void +TEST (void) +{ + union128i_w u, s; + union128i_q c; + short e[8] = {0}; + int i; + + s.x = _mm_set_epi16 (1, 2, 3, 4, 5, 6, 0x7000, 0x9000); + c.x = _mm_set_epi64x (12, 13); + + u.x = test (s.x, c.x); + + if (c.a[0] < 16) + for (i = 0; i < 8; i++) + e[i] = s.a[i] << c.a[0]; + + if (check_union128i_w (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-psrad-1.c b/gcc/testsuite/gcc.target/i386/sse2-psrad-1.c new file mode 100644 index 0000000..37091ba --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-psrad-1.c @@ -0,0 +1,42 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#define N 0xf + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (__m128i s1) +{ + return _mm_srai_epi32 (s1, N); +} + +static void +TEST (void) +{ + union128i_d u, s; + int e[4] = {0}; + int i; + + s.x = _mm_set_epi32 (1, -2, 3, 4); + + u.x = test (s.x); + + if (N < 32) + for (i = 0; i < 4; i++) + e[i] = s.a[i] >> N; + + if (check_union128i_d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-psrad-2.c b/gcc/testsuite/gcc.target/i386/sse2-psrad-2.c new file mode 100644 index 0000000..dc24a0f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-psrad-2.c @@ -0,0 +1,42 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (__m128i s1, __m128i count) +{ + return _mm_sra_epi32 (s1, count); +} + +static void +TEST (void) +{ + union128i_d u, s; + union128i_q c; + int e[4] = {0}; + int i; + + s.x = _mm_set_epi32 (1, -2, 3, 4); + c.x = _mm_set_epi64x (16, 29); + + u.x = test (s.x, c.x); + + if (c.a[0] < 32) + for (i = 0; i < 4; i++) + e[i] = s.a[i] >> c.a[0]; + + if (check_union128i_d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-psraw-1.c b/gcc/testsuite/gcc.target/i386/sse2-psraw-1.c new file mode 100644 index 0000000..3e0d88f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-psraw-1.c @@ -0,0 +1,42 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#define N 0xb + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (__m128i s1) +{ + return _mm_srai_epi16 (s1, N); +} + +static void +TEST (void) +{ + union128i_w u, s; + short e[8] = {0}; + int i; + + s.x = _mm_set_epi16 (1, -2, 3, 4, -5, 6, 0x7000, 0x9000); + + u.x = test (s.x); + + if (N < 16) + for (i = 0; i < 8; i++) + e[i] = s.a[i] >> N; + + if (check_union128i_w (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-psraw-2.c b/gcc/testsuite/gcc.target/i386/sse2-psraw-2.c new file mode 100644 index 0000000..c3823eb --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-psraw-2.c @@ -0,0 +1,42 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (__m128i s1, __m128i c) +{ + return _mm_sra_epi16 (s1, c); +} + +static void +TEST (void) +{ + union128i_w u, s; + union128i_q c; + short e[8] = {0}; + int i; + + s.x = _mm_set_epi16 (1, -2, 3, 4, 5, 6, -0x7000, 0x9000); + c.x = _mm_set_epi64x (12, 13); + + u.x = test (s.x, c.x); + + if (c.a[0] < 16) + for (i = 0; i < 8; i++) + e[i] = s.a[i] >> c.a[0]; + + if (check_union128i_w (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-psrld-1.c b/gcc/testsuite/gcc.target/i386/sse2-psrld-1.c new file mode 100644 index 0000000..0e57731 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-psrld-1.c @@ -0,0 +1,45 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#define N 0xf + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (__m128i s1) +{ + return _mm_srli_epi32 (s1, N); +} + +static void +TEST (void) +{ + union128i_d u, s; + int e[4] = {0}; + unsigned int tmp; + int i; + + s.x = _mm_set_epi32 (1, -2, 3, 4); + + u.x = test (s.x); + + if (N < 32) + for (i = 0; i < 4; i++) { + tmp = s.a[i]; + e[i] = tmp >> N; + } + + if (check_union128i_d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-psrld-2.c b/gcc/testsuite/gcc.target/i386/sse2-psrld-2.c new file mode 100644 index 0000000..0270d92 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-psrld-2.c @@ -0,0 +1,45 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (__m128i s1, __m128i c) +{ + return _mm_srl_epi32 (s1, c); +} + +static void +TEST (void) +{ + union128i_d u, s; + union128i_q c; + int e[4] = {0}; + unsigned int tmp; + int i; + + s.x = _mm_set_epi32 (2, -3, 0x7000, 0x9000); + c.x = _mm_set_epi64x (12, 23); + + u.x = test (s.x, c.x); + + if (c.a[0] < 32) + for (i = 0; i < 4; i++) { + tmp = s.a[i]; + e[i] = tmp >> c.a[0]; + } + + if (check_union128i_d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-psrldq-1.c b/gcc/testsuite/gcc.target/i386/sse2-psrldq-1.c new file mode 100644 index 0000000..7513191 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-psrldq-1.c @@ -0,0 +1,42 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#define N 0x5 + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (__m128i s1) +{ + return _mm_srli_si128 (s1, N); +} + +static void +TEST (void) +{ + union128i_b u, s; + char src[16] = {1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16}; + char e[16] = {0}; + int i; + + s.x = _mm_loadu_si128 ((__m128i *)src); + + u.x = test (s.x); + + for (i = 0; i < 16-N; i++) + e[i] = src[i+N]; + + if (check_union128i_b (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-psrlq-1.c b/gcc/testsuite/gcc.target/i386/sse2-psrlq-1.c new file mode 100644 index 0000000..9c1ce5e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-psrlq-1.c @@ -0,0 +1,45 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#define N 60 + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (__m128i s1) +{ + return _mm_srli_epi64 (s1, N); +} + +static void +TEST (void) +{ + union128i_q u, s; + long long e[2] = {0}; + unsigned long long tmp; + int i; + + s.x = _mm_set_epi64x (-1, 0xf); + + u.x = test (s.x); + + if (N < 64) + for (i = 0; i < 2; i++) { + tmp = s.a[i]; + e[i] = tmp >> N; + } + + if (check_union128i_q (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-psrlq-2.c b/gcc/testsuite/gcc.target/i386/sse2-psrlq-2.c new file mode 100644 index 0000000..8c65940 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-psrlq-2.c @@ -0,0 +1,44 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (__m128i s1, __m128i c) +{ + return _mm_srl_epi64 (s1, c); +} + +static void +TEST (void) +{ + union128i_q u, s, c; + long long e[2] = {0}; + unsigned long long tmp; + int i; + + s.x = _mm_set_epi64x (-1, 0xf); + c.x = _mm_set_epi64x (60,50); + + u.x = test (s.x, c.x); + + if (c.a[0] < 64) + for (i = 0; i < 2; i++){ + tmp = s.a[i]; + e[i] =tmp >> c.a[0]; + } + + if (check_union128i_q (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-psrlw-1.c b/gcc/testsuite/gcc.target/i386/sse2-psrlw-1.c new file mode 100644 index 0000000..e5375f7 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-psrlw-1.c @@ -0,0 +1,46 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#define N 0xb + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (__m128i s1) +{ + return _mm_srli_epi16 (s1, N); +} + +static void +TEST (void) +{ + union128i_w u, s; + short e[8] = {0}; + unsigned short tmp; + int i; + + s.x = _mm_set_epi16 (1, -2, 3, -4, 5, 6, 0x7000, 0x9000); + + u.x = test (s.x); + + if (N < 16) + for (i = 0; i < 8; i++) + { + tmp = s.a[i]; + e[i] = tmp >> N; + } + + if (check_union128i_w (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-psrlw-2.c b/gcc/testsuite/gcc.target/i386/sse2-psrlw-2.c new file mode 100644 index 0000000..dbe6a68 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-psrlw-2.c @@ -0,0 +1,46 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (__m128i s1, __m128i c) +{ + return _mm_srl_epi16 (s1, c); +} + +static void +TEST (void) +{ + union128i_w u, s; + union128i_q c; + short e[8] = {0}; + unsigned short tmp; + int i; + + s.x = _mm_set_epi16 (1, -2, 3, 4, 5, 6, -0x7000, 0x9000); + c.x = _mm_set_epi64x (12, 13); + + u.x = test (s.x, c.x); + + if (c.a[0] < 16) + for (i = 0; i < 8; i++) + { + tmp = s.a[i]; + e[i] = tmp >> c.a[0]; + } + + if (check_union128i_w (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-psubb-1.c b/gcc/testsuite/gcc.target/i386/sse2-psubb-1.c new file mode 100644 index 0000000..a8d5b67d --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-psubb-1.c @@ -0,0 +1,39 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (__m128i s1, __m128i s2) +{ + return _mm_sub_epi8 (s1, s2); +} + +static void +TEST (void) +{ + union128i_b u, s1, s2; + char e[16]; + int i; + + s1.x = _mm_set_epi8 (1,2,3,4,10,20,30,90,-80,-40,-100,-15,98, 25, 98,7); + s2.x = _mm_set_epi8 (88, 44, 33, 22, 11, 98, 76, -100, -34, -78, -39, 6, 3, 4, 5, 119); + u.x = test (s1.x, s2.x); + + for (i = 0; i < 16; i++) + e[i] = s1.a[i] - s2.a[i]; + + if (check_union128i_b (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-psubd-1.c b/gcc/testsuite/gcc.target/i386/sse2-psubd-1.c new file mode 100644 index 0000000..296a261 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-psubd-1.c @@ -0,0 +1,39 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (__m128i s1, __m128i s2) +{ + return _mm_sub_epi32 (s1, s2); +} + +static void +TEST (void) +{ + union128i_d u, s1, s2; + int e[4]; + int i; + + s1.x = _mm_set_epi32 (30,90,-80,-40); + s2.x = _mm_set_epi32 (76, -100, -34, -78); + u.x = test (s1.x, s2.x); + + for (i = 0; i < 4; i++) + e[i] = s1.a[i] - s2.a[i]; + + if (check_union128i_d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-psubq-1.c b/gcc/testsuite/gcc.target/i386/sse2-psubq-1.c new file mode 100644 index 0000000..fe8c0f4 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-psubq-1.c @@ -0,0 +1,39 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (__m128i s1, __m128i s2) +{ + return _mm_sub_epi64 (s1, s2); +} + +static void +TEST (void) +{ + union128i_q u, s1, s2; + long long e[2]; + int i; + + s1.x = _mm_set_epi64x (90,-80); + s2.x = _mm_set_epi64x (76, -100); + u.x = test (s1.x, s2.x); + + for (i = 0; i < 2; i++) + e[i] = s1.a[i] - s2.a[i]; + + if (check_union128i_q (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-psubsb-1.c b/gcc/testsuite/gcc.target/i386/sse2-psubsb-1.c new file mode 100644 index 0000000..d9cb1af --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-psubsb-1.c @@ -0,0 +1,48 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (__m128i s1, __m128i s2) +{ + return _mm_subs_epi8 (s1, s2); +} + +static void +TEST (void) +{ + union128i_b u, s1, s2; + char e[16]; + int i, tmp; + + s1.x = _mm_set_epi8 (1,2,3,4,10,20,30,90,-80,-40,-100,-15,98, 25, 98,7); + s2.x = _mm_set_epi8 (88, 44, 33, 22, 11, 98, 76, -100, -34, -78, -39, 6, 3, 4, 5, 119); + u.x = test (s1.x, s2.x); + + for (i = 0; i < 16; i++) + { + tmp = s1.a[i] - s2.a[i]; + + if (tmp > 127) + tmp = 127; + if (tmp < -128) + tmp = -128; + + e[i] = tmp; + } + + if (check_union128i_b (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-psubsw-1.c b/gcc/testsuite/gcc.target/i386/sse2-psubsw-1.c new file mode 100644 index 0000000..85fdbeb --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-psubsw-1.c @@ -0,0 +1,48 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (__m128i s1, __m128i s2) +{ + return _mm_subs_epi16 (s1, s2); +} + +static void +TEST (void) +{ + union128i_w u, s1, s2; + short e[8]; + int i, tmp; + + s1.x = _mm_set_epi16 (10,20,30,90,-80,-40,-100,-15); + s2.x = _mm_set_epi16 (11, 98, 76, -100, -34, -78, -39, 14); + u.x = test (s1.x, s2.x); + + for (i = 0; i < 8; i++) + { + tmp = s1.a[i] - s2.a[i]; + + if (tmp > 32767) + tmp = 32767; + if (tmp < -32768) + tmp = -32768; + + e[i] = tmp; + } + + if (check_union128i_w (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-psubw-1.c b/gcc/testsuite/gcc.target/i386/sse2-psubw-1.c new file mode 100644 index 0000000..e2d8be5 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-psubw-1.c @@ -0,0 +1,39 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (__m128i s1, __m128i s2) +{ + return _mm_sub_epi16 (s1, s2); +} + +static void +TEST (void) +{ + union128i_w u, s1, s2; + short e[8]; + int i; + + s1.x = _mm_set_epi16 (10,20,30,90,-80,-40,-100,-15); + s2.x = _mm_set_epi16 (11, 98, 76, -100, -34, -78, -39, 14); + u.x = test (s1.x, s2.x); + + for (i = 0; i < 8; i++) + e[i] = s1.a[i] - s2.a[i]; + + if (check_union128i_w (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-punpckhbw-1.c b/gcc/testsuite/gcc.target/i386/sse2-punpckhbw-1.c new file mode 100644 index 0000000..f673b0b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-punpckhbw-1.c @@ -0,0 +1,42 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (__m128i s1, __m128i s2) +{ + return _mm_unpackhi_epi8 (s1, s2); +} + +static void +TEST (void) +{ + union128i_b u, s1, s2; + char e[16]; + int i; + + s1.x = _mm_set_epi8 (1,2,3,4,10,20,30,90,-80,-40,-100,-15,98, 25, 98,7); + s2.x = _mm_set_epi8 (88, 44, 33, 22, 11, 98, 76, -100, -34, -78, -39, 6, 3, 4, 5, 119); + u.x = test (s1.x, s2.x); + + for (i = 0; i < 8; i++) + { + e[2*i] = s1.a[8+i]; + e[2*i + 1] = s2.a[8+i]; + } + + if (check_union128i_b (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-punpckhdq-1.c b/gcc/testsuite/gcc.target/i386/sse2-punpckhdq-1.c new file mode 100644 index 0000000..7fcef77 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-punpckhdq-1.c @@ -0,0 +1,42 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (__m128i s1, __m128i s2) +{ + return _mm_unpackhi_epi32 (s1, s2); +} + +static void +TEST (void) +{ + union128i_d u, s1, s2; + int e[4]; + int i; + + s1.x = _mm_set_epi32 (10,20,-80,-40); + s2.x = _mm_set_epi32 (11, -34, -78, -39); + u.x = test (s1.x, s2.x); + + for (i = 0; i < 2; i++) + { + e[2*i] = s1.a[2+i]; + e[2*i+1] = s2.a[2+i]; + } + + if (check_union128i_d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-punpckhqdq-1.c b/gcc/testsuite/gcc.target/i386/sse2-punpckhqdq-1.c new file mode 100644 index 0000000..4cb60d7 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-punpckhqdq-1.c @@ -0,0 +1,38 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (__m128i s1, __m128i s2) +{ + return _mm_unpackhi_epi64 (s1, s2); +} + +static void +TEST (void) +{ + union128i_q u, s1, s2; + long long e[2]; + + s1.x = _mm_set_epi64x (10,-40); + s2.x = _mm_set_epi64x (1134, -7839); + u.x = test (s1.x, s2.x); + + e[0] = s1.a[1]; + e[1] = s2.a[1]; + + if (check_union128i_q (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-punpckhwd-1.c b/gcc/testsuite/gcc.target/i386/sse2-punpckhwd-1.c new file mode 100644 index 0000000..1ba04e1 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-punpckhwd-1.c @@ -0,0 +1,42 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (__m128i s1, __m128i s2) +{ + return _mm_unpackhi_epi16 (s1, s2); +} + +static void +TEST (void) +{ + union128i_w u, s1, s2; + short e[8]; + int i; + + s1.x = _mm_set_epi16 (10,20,30,90,-80,-40,-100,-15); + s2.x = _mm_set_epi16 (11, 98, 76, -100, -34, -78, -39, 14); + u.x = test (s1.x, s2.x); + + for (i = 0; i < 4; i++) + { + e[2*i] = s1.a[4+i]; + e[2*i+1] = s2.a[4+i]; + } + + if (check_union128i_w (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-punpcklbw-1.c b/gcc/testsuite/gcc.target/i386/sse2-punpcklbw-1.c new file mode 100644 index 0000000..4e63885 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-punpcklbw-1.c @@ -0,0 +1,42 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (__m128i s1, __m128i s2) +{ + return _mm_unpacklo_epi8 (s1, s2); +} + +static void +TEST (void) +{ + union128i_b u, s1, s2; + char e[16]; + int i; + + s1.x = _mm_set_epi8 (1,2,3,4,10,20,30,90,-80,-40,-100,-15,98, 25, 98,7); + s2.x = _mm_set_epi8 (88, 44, 33, 22, 11, 98, 76, -100, -34, -78, -39, 6, 3, 4, 5, 119); + u.x = test (s1.x, s2.x); + + for (i = 0; i < 8; i++) + { + e[2*i] = s1.a[i]; + e[2*i + 1] = s2.a[i]; + } + + if (check_union128i_b (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-punpckldq-1.c b/gcc/testsuite/gcc.target/i386/sse2-punpckldq-1.c new file mode 100644 index 0000000..1e7b44f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-punpckldq-1.c @@ -0,0 +1,42 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (__m128i s1, __m128i s2) +{ + return _mm_unpacklo_epi32 (s1, s2); +} + +static void +TEST (void) +{ + union128i_d u, s1, s2; + int e[4]; + int i; + + s1.x = _mm_set_epi32 (10,20,-80,-40); + s2.x = _mm_set_epi32 (11, -34, -78, -39); + u.x = test (s1.x, s2.x); + + for (i = 0; i < 2; i++) + { + e[2*i] = s1.a[i]; + e[2*i+1] = s2.a[i]; + } + + if (check_union128i_d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-punpcklqdq-1.c b/gcc/testsuite/gcc.target/i386/sse2-punpcklqdq-1.c new file mode 100644 index 0000000..4f84ca1 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-punpcklqdq-1.c @@ -0,0 +1,38 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (__m128i s1, __m128i s2) +{ + return _mm_unpacklo_epi64 (s1, s2); +} + +static void +TEST (void) +{ + union128i_q u, s1, s2; + long long e[2]; + + s1.x = _mm_set_epi64x (10,-40); + s2.x = _mm_set_epi64x (1134, -7839); + u.x = test (s1.x, s2.x); + + e[0] = s1.a[0]; + e[1] = s2.a[0]; + + if (check_union128i_q (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-punpcklwd-1.c b/gcc/testsuite/gcc.target/i386/sse2-punpcklwd-1.c new file mode 100644 index 0000000..8ba26b3 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-punpcklwd-1.c @@ -0,0 +1,42 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (__m128i s1, __m128i s2) +{ + return _mm_unpacklo_epi16 (s1, s2); +} + +static void +TEST (void) +{ + union128i_w u, s1, s2; + short e[8]; + int i; + + s1.x = _mm_set_epi16 (10,20,30,90,-80,-40,-100,-15); + s2.x = _mm_set_epi16 (11, 98, 76, -100, -34, -78, -39, 14); + u.x = test (s1.x, s2.x); + + for (i = 0; i < 4; i++) + { + e[2*i] = s1.a[i]; + e[2*i+1] = s2.a[i]; + } + + if (check_union128i_w (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-pxor-1.c b/gcc/testsuite/gcc.target/i386/sse2-pxor-1.c new file mode 100644 index 0000000..7e06440 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-pxor-1.c @@ -0,0 +1,39 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128i +__attribute__((noinline, unused)) +test (__m128i s1, __m128i s2) +{ + return _mm_xor_si128 (s1, s2); +} + +static void +TEST (void) +{ + union128i_ub u, s1, s2; + unsigned char e[16] = {0}; + int i; + + s1.x = _mm_set_epi8 (1,2,3,4,10,20,30,90,80,40,100,15,98, 25, 98,7); + s2.x = _mm_set_epi8 (88, 44, 33, 22, 11, 98, 76, 100, 34, 78, 39, 6, 3, 4, 5, 119); + u.x = test (s1.x, s2.x); + + for (i = 0; i < 16; i++) + e[i] = s1.a[i] ^ s2.a[i]; + + if (check_union128i_ub (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-shufpd-1.c b/gcc/testsuite/gcc.target/i386/sse2-shufpd-1.c new file mode 100644 index 0000000..cffa469 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-shufpd-1.c @@ -0,0 +1,40 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#define N 0xab + +#include CHECK_H + +#include + +static __m128d +__attribute__((noinline, unused)) +test (__m128d s1, __m128d s2) +{ + return _mm_shuffle_pd (s1, s2, N); +} + +static void +TEST (void) +{ + union128d u, s1, s2; + double e[2] = {0.0}; + + s1.x = _mm_set_pd (2134.3343,1234.635654); + s2.x = _mm_set_pd (453.345635,54646.464356); + u.x = test (s1.x, s2.x); + + e[0] = (N & (1 << 0)) ? s1.a[1] : s1.a[0]; + e[1] = (N & (1 << 1)) ? s2.a[1] : s2.a[0]; + + if (check_union128d(u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-shufps-1.c b/gcc/testsuite/gcc.target/i386/sse2-shufps-1.c new file mode 100644 index 0000000..f1ef347 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-shufps-1.c @@ -0,0 +1,57 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#define MASK 0xab + +#include CHECK_H + +#include + +float select4(const float *src, unsigned int control) +{ + switch(control) { + case 0: + return src[0]; + case 1: + return src[1]; + case 2: + return src[2]; + case 3: + return src[3]; + } + return -1; +} + +static __m128 +__attribute__((noinline, unused)) +test (__m128 s1, __m128 s2) +{ + return _mm_shuffle_ps (s1, s2, MASK); +} + +static void +TEST (void) +{ + union128 u, s1, s2; + float e[4] = {0.0}; + + s1.x = _mm_set_ps (1.1, 1.2, 1.3, 1.4); + s2.x = _mm_set_ps (2.1, 2.2, 2.3, 2.4); + u.x = test (s1.x, s2.x); + + e[0] = select4(s1.a, (MASK >> 0) & 0x3); + e[1] = select4(s1.a, (MASK >> 2) & 0x3); + e[2] = select4(s2.a, (MASK >> 4) & 0x3); + e[3] = select4(s2.a, (MASK >> 6) & 0x3); + + if (check_union128(u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-sqrtpd-1.c b/gcc/testsuite/gcc.target/i386/sse2-sqrtpd-1.c new file mode 100644 index 0000000..3a476cf --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-sqrtpd-1.c @@ -0,0 +1,43 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include +#include + +static __m128d +__attribute__((noinline, unused)) +test (__m128d s1) +{ + return _mm_sqrt_pd (s1); +} + +static void +TEST (void) +{ + union128d u, s1; + double e[2]; + int i; + + s1.x = _mm_set_pd (2134.3343,1234.635654); + u.x = test (s1.x); + + for (i = 0; i < 2; i++) + { + __m128d tmp = _mm_load_sd (&s1.a[i]); + tmp = _mm_sqrt_sd (tmp, tmp); + _mm_store_sd (&e[i], tmp); + } + + if (check_union128d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-subpd-1.c b/gcc/testsuite/gcc.target/i386/sse2-subpd-1.c new file mode 100644 index 0000000..e8ac1b8 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-subpd-1.c @@ -0,0 +1,38 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128d +__attribute__((noinline, unused)) +test (__m128d s1, __m128d s2) +{ + return _mm_sub_pd (s1, s2); +} + +static void +TEST (void) +{ + union128d u, s1, s2; + double e[2]; + + s1.x = _mm_set_pd (2134.3343,1234.635654); + s2.x = _mm_set_pd (41124.234,2344.2354); + u.x = test (s1.x, s2.x); + + e[0] = s1.a[0] - s2.a[0]; + e[1] = s1.a[1] - s2.a[1]; + + if (check_union128d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-subsd-1.c b/gcc/testsuite/gcc.target/i386/sse2-subsd-1.c new file mode 100644 index 0000000..d70c3f8 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-subsd-1.c @@ -0,0 +1,38 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128d +__attribute__((noinline, unused)) +test (__m128d s1, __m128d s2) +{ + return _mm_sub_sd (s1, s2); +} + +static void +TEST (void) +{ + union128d u, s1, s2; + double e[2]; + + s1.x = _mm_set_pd (2134.3343,1234.635654); + s2.x = _mm_set_pd (41124.234,2344.2354); + u.x = test (s1.x, s2.x); + + e[0] = s1.a[0] - s2.a[0]; + e[1] = s1.a[1]; + + if (check_union128d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-ucomisd-1.c b/gcc/testsuite/gcc.target/i386/sse2-ucomisd-1.c new file mode 100644 index 0000000..deae8e7 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-ucomisd-1.c @@ -0,0 +1,37 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static int +__attribute__((noinline, unused)) +test (__m128d s1, __m128d s2) +{ + return _mm_ucomieq_sd (s1, s2); +} + +static void +TEST (void) +{ + union128d s1, s2; + int d[1]; + int e[1]; + + s1.x = _mm_set_pd (2134.3343,2344.2354); + s2.x = _mm_set_pd (41124.234,2344.2354); + d[0] = test (s1.x, s2.x); + e[0] = s1.a[0] == s2.a[0]; + + if (checkVi (d, e, 1)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-ucomisd-2.c b/gcc/testsuite/gcc.target/i386/sse2-ucomisd-2.c new file mode 100644 index 0000000..110f7cd --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-ucomisd-2.c @@ -0,0 +1,37 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static int +__attribute__((noinline, unused)) +test (__m128d s1, __m128d s2) +{ + return _mm_ucomilt_sd (s1, s2); +} + +static void +TEST (void) +{ + union128d s1, s2; + int d[1]; + int e[1]; + + s1.x = _mm_set_pd (2134.3343,12344.2354); + s2.x = _mm_set_pd (41124.234,2344.2354); + d[0] = test (s1.x, s2.x); + e[0] = s1.a[0] < s2.a[0]; + + if (checkVi (d, e, 1)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-ucomisd-3.c b/gcc/testsuite/gcc.target/i386/sse2-ucomisd-3.c new file mode 100644 index 0000000..1e3a1a6 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-ucomisd-3.c @@ -0,0 +1,37 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static int +__attribute__((noinline, unused)) +test (__m128d s1, __m128d s2) +{ + return _mm_ucomile_sd (s1, s2); +} + +static void +TEST (void) +{ + union128d s1, s2; + int d[1] = {0}; + int e[1] = {0}; + + s1.x = _mm_set_pd (2134.3343,12344.2354); + s2.x = _mm_set_pd (41124.234,2344.2354); + d[0] = test (s1.x, s2.x); + e[0] = s1.a[0] <= s2.a[0]; + + if (checkVi (d, e, 1)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-ucomisd-4.c b/gcc/testsuite/gcc.target/i386/sse2-ucomisd-4.c new file mode 100644 index 0000000..99c9aa2 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-ucomisd-4.c @@ -0,0 +1,37 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static int +__attribute__((noinline, unused)) +test (__m128d s1, __m128d s2) +{ + return _mm_ucomigt_sd (s1, s2); +} + +static void +TEST (void) +{ + union128d s1, s2; + int d[1]; + int e[1]; + + s1.x = _mm_set_pd (2134.3343,12344.2354); + s2.x = _mm_set_pd (41124.234,2344.2354); + d[0] = test (s1.x, s2.x); + e[0] = s1.a[0] > s2.a[0]; + + if (checkVi (d, e, 1)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-ucomisd-5.c b/gcc/testsuite/gcc.target/i386/sse2-ucomisd-5.c new file mode 100644 index 0000000..19a730a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-ucomisd-5.c @@ -0,0 +1,37 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static int +__attribute__((noinline, unused)) +test (__m128d s1, __m128d s2) +{ + return _mm_ucomige_sd (s1, s2); +} + +static void +TEST (void) +{ + union128d s1, s2; + int d[1]; + int e[1]; + + s1.x = _mm_set_pd (2134.3343,12344.2354); + s2.x = _mm_set_pd (41124.234,2344.2354); + d[0] = test (s1.x, s2.x); + e[0] = s1.a[0] >= s2.a[0]; + + if (checkVi (d, e, 1)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-ucomisd-6.c b/gcc/testsuite/gcc.target/i386/sse2-ucomisd-6.c new file mode 100644 index 0000000..dd5ed70 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-ucomisd-6.c @@ -0,0 +1,37 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static int +__attribute__((noinline, unused)) +test (__m128d s1, __m128d s2) +{ + return _mm_ucomineq_sd (s1, s2); +} + +static void +TEST (void) +{ + union128d s1, s2; + int d[1]; + int e[1]; + + s1.x = _mm_set_pd (2134.3343,12344.2354); + s2.x = _mm_set_pd (41124.234,2344.2354); + d[0] = test (s1.x, s2.x); + e[0] = s1.a[0] != s2.a[0]; + + if (checkVi (d, e, 1)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-unpckhpd-1.c b/gcc/testsuite/gcc.target/i386/sse2-unpckhpd-1.c new file mode 100644 index 0000000..a682725 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-unpckhpd-1.c @@ -0,0 +1,38 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128d +__attribute__((noinline, unused)) +test (__m128d s1, __m128d s2) +{ + return _mm_unpackhi_pd (s1, s2); +} + +static void +TEST (void) +{ + union128d u, s1, s2; + double e[2]; + + s1.x = _mm_set_pd (2134.3343,1234.635654); + s2.x = _mm_set_pd (41124.234,2344.2354); + u.x = test (s1.x, s2.x); + + e[0] = s1.a[1]; + e[1] = s2.a[1]; + + if (check_union128d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-unpcklpd-1.c b/gcc/testsuite/gcc.target/i386/sse2-unpcklpd-1.c new file mode 100644 index 0000000..0e4a5cc --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-unpcklpd-1.c @@ -0,0 +1,38 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128d +__attribute__((noinline, unused)) +test (__m128d s1, __m128d s2) +{ + return _mm_unpacklo_pd (s1, s2); +} + +static void +TEST (void) +{ + union128d u, s1, s2; + double e[2]; + + s1.x = _mm_set_pd (2134.3343,1234.635654); + s2.x = _mm_set_pd (41124.234,2344.2354); + u.x = test (s1.x, s2.x); + + e[0] = s1.a[0]; + e[1] = s2.a[0]; + + if (check_union128d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-xorpd-1.c b/gcc/testsuite/gcc.target/i386/sse2-xorpd-1.c new file mode 100644 index 0000000..88cf0d37 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-xorpd-1.c @@ -0,0 +1,48 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#ifndef CHECK_H +#define CHECK_H "sse2-check.h" +#endif + +#ifndef TEST +#define TEST sse2_test +#endif + +#include CHECK_H + +#include + +static __m128d +__attribute__((noinline, unused)) +test (__m128d s1, __m128d s2) +{ + return _mm_xor_pd (s1, s2); +} + +static void +TEST (void) +{ + union + { + double d[2]; + long long l[2]; + }source1, source2, e; + + union128d u, s1, s2; + int i; + + s1.x = _mm_set_pd (11.1321456, 2.287332); + s2.x = _mm_set_pd (3.37768, 4.43222234); + + _mm_storeu_pd (source1.d, s1.x); + _mm_storeu_pd (source2.d, s2.x); + + u.x = test (s1.x, s2.x); + + for (i = 0; i < 2; i++) + e.l[i] = source1.l[i] ^ source2.l[i]; + + if (check_union128d (u, e.d)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse3-addsubpd.c b/gcc/testsuite/gcc.target/i386/sse3-addsubpd.c index de5b14b..e82fa76 100644 --- a/gcc/testsuite/gcc.target/i386/sse3-addsubpd.c +++ b/gcc/testsuite/gcc.target/i386/sse3-addsubpd.c @@ -1,7 +1,15 @@ /* { dg-do run } */ /* { dg-options "-O2 -msse3 -mfpmath=sse" } */ -#include "sse3-check.h" +#ifndef CHECK_H +#define CHECK_H "sse3-check.h" +#endif + +#ifndef TEST +#define TEST sse3_test +#endif + +#include CHECK_H #include @@ -60,7 +68,7 @@ double vals[80] = }; static void -sse3_test (void) +TEST (void) { int i; int fail = 0; @@ -87,6 +95,4 @@ sse3_test (void) if (fail != 0) abort (); - - exit (0); } diff --git a/gcc/testsuite/gcc.target/i386/sse3-addsubps.c b/gcc/testsuite/gcc.target/i386/sse3-addsubps.c index 182fb5e..091b58c 100644 --- a/gcc/testsuite/gcc.target/i386/sse3-addsubps.c +++ b/gcc/testsuite/gcc.target/i386/sse3-addsubps.c @@ -1,7 +1,15 @@ /* { dg-do run } */ /* { dg-options "-O2 -msse3 -mfpmath=sse" } */ -#include "sse3-check.h" +#ifndef CHECK_H +#define CHECK_H "sse3-check.h" +#endif + +#ifndef TEST +#define TEST sse3_test +#endif + +#include CHECK_H #include @@ -60,7 +68,7 @@ static float vals[80] = }; static void -sse3_test (void) +TEST (void) { int i; int fail = 0; diff --git a/gcc/testsuite/gcc.target/i386/sse3-haddpd.c b/gcc/testsuite/gcc.target/i386/sse3-haddpd.c index d44db5e..8750ddf 100644 --- a/gcc/testsuite/gcc.target/i386/sse3-haddpd.c +++ b/gcc/testsuite/gcc.target/i386/sse3-haddpd.c @@ -1,8 +1,15 @@ /* { dg-do run } */ /* { dg-options "-O2 -msse3 -mfpmath=sse" } */ -#include "sse3-check.h" +#ifndef CHECK_H +#define CHECK_H "sse3-check.h" +#endif +#ifndef TEST +#define TEST sse3_test +#endif + +#include CHECK_H #include static void @@ -60,7 +67,7 @@ static double vals[80] = }; static void -sse3_test (void) +TEST (void) { int i; int fail = 0; diff --git a/gcc/testsuite/gcc.target/i386/sse3-haddps.c b/gcc/testsuite/gcc.target/i386/sse3-haddps.c index 1166049..dcb0a7c 100644 --- a/gcc/testsuite/gcc.target/i386/sse3-haddps.c +++ b/gcc/testsuite/gcc.target/i386/sse3-haddps.c @@ -1,7 +1,15 @@ /* { dg-do run } */ /* { dg-options "-O2 -msse3 -mfpmath=sse" } */ -#include "sse3-check.h" +#ifndef CHECK_H +#define CHECK_H "sse3-check.h" +#endif + +#ifndef TEST +#define TEST sse3_test +#endif + +#include CHECK_H #include @@ -60,7 +68,7 @@ static float vals[80] = }; static void -sse3_test () +TEST () { int i; int fail = 0; diff --git a/gcc/testsuite/gcc.target/i386/sse3-hsubpd.c b/gcc/testsuite/gcc.target/i386/sse3-hsubpd.c index 90053a1..77018f5 100644 --- a/gcc/testsuite/gcc.target/i386/sse3-hsubpd.c +++ b/gcc/testsuite/gcc.target/i386/sse3-hsubpd.c @@ -1,8 +1,15 @@ /* { dg-do run } */ /* { dg-options "-O2 -msse3 -mfpmath=sse" } */ -#include "sse3-check.h" +#ifndef CHECK_H +#define CHECK_H "sse3-check.h" +#endif +#ifndef TEST +#define TEST sse3_test +#endif + +#include CHECK_H #include static void @@ -60,7 +67,7 @@ static double vals[80] = }; static void -sse3_test (void) +TEST (void) { int i; int fail = 0; diff --git a/gcc/testsuite/gcc.target/i386/sse3-hsubps.c b/gcc/testsuite/gcc.target/i386/sse3-hsubps.c index aa1375a..326adfd 100644 --- a/gcc/testsuite/gcc.target/i386/sse3-hsubps.c +++ b/gcc/testsuite/gcc.target/i386/sse3-hsubps.c @@ -1,8 +1,15 @@ /* { dg-do run } */ /* { dg-options "-O2 -msse3 -mfpmath=sse" } */ -#include "sse3-check.h" +#ifndef CHECK_H +#define CHECK_H "sse3-check.h" +#endif +#ifndef TEST +#define TEST sse3_test +#endif + +#include CHECK_H #include static void @@ -62,7 +69,7 @@ static float vals[80] = }; static void -sse3_test (void) +TEST (void) { int i; int fail = 0; diff --git a/gcc/testsuite/gcc.target/i386/sse3-lddqu.c b/gcc/testsuite/gcc.target/i386/sse3-lddqu.c index d3dc094..5df19a6 100644 --- a/gcc/testsuite/gcc.target/i386/sse3-lddqu.c +++ b/gcc/testsuite/gcc.target/i386/sse3-lddqu.c @@ -1,8 +1,15 @@ /* { dg-do run } */ /* { dg-options "-O2 -msse3 -mfpmath=sse" } */ -#include "sse3-check.h" +#ifndef CHECK_H +#define CHECK_H "sse3-check.h" +#endif +#ifndef TEST +#define TEST sse3_test +#endif + +#include CHECK_H #include static void @@ -45,7 +52,7 @@ static double vals[80] = }; static void -sse3_test (void) +TEST (void) { int i; int fail = 0; diff --git a/gcc/testsuite/gcc.target/i386/sse3-movddup.c b/gcc/testsuite/gcc.target/i386/sse3-movddup.c index 5464eb8..2eb33ad 100644 --- a/gcc/testsuite/gcc.target/i386/sse3-movddup.c +++ b/gcc/testsuite/gcc.target/i386/sse3-movddup.c @@ -1,7 +1,15 @@ /* { dg-do run } */ /* { dg-options "-O2 -msse3 -mfpmath=sse" } */ -#include "sse3-check.h" +#ifndef CHECK_H +#define CHECK_H "sse3-check.h" +#endif + +#ifndef TEST +#define TEST sse3_test +#endif + +#include CHECK_H #include @@ -86,7 +94,7 @@ static double vals[80] = }; static void -sse3_test (void) +TEST (void) { int i; int fail = 0; diff --git a/gcc/testsuite/gcc.target/i386/sse3-movshdup.c b/gcc/testsuite/gcc.target/i386/sse3-movshdup.c index 63a881d..8f6706c 100644 --- a/gcc/testsuite/gcc.target/i386/sse3-movshdup.c +++ b/gcc/testsuite/gcc.target/i386/sse3-movshdup.c @@ -1,7 +1,15 @@ /* { dg-do run } */ /* { dg-options "-O2 -msse3 -mfpmath=sse" } */ -#include "sse3-check.h" +#ifndef CHECK_H +#define CHECK_H "sse3-check.h" +#endif + +#ifndef TEST +#define TEST sse3_test +#endif + +#include CHECK_H #include @@ -55,7 +63,7 @@ static float vals[80] = }; static void -sse3_test (void) +TEST (void) { int i; int fail = 0; diff --git a/gcc/testsuite/gcc.target/i386/sse3-movsldup.c b/gcc/testsuite/gcc.target/i386/sse3-movsldup.c index 66c64b3..9ae8454 100644 --- a/gcc/testsuite/gcc.target/i386/sse3-movsldup.c +++ b/gcc/testsuite/gcc.target/i386/sse3-movsldup.c @@ -1,7 +1,15 @@ /* { dg-do run } */ /* { dg-options "-O2 -msse3 -mfpmath=sse" } */ -#include "sse3-check.h" +#ifndef CHECK_H +#define CHECK_H "sse3-check.h" +#endif + +#ifndef TEST +#define TEST sse3_test +#endif + +#include CHECK_H #include @@ -38,7 +46,6 @@ chk_ps (float *v1, float *v2) static float p1[4] __attribute__ ((aligned(16))); static float p2[4]; -static float p3[4]; static float ck[4]; static float vals[80] = @@ -56,7 +63,7 @@ static float vals[80] = }; static void -sse3_test (void) +TEST (void) { int i; int fail = 0; diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-blendpd.c b/gcc/testsuite/gcc.target/i386/sse4_1-blendpd.c index f938e2f..aff188c 100644 --- a/gcc/testsuite/gcc.target/i386/sse4_1-blendpd.c +++ b/gcc/testsuite/gcc.target/i386/sse4_1-blendpd.c @@ -2,7 +2,15 @@ /* { dg-require-effective-target sse4 } */ /* { dg-options "-O2 -msse4.1" } */ -#include "sse4_1-check.h" +#ifndef CHECK_H +#define CHECK_H "sse4_1-check.h" +#endif + +#ifndef TEST +#define TEST sse4_1_test +#endif + +#include CHECK_H #include #include @@ -42,7 +50,7 @@ check_blendpd (__m128d *dst, double *src1, double *src2) } static void -sse4_1_test (void) +TEST (void) { __m128d x, y; union diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-blendps.c b/gcc/testsuite/gcc.target/i386/sse4_1-blendps.c index a8691a6..b4d8e8e 100644 --- a/gcc/testsuite/gcc.target/i386/sse4_1-blendps.c +++ b/gcc/testsuite/gcc.target/i386/sse4_1-blendps.c @@ -2,7 +2,15 @@ /* { dg-require-effective-target sse4 } */ /* { dg-options "-O2 -msse4.1" } */ -#include "sse4_1-check.h" +#ifndef CHECK_H +#define CHECK_H "sse4_1-check.h" +#endif + +#ifndef TEST +#define TEST sse4_1_test +#endif + +#include CHECK_H #include #include @@ -41,7 +49,7 @@ check_blendps (__m128 *dst, float *src1, float *src2) } static void -sse4_1_test (void) +TEST (void) { __m128 x, y; union diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-dppd-1.c b/gcc/testsuite/gcc.target/i386/sse4_1-dppd-1.c index 8adc4dd..b8e58d4 100644 --- a/gcc/testsuite/gcc.target/i386/sse4_1-dppd-1.c +++ b/gcc/testsuite/gcc.target/i386/sse4_1-dppd-1.c @@ -2,7 +2,15 @@ /* { dg-require-effective-target sse4 } */ /* { dg-options "-O2 -msse4.1" } */ -#include "sse4_1-check.h" +#ifndef CHECK_H +#define CHECK_H "sse4_1-check.h" +#endif + +#ifndef TEST +#define TEST sse4_1_test +#endif + +#include CHECK_H #include @@ -22,7 +30,7 @@ #endif static void -sse4_1_test (void) +TEST (void) { union { diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-dppd-2.c b/gcc/testsuite/gcc.target/i386/sse4_1-dppd-2.c index 10fe372..6dc328c 100644 --- a/gcc/testsuite/gcc.target/i386/sse4_1-dppd-2.c +++ b/gcc/testsuite/gcc.target/i386/sse4_1-dppd-2.c @@ -2,9 +2,18 @@ /* { dg-require-effective-target sse4 } */ /* { dg-options "-O2 -msse4.1" } */ -#include "sse4_1-check.h" +#ifndef CHECK_H +#define CHECK_H "sse4_1-check.h" +#endif + +#ifndef TEST +#define TEST sse4_1_test +#endif + +#include CHECK_H #include + #include #define lmskN 0x00 @@ -27,7 +36,7 @@ #endif static void -sse4_1_test (void) +TEST (void) { union { diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-dpps-1.c b/gcc/testsuite/gcc.target/i386/sse4_1-dpps-1.c index 03fb258..7723256 100644 --- a/gcc/testsuite/gcc.target/i386/sse4_1-dpps-1.c +++ b/gcc/testsuite/gcc.target/i386/sse4_1-dpps-1.c @@ -2,7 +2,15 @@ /* { dg-require-effective-target sse4 } */ /* { dg-options "-O2 -msse4.1" } */ -#include "sse4_1-check.h" +#ifndef CHECK_H +#define CHECK_H "sse4_1-check.h" +#endif + +#ifndef TEST +#define TEST sse4_1_test +#endif + +#include CHECK_H #include @@ -37,7 +45,7 @@ #endif static void -sse4_1_test (void) +TEST (void) { union { diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-dpps-2.c b/gcc/testsuite/gcc.target/i386/sse4_1-dpps-2.c index 0b8d4c1..48483b6 100644 --- a/gcc/testsuite/gcc.target/i386/sse4_1-dpps-2.c +++ b/gcc/testsuite/gcc.target/i386/sse4_1-dpps-2.c @@ -2,9 +2,18 @@ /* { dg-require-effective-target sse4 } */ /* { dg-options "-O2 -msse4.1" } */ -#include "sse4_1-check.h" +#ifndef CHECK_H +#define CHECK_H "sse4_1-check.h" +#endif + +#ifndef TEST +#define TEST sse4_1_test +#endif + +#include CHECK_H #include + #include #define lmskN 0x00 @@ -42,7 +51,7 @@ #endif static void -sse4_1_test (void) +TEST (void) { union { diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-extractps.c b/gcc/testsuite/gcc.target/i386/sse4_1-extractps.c index 36294b8..d63296f 100644 --- a/gcc/testsuite/gcc.target/i386/sse4_1-extractps.c +++ b/gcc/testsuite/gcc.target/i386/sse4_1-extractps.c @@ -2,7 +2,15 @@ /* { dg-require-effective-target sse4 } */ /* { dg-options "-O2 -msse4.1" } */ -#include "sse4_1-check.h" +#ifndef CHECK_H +#define CHECK_H "sse4_1-check.h" +#endif + +#ifndef TEST +#define TEST sse4_1_test +#endif + +#include CHECK_H #include @@ -14,7 +22,7 @@ int masks[4]; #define msk3 0x03 static void -sse4_1_test (void) +TEST (void) { union { diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-insertps-1.c b/gcc/testsuite/gcc.target/i386/sse4_1-insertps-1.c index d4aad1a..2f57412 100644 --- a/gcc/testsuite/gcc.target/i386/sse4_1-insertps-1.c +++ b/gcc/testsuite/gcc.target/i386/sse4_1-insertps-1.c @@ -2,7 +2,15 @@ /* { dg-require-effective-target sse4 } */ /* { dg-options "-O2 -msse4.1" } */ -#include "sse4_1-check.h" +#ifndef CHECK_H +#define CHECK_H "sse4_1-check.h" +#endif + +#ifndef TEST +#define TEST sse4_1_test +#endif + +#include CHECK_H #include #include @@ -18,7 +26,7 @@ #define msk7 0x0F static void -sse4_1_test (void) +TEST (void) { union { diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-insertps-2.c b/gcc/testsuite/gcc.target/i386/sse4_1-insertps-2.c index 694aaf1..fbb96ca 100644 --- a/gcc/testsuite/gcc.target/i386/sse4_1-insertps-2.c +++ b/gcc/testsuite/gcc.target/i386/sse4_1-insertps-2.c @@ -2,12 +2,19 @@ /* { dg-require-effective-target sse4 } */ /* { dg-options "-O2 -msse4.1" } */ -#include "sse4_1-check.h" +#ifndef CHECK_H +#define CHECK_H "sse4_1-check.h" +#endif -#include +#ifndef TEST +#define TEST sse4_1_test +#endif + +#include CHECK_H +#include static void -sse4_1_test (void) +TEST (void) { union { diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-movntdqa.c b/gcc/testsuite/gcc.target/i386/sse4_1-movntdqa.c index ae7a9e7..bc5cf23 100644 --- a/gcc/testsuite/gcc.target/i386/sse4_1-movntdqa.c +++ b/gcc/testsuite/gcc.target/i386/sse4_1-movntdqa.c @@ -2,7 +2,15 @@ /* { dg-require-effective-target sse4 } */ /* { dg-options "-O2 -msse4.1" } */ -#include "sse4_1-check.h" +#ifndef CHECK_H +#define CHECK_H "sse4_1-check.h" +#endif + +#ifndef TEST +#define TEST sse4_1_test +#endif + +#include CHECK_H #include #include @@ -23,7 +31,7 @@ init_movntdqa (int *src) } static void -sse4_1_test (void) +TEST (void) { union { diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-mpsadbw.c b/gcc/testsuite/gcc.target/i386/sse4_1-mpsadbw.c index c47d95b..0fc24e8 100644 --- a/gcc/testsuite/gcc.target/i386/sse4_1-mpsadbw.c +++ b/gcc/testsuite/gcc.target/i386/sse4_1-mpsadbw.c @@ -2,7 +2,15 @@ /* { dg-require-effective-target sse4 } */ /* { dg-options "-O2 -msse4.1" } */ -#include "sse4_1-check.h" +#ifndef CHECK_H +#define CHECK_H "sse4_1-check.h" +#endif + +#ifndef TEST +#define TEST sse4_1_test +#endif + +#include CHECK_H #include #include @@ -44,7 +52,7 @@ compute_mpsadbw (unsigned char *v1, unsigned char *v2, int mask) } static void -sse4_1_test (void) +TEST (void) { union { diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-packusdw.c b/gcc/testsuite/gcc.target/i386/sse4_1-packusdw.c index 2b6307a..f981577 100644 --- a/gcc/testsuite/gcc.target/i386/sse4_1-packusdw.c +++ b/gcc/testsuite/gcc.target/i386/sse4_1-packusdw.c @@ -2,7 +2,15 @@ /* { dg-require-effective-target sse4 } */ /* { dg-options "-O2 -msse4.1" } */ -#include "sse4_1-check.h" +#ifndef CHECK_H +#define CHECK_H "sse4_1-check.h" +#endif + +#ifndef TEST +#define TEST sse4_1_test +#endif + +#include CHECK_H #include @@ -23,7 +31,7 @@ int_to_ushort (int iVal) } static void -sse4_1_test (void) +TEST (void) { union { diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-pblendvb.c b/gcc/testsuite/gcc.target/i386/sse4_1-pblendvb.c index 1fefc27..58e9447 100644 --- a/gcc/testsuite/gcc.target/i386/sse4_1-pblendvb.c +++ b/gcc/testsuite/gcc.target/i386/sse4_1-pblendvb.c @@ -2,7 +2,15 @@ /* { dg-require-effective-target sse4 } */ /* { dg-options "-O2 -msse4.1" } */ -#include "sse4_1-check.h" +#ifndef CHECK_H +#define CHECK_H "sse4_1-check.h" +#endif + +#ifndef TEST +#define TEST sse4_1_test +#endif + +#include CHECK_H #include #include @@ -41,7 +49,7 @@ check_pblendvb (__m128i *dst, unsigned char *src1, } static void -sse4_1_test (void) +TEST (void) { union { diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-pblendw.c b/gcc/testsuite/gcc.target/i386/sse4_1-pblendw.c index fa18ccd..5f5a253 100644 --- a/gcc/testsuite/gcc.target/i386/sse4_1-pblendw.c +++ b/gcc/testsuite/gcc.target/i386/sse4_1-pblendw.c @@ -2,7 +2,15 @@ /* { dg-require-effective-target sse4 } */ /* { dg-options "-O2 -msse4.1" } */ -#include "sse4_1-check.h" +#ifndef CHECK_H +#define CHECK_H "sse4_1-check.h" +#endif + +#ifndef TEST +#define TEST sse4_1_test +#endif + +#include CHECK_H #include #include @@ -41,7 +49,7 @@ check_pblendw (__m128i *dst, short *src1, short *src2) } static void -sse4_1_test (void) +TEST (void) { __m128i x, y; union diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-pcmpeqq.c b/gcc/testsuite/gcc.target/i386/sse4_1-pcmpeqq.c index a15356a..8611b82 100644 --- a/gcc/testsuite/gcc.target/i386/sse4_1-pcmpeqq.c +++ b/gcc/testsuite/gcc.target/i386/sse4_1-pcmpeqq.c @@ -2,14 +2,22 @@ /* { dg-require-effective-target sse4 } */ /* { dg-options "-O2 -msse4.1" } */ -#include "sse4_1-check.h" +#ifndef CHECK_H +#define CHECK_H "sse4_1-check.h" +#endif + +#ifndef TEST +#define TEST sse4_1_test +#endif + +#include CHECK_H #include #define NUM 64 static void -sse4_1_test (void) +TEST (void) { union { diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-pextrb.c b/gcc/testsuite/gcc.target/i386/sse4_1-pextrb.c index 15d08fa..bef4d2d 100644 --- a/gcc/testsuite/gcc.target/i386/sse4_1-pextrb.c +++ b/gcc/testsuite/gcc.target/i386/sse4_1-pextrb.c @@ -2,8 +2,15 @@ /* { dg-require-effective-target sse4 } */ /* { dg-options "-O2 -msse4.1" } */ -#include "sse4_1-check.h" +#ifndef CHECK_H +#define CHECK_H "sse4_1-check.h" +#endif +#ifndef TEST +#define TEST sse4_1_test +#endif + +#include CHECK_H #include #define msk0 0 @@ -24,7 +31,7 @@ #define msk15 15 static void -sse4_1_test (void) +TEST (void) { union { diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-pextrd.c b/gcc/testsuite/gcc.target/i386/sse4_1-pextrd.c index 751dca2..3091e5a 100644 --- a/gcc/testsuite/gcc.target/i386/sse4_1-pextrd.c +++ b/gcc/testsuite/gcc.target/i386/sse4_1-pextrd.c @@ -2,17 +2,25 @@ /* { dg-require-effective-target sse4 } */ /* { dg-options "-O2 -msse4.1" } */ -#include "sse4_1-check.h" +#ifndef CHECK_H +#define CHECK_H "sse4_1-check.h" +#endif +#ifndef TEST +#define TEST sse4_1_test +#endif + +#include CHECK_H #include + #define msk0 0 #define msk1 1 #define msk2 2 #define msk3 3 static void -sse4_1_test (void) +TEST (void) { union { diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-pextrq.c b/gcc/testsuite/gcc.target/i386/sse4_1-pextrq.c index c9ff97d..b90f4e2 100644 --- a/gcc/testsuite/gcc.target/i386/sse4_1-pextrq.c +++ b/gcc/testsuite/gcc.target/i386/sse4_1-pextrq.c @@ -3,7 +3,15 @@ /* { dg-require-effective-target sse4 } */ /* { dg-options "-O2 -msse4.1" } */ -#include "sse4_1-check.h" +#ifndef CHECK_H +#define CHECK_H "sse4_1-check.h" +#endif + +#ifndef TEST +#define TEST sse4_1_test +#endif + +#include CHECK_H #include @@ -11,7 +19,8 @@ #define msk1 1 static void -sse4_1_test (void) +__attribute__((noinline)) +TEST (void) { union { diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-pextrw.c b/gcc/testsuite/gcc.target/i386/sse4_1-pextrw.c index 19d783f..2a0f03c 100644 --- a/gcc/testsuite/gcc.target/i386/sse4_1-pextrw.c +++ b/gcc/testsuite/gcc.target/i386/sse4_1-pextrw.c @@ -2,7 +2,15 @@ /* { dg-require-effective-target sse4 } */ /* { dg-options "-O2 -msse4.1" } */ -#include "sse4_1-check.h" +#ifndef CHECK_H +#define CHECK_H "sse4_1-check.h" +#endif + +#ifndef TEST +#define TEST sse4_1_test +#endif + +#include CHECK_H #include @@ -16,7 +24,7 @@ #define msk7 7 static void -sse4_1_test (void) +TEST (void) { union { diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-phminposuw.c b/gcc/testsuite/gcc.target/i386/sse4_1-phminposuw.c index 24fdf2a..ab46834 100644 --- a/gcc/testsuite/gcc.target/i386/sse4_1-phminposuw.c +++ b/gcc/testsuite/gcc.target/i386/sse4_1-phminposuw.c @@ -2,14 +2,22 @@ /* { dg-require-effective-target sse4 } */ /* { dg-options "-O2 -msse4.1" } */ -#include "sse4_1-check.h" +#ifndef CHECK_H +#define CHECK_H "sse4_1-check.h" +#endif + +#ifndef TEST +#define TEST sse4_1_test +#endif + +#include CHECK_H #include #define NUM 64 static void -sse4_1_test (void) +TEST (void) { union { diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-pinsrb.c b/gcc/testsuite/gcc.target/i386/sse4_1-pinsrb.c index dd5ee03..1842736 100644 --- a/gcc/testsuite/gcc.target/i386/sse4_1-pinsrb.c +++ b/gcc/testsuite/gcc.target/i386/sse4_1-pinsrb.c @@ -2,7 +2,15 @@ /* { dg-require-effective-target sse4 } */ /* { dg-options "-O2 -msse4.1" } */ -#include "sse4_1-check.h" +#ifndef CHECK_H +#define CHECK_H "sse4_1-check.h" +#endif + +#ifndef TEST +#define TEST sse4_1_test +#endif + +#include CHECK_H #include #include @@ -25,7 +33,7 @@ #define mskF 0x0F static void -sse4_1_test (void) +TEST (void) { union { diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-pinsrd.c b/gcc/testsuite/gcc.target/i386/sse4_1-pinsrd.c index e816881..7a5d5fb 100644 --- a/gcc/testsuite/gcc.target/i386/sse4_1-pinsrd.c +++ b/gcc/testsuite/gcc.target/i386/sse4_1-pinsrd.c @@ -2,7 +2,15 @@ /* { dg-require-effective-target sse4 } */ /* { dg-options "-O2 -msse4.1" } */ -#include "sse4_1-check.h" +#ifndef CHECK_H +#define CHECK_H "sse4_1-check.h" +#endif + +#ifndef TEST +#define TEST sse4_1_test +#endif + +#include CHECK_H #include #include @@ -13,7 +21,7 @@ #define msk3 0x03 static void -sse4_1_test (void) +TEST (void) { union { diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-pinsrq.c b/gcc/testsuite/gcc.target/i386/sse4_1-pinsrq.c index beeaf83..1640439 100644 --- a/gcc/testsuite/gcc.target/i386/sse4_1-pinsrq.c +++ b/gcc/testsuite/gcc.target/i386/sse4_1-pinsrq.c @@ -3,7 +3,15 @@ /* { dg-require-effective-target sse4 } */ /* { dg-options "-O2 -msse4.1" } */ -#include "sse4_1-check.h" +#ifndef CHECK_H +#define CHECK_H "sse4_1-check.h" +#endif + +#ifndef TEST +#define TEST sse4_1_test +#endif + +#include CHECK_H #include #include @@ -12,7 +20,8 @@ #define msk1 0x01 static void -sse4_1_test (void) +__attribute__((noinline)) +TEST (void) { union { diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-pmaxsb.c b/gcc/testsuite/gcc.target/i386/sse4_1-pmaxsb.c index 5bd007e..ab445ee 100644 --- a/gcc/testsuite/gcc.target/i386/sse4_1-pmaxsb.c +++ b/gcc/testsuite/gcc.target/i386/sse4_1-pmaxsb.c @@ -2,14 +2,22 @@ /* { dg-require-effective-target sse4 } */ /* { dg-options "-O2 -msse4.1" } */ -#include "sse4_1-check.h" +#ifndef CHECK_H +#define CHECK_H "sse4_1-check.h" +#endif + +#ifndef TEST +#define TEST sse4_1_test +#endif + +#include CHECK_H #include #define NUM 1024 static void -sse4_1_test (void) +TEST (void) { union { diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-pmaxsd.c b/gcc/testsuite/gcc.target/i386/sse4_1-pmaxsd.c index 5e480b3..37c77ae 100644 --- a/gcc/testsuite/gcc.target/i386/sse4_1-pmaxsd.c +++ b/gcc/testsuite/gcc.target/i386/sse4_1-pmaxsd.c @@ -2,14 +2,22 @@ /* { dg-require-effective-target sse4 } */ /* { dg-options "-O2 -msse4.1" } */ -#include "sse4_1-check.h" +#ifndef CHECK_H +#define CHECK_H "sse4_1-check.h" +#endif + +#ifndef TEST +#define TEST sse4_1_test +#endif + +#include CHECK_H #include #define NUM 64 static void -sse4_1_test (void) +TEST (void) { union { diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-pmaxud.c b/gcc/testsuite/gcc.target/i386/sse4_1-pmaxud.c index 844f8da..693c078 100644 --- a/gcc/testsuite/gcc.target/i386/sse4_1-pmaxud.c +++ b/gcc/testsuite/gcc.target/i386/sse4_1-pmaxud.c @@ -2,14 +2,22 @@ /* { dg-require-effective-target sse4 } */ /* { dg-options "-O2 -msse4.1" } */ -#include "sse4_1-check.h" +#ifndef CHECK_H +#define CHECK_H "sse4_1-check.h" +#endif + +#ifndef TEST +#define TEST sse4_1_test +#endif + +#include CHECK_H #include #define NUM 64 static void -sse4_1_test (void) +TEST (void) { union { diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-pmaxuw.c b/gcc/testsuite/gcc.target/i386/sse4_1-pmaxuw.c index 99248c1..7b5cfcd 100644 --- a/gcc/testsuite/gcc.target/i386/sse4_1-pmaxuw.c +++ b/gcc/testsuite/gcc.target/i386/sse4_1-pmaxuw.c @@ -2,14 +2,22 @@ /* { dg-require-effective-target sse4 } */ /* { dg-options "-O2 -msse4.1" } */ -#include "sse4_1-check.h" +#ifndef CHECK_H +#define CHECK_H "sse4_1-check.h" +#endif + +#ifndef TEST +#define TEST sse4_1_test +#endif + +#include CHECK_H #include #define NUM 64 static void -sse4_1_test (void) +TEST (void) { union { diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-pminsb.c b/gcc/testsuite/gcc.target/i386/sse4_1-pminsb.c index 55192de..6f32d8b 100644 --- a/gcc/testsuite/gcc.target/i386/sse4_1-pminsb.c +++ b/gcc/testsuite/gcc.target/i386/sse4_1-pminsb.c @@ -2,14 +2,22 @@ /* { dg-require-effective-target sse4 } */ /* { dg-options "-O2 -msse4.1" } */ -#include "sse4_1-check.h" +#ifndef CHECK_H +#define CHECK_H "sse4_1-check.h" +#endif + +#ifndef TEST +#define TEST sse4_1_test +#endif + +#include CHECK_H #include #define NUM 1024 static void -sse4_1_test (void) +TEST (void) { union { diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-pminsd.c b/gcc/testsuite/gcc.target/i386/sse4_1-pminsd.c index c3aeb08..a3de148 100644 --- a/gcc/testsuite/gcc.target/i386/sse4_1-pminsd.c +++ b/gcc/testsuite/gcc.target/i386/sse4_1-pminsd.c @@ -2,14 +2,22 @@ /* { dg-require-effective-target sse4 } */ /* { dg-options "-O2 -msse4.1" } */ -#include "sse4_1-check.h" +#ifndef CHECK_H +#define CHECK_H "sse4_1-check.h" +#endif + +#ifndef TEST +#define TEST sse4_1_test +#endif + +#include CHECK_H #include #define NUM 64 static void -sse4_1_test (void) +TEST (void) { union { diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-pminud.c b/gcc/testsuite/gcc.target/i386/sse4_1-pminud.c index 64d69d2..9daffc0 100644 --- a/gcc/testsuite/gcc.target/i386/sse4_1-pminud.c +++ b/gcc/testsuite/gcc.target/i386/sse4_1-pminud.c @@ -2,14 +2,22 @@ /* { dg-require-effective-target sse4 } */ /* { dg-options "-O2 -msse4.1" } */ -#include "sse4_1-check.h" +#ifndef CHECK_H +#define CHECK_H "sse4_1-check.h" +#endif + +#ifndef TEST +#define TEST sse4_1_test +#endif + +#include CHECK_H #include #define NUM 64 static void -sse4_1_test (void) +TEST (void) { union { diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-pminuw.c b/gcc/testsuite/gcc.target/i386/sse4_1-pminuw.c index afe2f88..6ed5d9e 100644 --- a/gcc/testsuite/gcc.target/i386/sse4_1-pminuw.c +++ b/gcc/testsuite/gcc.target/i386/sse4_1-pminuw.c @@ -2,14 +2,22 @@ /* { dg-require-effective-target sse4 } */ /* { dg-options "-O2 -msse4.1" } */ -#include "sse4_1-check.h" +#ifndef CHECK_H +#define CHECK_H "sse4_1-check.h" +#endif + +#ifndef TEST +#define TEST sse4_1_test +#endif + +#include CHECK_H #include #define NUM 64 static void -sse4_1_test (void) +TEST (void) { union { diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-pmovsxbd.c b/gcc/testsuite/gcc.target/i386/sse4_1-pmovsxbd.c index 7da95a7..00ce3ef 100644 --- a/gcc/testsuite/gcc.target/i386/sse4_1-pmovsxbd.c +++ b/gcc/testsuite/gcc.target/i386/sse4_1-pmovsxbd.c @@ -2,14 +2,22 @@ /* { dg-require-effective-target sse4 } */ /* { dg-options "-O2 -msse4.1" } */ -#include "sse4_1-check.h" +#ifndef CHECK_H +#define CHECK_H "sse4_1-check.h" +#endif + +#ifndef TEST +#define TEST sse4_1_test +#endif + +#include CHECK_H #include #define NUM 128 static void -sse4_1_test (void) +TEST (void) { union { diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-pmovsxbq.c b/gcc/testsuite/gcc.target/i386/sse4_1-pmovsxbq.c index 9a1b3e1..0df6a61 100644 --- a/gcc/testsuite/gcc.target/i386/sse4_1-pmovsxbq.c +++ b/gcc/testsuite/gcc.target/i386/sse4_1-pmovsxbq.c @@ -2,14 +2,22 @@ /* { dg-require-effective-target sse4 } */ /* { dg-options "-O2 -msse4.1" } */ -#include "sse4_1-check.h" +#ifndef CHECK_H +#define CHECK_H "sse4_1-check.h" +#endif + +#ifndef TEST +#define TEST sse4_1_test +#endif + +#include CHECK_H #include #define NUM 128 static void -sse4_1_test (void) +TEST (void) { union { diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-pmovsxbw.c b/gcc/testsuite/gcc.target/i386/sse4_1-pmovsxbw.c index df90899..36accff 100644 --- a/gcc/testsuite/gcc.target/i386/sse4_1-pmovsxbw.c +++ b/gcc/testsuite/gcc.target/i386/sse4_1-pmovsxbw.c @@ -2,14 +2,22 @@ /* { dg-require-effective-target sse4 } */ /* { dg-options "-O2 -msse4.1" } */ -#include "sse4_1-check.h" +#ifndef CHECK_H +#define CHECK_H "sse4_1-check.h" +#endif + +#ifndef TEST +#define TEST sse4_1_test +#endif + +#include CHECK_H #include #define NUM 128 static void -sse4_1_test (void) +TEST (void) { union { diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-pmovsxdq.c b/gcc/testsuite/gcc.target/i386/sse4_1-pmovsxdq.c index 96d06cd..e46ba19 100644 --- a/gcc/testsuite/gcc.target/i386/sse4_1-pmovsxdq.c +++ b/gcc/testsuite/gcc.target/i386/sse4_1-pmovsxdq.c @@ -2,14 +2,22 @@ /* { dg-require-effective-target sse4 } */ /* { dg-options "-O2 -msse4.1" } */ -#include "sse4_1-check.h" +#ifndef CHECK_H +#define CHECK_H "sse4_1-check.h" +#endif + +#ifndef TEST +#define TEST sse4_1_test +#endif + +#include CHECK_H #include #define NUM 128 static void -sse4_1_test (void) +TEST (void) { union { diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-pmovsxwd.c b/gcc/testsuite/gcc.target/i386/sse4_1-pmovsxwd.c index 7266320..61d9d3c 100644 --- a/gcc/testsuite/gcc.target/i386/sse4_1-pmovsxwd.c +++ b/gcc/testsuite/gcc.target/i386/sse4_1-pmovsxwd.c @@ -2,14 +2,22 @@ /* { dg-require-effective-target sse4 } */ /* { dg-options "-O2 -msse4.1" } */ -#include "sse4_1-check.h" +#ifndef CHECK_H +#define CHECK_H "sse4_1-check.h" +#endif + +#ifndef TEST +#define TEST sse4_1_test +#endif + +#include CHECK_H #include #define NUM 128 static void -sse4_1_test (void) +TEST (void) { union { diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-pmovsxwq.c b/gcc/testsuite/gcc.target/i386/sse4_1-pmovsxwq.c index d7e1ded..160d646 100644 --- a/gcc/testsuite/gcc.target/i386/sse4_1-pmovsxwq.c +++ b/gcc/testsuite/gcc.target/i386/sse4_1-pmovsxwq.c @@ -2,14 +2,22 @@ /* { dg-require-effective-target sse4 } */ /* { dg-options "-O2 -msse4.1" } */ -#include "sse4_1-check.h" +#ifndef CHECK_H +#define CHECK_H "sse4_1-check.h" +#endif + +#ifndef TEST +#define TEST sse4_1_test +#endif + +#include CHECK_H #include #define NUM 128 static void -sse4_1_test (void) +TEST (void) { union { diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-pmovzxbd.c b/gcc/testsuite/gcc.target/i386/sse4_1-pmovzxbd.c index e5aa7ee..6ebd6cf 100644 --- a/gcc/testsuite/gcc.target/i386/sse4_1-pmovzxbd.c +++ b/gcc/testsuite/gcc.target/i386/sse4_1-pmovzxbd.c @@ -2,14 +2,22 @@ /* { dg-require-effective-target sse4 } */ /* { dg-options "-O2 -msse4.1" } */ -#include "sse4_1-check.h" +#ifndef CHECK_H +#define CHECK_H "sse4_1-check.h" +#endif + +#ifndef TEST +#define TEST sse4_1_test +#endif + +#include CHECK_H #include #define NUM 128 static void -sse4_1_test (void) +TEST (void) { union { diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-pmovzxbq.c b/gcc/testsuite/gcc.target/i386/sse4_1-pmovzxbq.c index 173ebd4..8b2f18a 100644 --- a/gcc/testsuite/gcc.target/i386/sse4_1-pmovzxbq.c +++ b/gcc/testsuite/gcc.target/i386/sse4_1-pmovzxbq.c @@ -2,14 +2,22 @@ /* { dg-require-effective-target sse4 } */ /* { dg-options "-O2 -msse4.1" } */ -#include "sse4_1-check.h" +#ifndef CHECK_H +#define CHECK_H "sse4_1-check.h" +#endif + +#ifndef TEST +#define TEST sse4_1_test +#endif + +#include CHECK_H #include #define NUM 128 static void -sse4_1_test (void) +TEST (void) { union { diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-pmovzxbw.c b/gcc/testsuite/gcc.target/i386/sse4_1-pmovzxbw.c index 890e5ba..8e1452b 100644 --- a/gcc/testsuite/gcc.target/i386/sse4_1-pmovzxbw.c +++ b/gcc/testsuite/gcc.target/i386/sse4_1-pmovzxbw.c @@ -2,14 +2,22 @@ /* { dg-require-effective-target sse4 } */ /* { dg-options "-O2 -msse4.1" } */ -#include "sse4_1-check.h" +#ifndef CHECK_H +#define CHECK_H "sse4_1-check.h" +#endif + +#ifndef TEST +#define TEST sse4_1_test +#endif + +#include CHECK_H #include #define NUM 128 static void -sse4_1_test (void) +TEST (void) { union { diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-pmovzxdq.c b/gcc/testsuite/gcc.target/i386/sse4_1-pmovzxdq.c index d24f766..cb2a438 100644 --- a/gcc/testsuite/gcc.target/i386/sse4_1-pmovzxdq.c +++ b/gcc/testsuite/gcc.target/i386/sse4_1-pmovzxdq.c @@ -2,14 +2,22 @@ /* { dg-require-effective-target sse4 } */ /* { dg-options "-O2 -msse4.1" } */ -#include "sse4_1-check.h" +#ifndef CHECK_H +#define CHECK_H "sse4_1-check.h" +#endif + +#ifndef TEST +#define TEST sse4_1_test +#endif + +#include CHECK_H #include #define NUM 128 static void -sse4_1_test (void) +TEST (void) { union { diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-pmovzxwd.c b/gcc/testsuite/gcc.target/i386/sse4_1-pmovzxwd.c index ed2c0e8..b525f4c 100644 --- a/gcc/testsuite/gcc.target/i386/sse4_1-pmovzxwd.c +++ b/gcc/testsuite/gcc.target/i386/sse4_1-pmovzxwd.c @@ -2,14 +2,22 @@ /* { dg-require-effective-target sse4 } */ /* { dg-options "-O2 -msse4.1" } */ -#include "sse4_1-check.h" +#ifndef CHECK_H +#define CHECK_H "sse4_1-check.h" +#endif + +#ifndef TEST +#define TEST sse4_1_test +#endif + +#include CHECK_H #include #define NUM 128 static void -sse4_1_test (void) +TEST (void) { union { diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-pmovzxwq.c b/gcc/testsuite/gcc.target/i386/sse4_1-pmovzxwq.c index 5a5608c..98f552a 100644 --- a/gcc/testsuite/gcc.target/i386/sse4_1-pmovzxwq.c +++ b/gcc/testsuite/gcc.target/i386/sse4_1-pmovzxwq.c @@ -2,14 +2,22 @@ /* { dg-require-effective-target sse4 } */ /* { dg-options "-O2 -msse4.1" } */ -#include "sse4_1-check.h" +#ifndef CHECK_H +#define CHECK_H "sse4_1-check.h" +#endif + +#ifndef TEST +#define TEST sse4_1_test +#endif + +#include CHECK_H #include #define NUM 128 static void -sse4_1_test (void) +TEST (void) { union { diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-pmuldq.c b/gcc/testsuite/gcc.target/i386/sse4_1-pmuldq.c index 597219b..dda1ba3 100644 --- a/gcc/testsuite/gcc.target/i386/sse4_1-pmuldq.c +++ b/gcc/testsuite/gcc.target/i386/sse4_1-pmuldq.c @@ -2,14 +2,22 @@ /* { dg-require-effective-target sse4 } */ /* { dg-options "-O2 -msse4.1" } */ -#include "sse4_1-check.h" +#ifndef CHECK_H +#define CHECK_H "sse4_1-check.h" +#endif + +#ifndef TEST +#define TEST sse4_1_test +#endif + +#include CHECK_H #include #define NUM 64 static void -sse4_1_test (void) +TEST (void) { union { diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-pmulld.c b/gcc/testsuite/gcc.target/i386/sse4_1-pmulld.c index d77d453..9fb77d0 100644 --- a/gcc/testsuite/gcc.target/i386/sse4_1-pmulld.c +++ b/gcc/testsuite/gcc.target/i386/sse4_1-pmulld.c @@ -2,14 +2,22 @@ /* { dg-require-effective-target sse4 } */ /* { dg-options "-O2 -msse4.1" } */ -#include "sse4_1-check.h" +#ifndef CHECK_H +#define CHECK_H "sse4_1-check.h" +#endif + +#ifndef TEST +#define TEST sse4_1_test +#endif + +#include CHECK_H #include #define NUM 64 static void -sse4_1_test (void) +TEST (void) { union { diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-ptest-1.c b/gcc/testsuite/gcc.target/i386/sse4_1-ptest-1.c index ec752b7..8b57a21 100644 --- a/gcc/testsuite/gcc.target/i386/sse4_1-ptest-1.c +++ b/gcc/testsuite/gcc.target/i386/sse4_1-ptest-1.c @@ -2,7 +2,15 @@ /* { dg-require-effective-target sse4 } */ /* { dg-options "-O2 -msse4.1" } */ -#include "sse4_1-check.h" +#ifndef CHECK_H +#define CHECK_H "sse4_1-check.h" +#endif + +#ifndef TEST +#define TEST sse4_1_test +#endif + +#include CHECK_H #include @@ -53,7 +61,7 @@ make_ptestc (__m128i m, __m128i v) } static void -sse4_1_test (void) +TEST (void) { union { diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-ptest-2.c b/gcc/testsuite/gcc.target/i386/sse4_1-ptest-2.c index 5343dd2..2e6df95 100644 --- a/gcc/testsuite/gcc.target/i386/sse4_1-ptest-2.c +++ b/gcc/testsuite/gcc.target/i386/sse4_1-ptest-2.c @@ -2,7 +2,15 @@ /* { dg-require-effective-target sse4 } */ /* { dg-options "-O2 -msse4.1" } */ -#include "sse4_1-check.h" +#ifndef CHECK_H +#define CHECK_H "sse4_1-check.h" +#endif + +#ifndef TEST +#define TEST sse4_1_test +#endif + +#include CHECK_H #include @@ -32,7 +40,7 @@ make_ptestnzc (__m128i m, __m128i v) } static void -sse4_1_test (void) +TEST (void) { union { diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-ptest-3.c b/gcc/testsuite/gcc.target/i386/sse4_1-ptest-3.c index 1300d7b..bf2df32 100644 --- a/gcc/testsuite/gcc.target/i386/sse4_1-ptest-3.c +++ b/gcc/testsuite/gcc.target/i386/sse4_1-ptest-3.c @@ -2,12 +2,20 @@ /* { dg-require-effective-target sse4 } */ /* { dg-options "-O2 -msse4.1" } */ -#include "sse4_1-check.h" +#ifndef CHECK_H +#define CHECK_H "sse4_1-check.h" +#endif + +#ifndef TEST +#define TEST sse4_1_test +#endif + +#include CHECK_H #include static void -sse4_1_test (void) +TEST (void) { union { diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-roundpd-1.c b/gcc/testsuite/gcc.target/i386/sse4_1-roundpd-1.c index 17da21f..37f2028 100644 --- a/gcc/testsuite/gcc.target/i386/sse4_1-roundpd-1.c +++ b/gcc/testsuite/gcc.target/i386/sse4_1-roundpd-1.c @@ -2,17 +2,37 @@ /* { dg-require-effective-target sse4 } */ /* { dg-options "-O2 -msse4.1" } */ -#include "sse4_1-check.h" +#ifndef CHECK_H +#define CHECK_H "sse4_1-check.h" +#endif -#define VEC_T __m128d -#define FP_T double -#define ASM_SUFFIX "l" +#ifndef TEST +#define TEST sse4_1_test +#endif -#define ROUND_INTRIN(x, mode) _mm_ceil_pd(x) -#define ROUND_MODE _MM_FROUND_CEIL -#define CHECK_ROUND_MODE 0x02 +#include CHECK_H -#define LOOP_INCREMENT 2 -#define CHECK_LOOP_INCREMENT 1 +#include -#include "sse4_1-round.h" +#define iRoundMode 0x2 + +static void +TEST (void) +{ + union128d u, s; + double e[2] = {0.0}; + int i; + + s.x = _mm_set_pd (1.1234, -2.3478); + u.x = _mm_round_pd (s.x, iRoundMode); + + for (i = 0; i < 2; i++) + { + __m128d tmp = _mm_load_sd (&s.a[i]); + tmp = _mm_round_sd (tmp, tmp, iRoundMode); + _mm_store_sd (&e[i], tmp); + } + + if (check_union128d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-roundpd-2.c b/gcc/testsuite/gcc.target/i386/sse4_1-roundpd-2.c index 1ad9814..7f0475f 100644 --- a/gcc/testsuite/gcc.target/i386/sse4_1-roundpd-2.c +++ b/gcc/testsuite/gcc.target/i386/sse4_1-roundpd-2.c @@ -2,17 +2,35 @@ /* { dg-require-effective-target sse4 } */ /* { dg-options "-O2 -msse4.1" } */ -#include "sse4_1-check.h" +#ifndef CHECK_H +#define CHECK_H "sse4_1-check.h" +#endif -#define VEC_T __m128d -#define FP_T double -#define ASM_SUFFIX "l" +#ifndef TEST +#define TEST sse4_1_test +#endif -#define ROUND_INTRIN _mm_round_pd -#define ROUND_MODE _MM_FROUND_NINT -#define CHECK_ROUND_MODE 0x00 +#include CHECK_H -#define LOOP_INCREMENT 2 -#define CHECK_LOOP_INCREMENT 1 +#include -#include "sse4_1-round.h" +static void +TEST (void) +{ + union128d u, s; + double e[2] = {0.0}; + int i; + + s.x = _mm_set_pd (1.1234, -2.3478); + u.x = _mm_floor_pd (s.x); + + for (i = 0; i < 2; i++) + { + __m128d tmp = _mm_load_sd (&s.a[i]); + tmp = _mm_floor_sd (tmp, tmp); + _mm_store_sd (&e[i], tmp); + } + + if (check_union128d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-roundpd-3.c b/gcc/testsuite/gcc.target/i386/sse4_1-roundpd-3.c index 3950578..4a1f810 100644 --- a/gcc/testsuite/gcc.target/i386/sse4_1-roundpd-3.c +++ b/gcc/testsuite/gcc.target/i386/sse4_1-roundpd-3.c @@ -2,17 +2,35 @@ /* { dg-require-effective-target sse4 } */ /* { dg-options "-O2 -msse4.1" } */ -#include "sse4_1-check.h" +#ifndef CHECK_H +#define CHECK_H "sse4_1-check.h" +#endif -#define VEC_T __m128d -#define FP_T double -#define ASM_SUFFIX "l" +#ifndef TEST +#define TEST sse4_1_test +#endif -#define ROUND_INTRIN(x, mode) _mm_floor_pd(x) -#define ROUND_MODE _MM_FROUND_FLOOR -#define CHECK_ROUND_MODE 0x01 +#include CHECK_H -#define LOOP_INCREMENT 2 -#define CHECK_LOOP_INCREMENT 1 +#include -#include "sse4_1-round.h" +static void +TEST (void) +{ + union128d u, s; + double e[2] = {0.0}; + int i; + + s.x = _mm_set_pd (1.1234, -2.3478); + u.x = _mm_ceil_pd (s.x); + + for (i = 0; i < 2; i++) + { + __m128d tmp = _mm_load_sd (&s.a[i]); + tmp = _mm_ceil_sd (tmp, tmp); + _mm_store_sd (&e[i], tmp); + } + + if (check_union128d (u, e)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse4_2-pcmpestri-1.c b/gcc/testsuite/gcc.target/i386/sse4_2-pcmpestri-1.c index c84ddd3..5b7f3ad 100644 --- a/gcc/testsuite/gcc.target/i386/sse4_2-pcmpestri-1.c +++ b/gcc/testsuite/gcc.target/i386/sse4_2-pcmpestri-1.c @@ -2,7 +2,16 @@ /* { dg-require-effective-target sse4 } */ /* { dg-options "-O2 -msse4.2" } */ -#include "sse4_2-check.h" +#ifndef CHECK_H +#define CHECK_H "sse4_2-check.h" +#endif + +#ifndef TEST +#define TEST sse4_2_test +#endif + +#include CHECK_H + #include "sse4_2-pcmpstr.h" #define NUM 1024 @@ -20,7 +29,7 @@ static void -sse4_2_test (void) +TEST (void) { union { diff --git a/gcc/testsuite/gcc.target/i386/sse4_2-pcmpestri-2.c b/gcc/testsuite/gcc.target/i386/sse4_2-pcmpestri-2.c index bc35eb7..800084f 100644 --- a/gcc/testsuite/gcc.target/i386/sse4_2-pcmpestri-2.c +++ b/gcc/testsuite/gcc.target/i386/sse4_2-pcmpestri-2.c @@ -2,7 +2,16 @@ /* { dg-require-effective-target sse4 } */ /* { dg-options "-O2 -msse4.2" } */ -#include "sse4_2-check.h" +#ifndef CHECK_H +#define CHECK_H "sse4_2-check.h" +#endif + +#ifndef TEST +#define TEST sse4_2_test +#endif + +#include CHECK_H + #include "sse4_2-pcmpstr.h" #define NUM 1024 @@ -20,7 +29,7 @@ static void -sse4_2_test (void) +TEST (void) { union { diff --git a/gcc/testsuite/gcc.target/i386/sse4_2-pcmpestrm-1.c b/gcc/testsuite/gcc.target/i386/sse4_2-pcmpestrm-1.c index 1c75a9b..f02bb7e 100644 --- a/gcc/testsuite/gcc.target/i386/sse4_2-pcmpestrm-1.c +++ b/gcc/testsuite/gcc.target/i386/sse4_2-pcmpestrm-1.c @@ -2,7 +2,16 @@ /* { dg-require-effective-target sse4 } */ /* { dg-options "-O2 -msse4.2" } */ -#include "sse4_2-check.h" +#ifndef CHECK_H +#define CHECK_H "sse4_2-check.h" +#endif + +#ifndef TEST +#define TEST sse4_2_test +#endif + +#include CHECK_H + #include "sse4_2-pcmpstr.h" #define NUM 1024 @@ -20,7 +29,7 @@ static void -sse4_2_test (void) +TEST (void) { union { diff --git a/gcc/testsuite/gcc.target/i386/sse4_2-pcmpestrm-2.c b/gcc/testsuite/gcc.target/i386/sse4_2-pcmpestrm-2.c index baf377c..845471f 100644 --- a/gcc/testsuite/gcc.target/i386/sse4_2-pcmpestrm-2.c +++ b/gcc/testsuite/gcc.target/i386/sse4_2-pcmpestrm-2.c @@ -2,7 +2,16 @@ /* { dg-require-effective-target sse4 } */ /* { dg-options "-O2 -msse4.2" } */ -#include "sse4_2-check.h" +#ifndef CHECK_H +#define CHECK_H "sse4_2-check.h" +#endif + +#ifndef TEST +#define TEST sse4_2_test +#endif + +#include CHECK_H + #include "sse4_2-pcmpstr.h" #define NUM 1024 @@ -19,7 +28,7 @@ | _SIDD_MASKED_NEGATIVE_POLARITY | _SIDD_UNIT_MASK) static void -sse4_2_test (void) +TEST (void) { union { diff --git a/gcc/testsuite/gcc.target/i386/sse4_2-pcmpgtq.c b/gcc/testsuite/gcc.target/i386/sse4_2-pcmpgtq.c index c782d85..e2ef66f 100644 --- a/gcc/testsuite/gcc.target/i386/sse4_2-pcmpgtq.c +++ b/gcc/testsuite/gcc.target/i386/sse4_2-pcmpgtq.c @@ -2,14 +2,22 @@ /* { dg-require-effective-target sse4 } */ /* { dg-options "-O2 -msse4.2" } */ -#include "sse4_2-check.h" +#ifndef CHECK_H +#define CHECK_H "sse4_2-check.h" +#endif + +#ifndef TEST +#define TEST sse4_2_test +#endif + +#include CHECK_H #include #define NUM 64 static void -sse4_2_test (void) +TEST (void) { union { diff --git a/gcc/testsuite/gcc.target/i386/sse4_2-pcmpistri-1.c b/gcc/testsuite/gcc.target/i386/sse4_2-pcmpistri-1.c index 9dbeb30..b74df02 100644 --- a/gcc/testsuite/gcc.target/i386/sse4_2-pcmpistri-1.c +++ b/gcc/testsuite/gcc.target/i386/sse4_2-pcmpistri-1.c @@ -2,7 +2,16 @@ /* { dg-require-effective-target sse4 } */ /* { dg-options "-O2 -msse4.2" } */ -#include "sse4_2-check.h" +#ifndef CHECK_H +#define CHECK_H "sse4_2-check.h" +#endif + +#ifndef TEST +#define TEST sse4_2_test +#endif + +#include CHECK_H + #include "sse4_2-pcmpstr.h" #define NUM 1024 @@ -20,7 +29,7 @@ static void -sse4_2_test (void) +TEST (void) { union { diff --git a/gcc/testsuite/gcc.target/i386/sse4_2-pcmpistri-2.c b/gcc/testsuite/gcc.target/i386/sse4_2-pcmpistri-2.c index 6bad02e..5aea655 100644 --- a/gcc/testsuite/gcc.target/i386/sse4_2-pcmpistri-2.c +++ b/gcc/testsuite/gcc.target/i386/sse4_2-pcmpistri-2.c @@ -2,7 +2,16 @@ /* { dg-require-effective-target sse4 } */ /* { dg-options "-O2 -msse4.2" } */ -#include "sse4_2-check.h" +#ifndef CHECK_H +#define CHECK_H "sse4_2-check.h" +#endif + +#ifndef TEST +#define TEST sse4_2_test +#endif + +#include CHECK_H + #include "sse4_2-pcmpstr.h" #define NUM 1024 @@ -20,7 +29,7 @@ static void -sse4_2_test (void) +TEST (void) { union { diff --git a/gcc/testsuite/gcc.target/i386/sse4_2-pcmpistrm-1.c b/gcc/testsuite/gcc.target/i386/sse4_2-pcmpistrm-1.c index 3975728..b8ec890 100644 --- a/gcc/testsuite/gcc.target/i386/sse4_2-pcmpistrm-1.c +++ b/gcc/testsuite/gcc.target/i386/sse4_2-pcmpistrm-1.c @@ -2,7 +2,16 @@ /* { dg-require-effective-target sse4 } */ /* { dg-options "-O2 -msse4.2" } */ -#include "sse4_2-check.h" +#ifndef CHECK_H +#define CHECK_H "sse4_2-check.h" +#endif + +#ifndef TEST +#define TEST sse4_2_test +#endif + +#include CHECK_H + #include "sse4_2-pcmpstr.h" #define NUM 1024 @@ -20,7 +29,7 @@ static void -sse4_2_test (void) +TEST (void) { union { diff --git a/gcc/testsuite/gcc.target/i386/sse4_2-pcmpistrm-2.c b/gcc/testsuite/gcc.target/i386/sse4_2-pcmpistrm-2.c index 6d3a23a..c6896ee 100644 --- a/gcc/testsuite/gcc.target/i386/sse4_2-pcmpistrm-2.c +++ b/gcc/testsuite/gcc.target/i386/sse4_2-pcmpistrm-2.c @@ -2,7 +2,16 @@ /* { dg-require-effective-target sse4 } */ /* { dg-options "-O2 -msse4.2" } */ -#include "sse4_2-check.h" +#ifndef CHECK_H +#define CHECK_H "sse4_2-check.h" +#endif + +#ifndef TEST +#define TEST sse4_2_test +#endif + +#include CHECK_H + #include "sse4_2-pcmpstr.h" #define NUM 1024 @@ -19,7 +28,7 @@ | _SIDD_POSITIVE_POLARITY | _SIDD_UNIT_MASK) static void -sse4_2_test (void) +TEST (void) { union { diff --git a/gcc/testsuite/gcc.target/i386/ssse3-pabsb.c b/gcc/testsuite/gcc.target/i386/ssse3-pabsb.c index 1a2445d..7caa1b6 100644 --- a/gcc/testsuite/gcc.target/i386/ssse3-pabsb.c +++ b/gcc/testsuite/gcc.target/i386/ssse3-pabsb.c @@ -2,11 +2,20 @@ /* { dg-require-effective-target ssse3 } */ /* { dg-options "-O2 -fno-strict-aliasing -mssse3" } */ -#include "ssse3-check.h" -#include "ssse3-vals.h" +#ifndef CHECK_H +#define CHECK_H "ssse3-check.h" +#endif + +#ifndef TEST +#define TEST ssse3_test +#endif +#include CHECK_H + +#include "ssse3-vals.h" #include +#ifndef __AVX__ /* Test the 64-bit form */ static void ssse3_test_pabsb (int *i1, int *r) @@ -15,6 +24,7 @@ ssse3_test_pabsb (int *i1, int *r) *(__m64 *) r = _mm_abs_pi8 (t1); _mm_empty (); } +#endif /* Test the 128-bit form */ static void @@ -41,7 +51,7 @@ compute_correct_result (int *i1, int *r) } static void -ssse3_test (void) +TEST (void) { int i; int r [4] __attribute__ ((aligned(16))); @@ -53,10 +63,12 @@ ssse3_test (void) /* Manually compute the result */ compute_correct_result(&vals[i + 0], ck); +#ifndef __AVX__ /* Run the 64-bit tests */ ssse3_test_pabsb (&vals[i + 0], &r[0]); ssse3_test_pabsb (&vals[i + 2], &r[2]); fail += chk_128 (ck, r); +#endif /* Run the 128-bit tests */ ssse3_test_pabsb128 (&vals[i + 0], r); diff --git a/gcc/testsuite/gcc.target/i386/ssse3-pabsd.c b/gcc/testsuite/gcc.target/i386/ssse3-pabsd.c index 22eb512..3a73cf0 100644 --- a/gcc/testsuite/gcc.target/i386/ssse3-pabsd.c +++ b/gcc/testsuite/gcc.target/i386/ssse3-pabsd.c @@ -2,11 +2,21 @@ /* { dg-require-effective-target ssse3 } */ /* { dg-options "-O2 -fno-strict-aliasing -mssse3" } */ -#include "ssse3-check.h" +#ifndef CHECK_H +#define CHECK_H "ssse3-check.h" +#endif + +#ifndef TEST +#define TEST ssse3_test +#endif + +#include CHECK_H + #include "ssse3-vals.h" #include +#ifndef __AVX__ /* Test the 64-bit form */ static void ssse3_test_pabsd (int *i1, int *r) @@ -15,6 +25,7 @@ ssse3_test_pabsd (int *i1, int *r) *(__m64 *) r = _mm_abs_pi32 (t1); _mm_empty (); } +#endif /* Test the 128-bit form */ static void @@ -39,7 +50,7 @@ compute_correct_result (int *i1, int *r) } static void -ssse3_test (void) +TEST (void) { int i; int r [4] __attribute__ ((aligned(16))); @@ -51,10 +62,12 @@ ssse3_test (void) /* Manually compute the result */ compute_correct_result(&vals[i + 0], ck); +#ifndef __AVX__ /* Run the 64-bit tests */ ssse3_test_pabsd (&vals[i + 0], &r[0]); ssse3_test_pabsd (&vals[i + 2], &r[2]); fail += chk_128 (ck, r); +#endif /* Run the 128-bit tests */ ssse3_test_pabsd128 (&vals[i + 0], r); diff --git a/gcc/testsuite/gcc.target/i386/ssse3-pabsw.c b/gcc/testsuite/gcc.target/i386/ssse3-pabsw.c index aba4f05..67e4721 100644 --- a/gcc/testsuite/gcc.target/i386/ssse3-pabsw.c +++ b/gcc/testsuite/gcc.target/i386/ssse3-pabsw.c @@ -2,11 +2,21 @@ /* { dg-require-effective-target ssse3 } */ /* { dg-options "-O2 -fno-strict-aliasing -mssse3" } */ -#include "ssse3-check.h" +#ifndef CHECK_H +#define CHECK_H "ssse3-check.h" +#endif + +#ifndef TEST +#define TEST ssse3_test +#endif + +#include CHECK_H + #include "ssse3-vals.h" #include +#ifndef __AVX__ /* Test the 64-bit form */ static void ssse3_test_pabsw (int *i1, int *r) @@ -15,6 +25,7 @@ ssse3_test_pabsw (int *i1, int *r) *(__m64 *) r = _mm_abs_pi16 (t1); _mm_empty (); } +#endif /* Test the 128-bit form */ static void @@ -41,7 +52,7 @@ compute_correct_result (int *i1, int *r) } static void -ssse3_test (void) +TEST (void) { int i; int r [4] __attribute__ ((aligned(16))); @@ -53,10 +64,12 @@ ssse3_test (void) /* Manually compute the result */ compute_correct_result (&vals[i + 0], ck); +#ifndef __AVX__ /* Run the 64-bit tests */ ssse3_test_pabsw (&vals[i + 0], &r[0]); ssse3_test_pabsw (&vals[i + 2], &r[2]); fail += chk_128 (ck, r); +#endif /* Run the 128-bit tests */ ssse3_test_pabsw128 (&vals[i + 0], r); diff --git a/gcc/testsuite/gcc.target/i386/ssse3-palignr.c b/gcc/testsuite/gcc.target/i386/ssse3-palignr.c index 386cddb..dbee9be 100644 --- a/gcc/testsuite/gcc.target/i386/ssse3-palignr.c +++ b/gcc/testsuite/gcc.target/i386/ssse3-palignr.c @@ -2,12 +2,22 @@ /* { dg-require-effective-target ssse3 } */ /* { dg-options "-O2 -fno-strict-aliasing -mssse3" } */ -#include "ssse3-check.h" +#ifndef CHECK_H +#define CHECK_H "ssse3-check.h" +#endif + +#ifndef TEST +#define TEST ssse3_test +#endif + +#include CHECK_H + #include "ssse3-vals.h" #include #include +#ifndef __AVX__ /* Test the 64-bit form */ static void ssse3_test_palignr (int *i1, int *i2, unsigned int imm, int *r) @@ -72,6 +82,7 @@ ssse3_test_palignr (int *i1, int *i2, unsigned int imm, int *r) _mm_empty(); } +#endif /* Test the 128-bit form */ static void @@ -203,6 +214,7 @@ compute_correct_result_128 (int *i1, int *i2, unsigned int imm, int *r) bout[i] = buf[imm + i]; } +#ifndef __AVX__ static void compute_correct_result_64 (int *i1, int *i2, unsigned int imm, int *r) { @@ -230,9 +242,10 @@ compute_correct_result_64 (int *i1, int *i2, unsigned int imm, int *r) else bout[i + 8] = buf[imm + i]; } +#endif static void -ssse3_test (void) +TEST (void) { int i; int r [4] __attribute__ ((aligned(16))); @@ -243,6 +256,7 @@ ssse3_test (void) for (i = 0; i < 256; i += 8) for (imm = 0; imm < 100; imm++) { +#ifndef __AVX__ /* Manually compute the result */ compute_correct_result_64 (&vals[i + 0], &vals[i + 4], imm, ck); @@ -250,6 +264,7 @@ ssse3_test (void) ssse3_test_palignr (&vals[i + 0], &vals[i + 4], imm, &r[0]); ssse3_test_palignr (&vals[i + 2], &vals[i + 6], imm, &r[2]); fail += chk_128 (ck, r); +#endif /* Recompute the results for 128-bits */ compute_correct_result_128 (&vals[i + 0], &vals[i + 4], imm, ck); diff --git a/gcc/testsuite/gcc.target/i386/ssse3-phaddd.c b/gcc/testsuite/gcc.target/i386/ssse3-phaddd.c index 675d233..bef7816 100644 --- a/gcc/testsuite/gcc.target/i386/ssse3-phaddd.c +++ b/gcc/testsuite/gcc.target/i386/ssse3-phaddd.c @@ -2,11 +2,21 @@ /* { dg-require-effective-target ssse3 } */ /* { dg-options "-O2 -fno-strict-aliasing -mssse3" } */ -#include "ssse3-check.h" +#ifndef CHECK_H +#define CHECK_H "ssse3-check.h" +#endif + +#ifndef TEST +#define TEST ssse3_test +#endif + +#include CHECK_H + #include "ssse3-vals.h" #include +#ifndef __AVX__ /* Test the 64-bit form */ static void ssse3_test_phaddd (int *i1, int *i2, int *r) @@ -16,6 +26,7 @@ ssse3_test_phaddd (int *i1, int *i2, int *r) *(__m64 *) r = _mm_hadd_pi32 (t1, t2); _mm_empty(); } +#endif /* Test the 128-bit form */ static void @@ -40,7 +51,7 @@ compute_correct_result(int *i1, int *i2, int *r) } static void -ssse3_test (void) +TEST (void) { int i; int r [4] __attribute__ ((aligned(16))); @@ -53,10 +64,12 @@ ssse3_test (void) /* Manually compute the result */ compute_correct_result (&vals[i + 0], &vals[i + 4], ck); +#ifndef __AVX__ /* Run the 64-bit tests */ ssse3_test_phaddd (&vals[i + 0], &vals[i + 2], &r[0]); ssse3_test_phaddd (&vals[i + 4], &vals[i + 6], &r[2]); fail += chk_128 (ck, r); +#endif /* Run the 128-bit tests */ ssse3_test_phaddd128 (&vals[i + 0], &vals[i + 4], r); diff --git a/gcc/testsuite/gcc.target/i386/ssse3-phaddsw.c b/gcc/testsuite/gcc.target/i386/ssse3-phaddsw.c index 563dcdb..ff31fe5 100644 --- a/gcc/testsuite/gcc.target/i386/ssse3-phaddsw.c +++ b/gcc/testsuite/gcc.target/i386/ssse3-phaddsw.c @@ -2,11 +2,21 @@ /* { dg-require-effective-target ssse3 } */ /* { dg-options "-O2 -fno-strict-aliasing -mssse3" } */ -#include "ssse3-check.h" +#ifndef CHECK_H +#define CHECK_H "ssse3-check.h" +#endif + +#ifndef TEST +#define TEST ssse3_test +#endif + +#include CHECK_H + #include "ssse3-vals.h" #include +#ifndef __AVX__ /* Test the 64-bit form */ static void ssse3_test_phaddsw (int *i1, int *i2, int *r) @@ -16,6 +26,7 @@ ssse3_test_phaddsw (int *i1, int *i2, int *r) *(__m64 *) r = _mm_hadds_pi16 (t1, t2); _mm_empty (); } +#endif /* Test the 128-bit form */ static void @@ -55,7 +66,7 @@ compute_correct_result (int *i1, int *i2, int *r) } static void -ssse3_test (void) +TEST (void) { int i; int r [4] __attribute__ ((aligned(16))); @@ -67,10 +78,12 @@ ssse3_test (void) /* Manually compute the result */ compute_correct_result (&vals[i + 0], &vals[i + 4], ck); +#ifndef __AVX__ /* Run the 64-bit tests */ ssse3_test_phaddsw (&vals[i + 0], &vals[i + 2], &r[0]); ssse3_test_phaddsw (&vals[i + 4], &vals[i + 6], &r[2]); fail += chk_128 (ck, r); +#endif /* Run the 128-bit tests */ ssse3_test_phaddsw128 (&vals[i + 0], &vals[i + 4], r); diff --git a/gcc/testsuite/gcc.target/i386/ssse3-phaddw.c b/gcc/testsuite/gcc.target/i386/ssse3-phaddw.c index 008a0db..05c0afd 100644 --- a/gcc/testsuite/gcc.target/i386/ssse3-phaddw.c +++ b/gcc/testsuite/gcc.target/i386/ssse3-phaddw.c @@ -2,11 +2,21 @@ /* { dg-require-effective-target ssse3 } */ /* { dg-options "-O2 -fno-strict-aliasing -mssse3" } */ -#include "ssse3-check.h" +#ifndef CHECK_H +#define CHECK_H "ssse3-check.h" +#endif + +#ifndef TEST +#define TEST ssse3_test +#endif + +#include CHECK_H + #include "ssse3-vals.h" #include +#ifndef __AVX__ /* Test the 64-bit form */ static void ssse3_test_phaddw (int *i1, int *i2, int *r) @@ -16,6 +26,7 @@ ssse3_test_phaddw (int *i1, int *i2, int *r) *(__m64 *) r = _mm_hadd_pi16 (t1, t2); _mm_empty (); } +#endif /* Test the 128-bit form */ static void @@ -44,7 +55,7 @@ compute_correct_result(int *i1, int *i2, int *r) } static void -ssse3_test (void) +TEST (void) { int i; int r [4] __attribute__ ((aligned(16))); @@ -56,10 +67,12 @@ ssse3_test (void) /* Manually compute the result */ compute_correct_result (&vals[i + 0], &vals[i + 4], ck); +#ifndef __AVX__ /* Run the 64-bit tests */ ssse3_test_phaddw (&vals[i + 0], &vals[i + 2], &r[0]); ssse3_test_phaddw (&vals[i + 4], &vals[i + 6], &r[2]); fail += chk_128 (ck, r); +#endif /* Run the 128-bit tests */ ssse3_test_phaddw128 (&vals[i + 0], &vals[i + 4], r); diff --git a/gcc/testsuite/gcc.target/i386/ssse3-phsubd.c b/gcc/testsuite/gcc.target/i386/ssse3-phsubd.c index 19a1dc1..5884e5c 100644 --- a/gcc/testsuite/gcc.target/i386/ssse3-phsubd.c +++ b/gcc/testsuite/gcc.target/i386/ssse3-phsubd.c @@ -2,11 +2,21 @@ /* { dg-require-effective-target ssse3 } */ /* { dg-options "-O2 -fno-strict-aliasing -mssse3" } */ -#include "ssse3-check.h" +#ifndef CHECK_H +#define CHECK_H "ssse3-check.h" +#endif + +#ifndef TEST +#define TEST ssse3_test +#endif + +#include CHECK_H + #include "ssse3-vals.h" #include +#ifndef __AVX__ /* Test the 64-bit form */ static void ssse3_test_phsubd (int *i1, int *i2, int *r) @@ -16,6 +26,7 @@ ssse3_test_phsubd (int *i1, int *i2, int *r) *(__m64 *) r = _mm_hsub_pi32(t1, t2); _mm_empty (); } +#endif /* Test the 128-bit form */ static void @@ -40,7 +51,7 @@ compute_correct_result (int *i1, int *i2, int *r) } static void -ssse3_test (void) +TEST (void) { int i; int r [4] __attribute__ ((aligned(16))); @@ -52,10 +63,12 @@ ssse3_test (void) /* Manually compute the result */ compute_correct_result (&vals[i + 0], &vals[i + 4], ck); +#ifndef __AVX__ /* Run the 64-bit tests */ ssse3_test_phsubd (&vals[i + 0], &vals[i + 2], &r[0]); ssse3_test_phsubd (&vals[i + 4], &vals[i + 6], &r[2]); fail += chk_128 (ck, r); +#endif /* Run the 128-bit tests */ ssse3_test_phsubd128 (&vals[i + 0], &vals[i + 4], r); diff --git a/gcc/testsuite/gcc.target/i386/ssse3-phsubsw.c b/gcc/testsuite/gcc.target/i386/ssse3-phsubsw.c index 506844f..371c8d1 100644 --- a/gcc/testsuite/gcc.target/i386/ssse3-phsubsw.c +++ b/gcc/testsuite/gcc.target/i386/ssse3-phsubsw.c @@ -2,11 +2,21 @@ /* { dg-require-effective-target ssse3 } */ /* { dg-options "-O2 -fno-strict-aliasing -mssse3" } */ -#include "ssse3-check.h" +#ifndef CHECK_H +#define CHECK_H "ssse3-check.h" +#endif + +#ifndef TEST +#define TEST ssse3_test +#endif + +#include CHECK_H + #include "ssse3-vals.h" #include +#ifndef __AVX__ /* Test the 64-bit form */ static void ssse3_test_phsubsw (int *i1, int *i2, int *r) @@ -18,6 +28,7 @@ ssse3_test_phsubsw (int *i1, int *i2, int *r) _mm_empty (); } +#endif /* Test the 128-bit form */ static void @@ -58,7 +69,7 @@ compute_correct_result (int *i1, int *i2, int *r) } static void -ssse3_test (void) +TEST (void) { int i; int r [4] __attribute__ ((aligned(16))); @@ -70,10 +81,12 @@ ssse3_test (void) /* Manually compute the result */ compute_correct_result (&vals[i + 0], &vals[i + 4], ck); +#ifndef __AVX__ /* Run the 64-bit tests */ ssse3_test_phsubsw (&vals[i + 0], &vals[i + 2], &r[0]); ssse3_test_phsubsw (&vals[i + 4], &vals[i + 6], &r[2]); fail += chk_128 (ck, r); +#endif /* Run the 128-bit tests */ ssse3_test_phsubsw128 (&vals[i + 0], &vals[i + 4], r); diff --git a/gcc/testsuite/gcc.target/i386/ssse3-phsubw.c b/gcc/testsuite/gcc.target/i386/ssse3-phsubw.c index 7fd67fa..f3dbf9c 100644 --- a/gcc/testsuite/gcc.target/i386/ssse3-phsubw.c +++ b/gcc/testsuite/gcc.target/i386/ssse3-phsubw.c @@ -2,11 +2,20 @@ /* { dg-require-effective-target ssse3 } */ /* { dg-options "-O2 -fno-strict-aliasing -mssse3" } */ -#include "ssse3-check.h" +#ifndef CHECK_H +#define CHECK_H "ssse3-check.h" +#endif + +#ifndef TEST +#define TEST ssse3_test +#endif + +#include CHECK_H #include "ssse3-vals.h" #include +#ifndef __AVX__ /* Test the 64-bit form */ static void ssse3_test_phsubw (int *i1, int *i2, int *r) @@ -16,6 +25,7 @@ ssse3_test_phsubw (int *i1, int *i2, int *r) *(__m64 *) r = _mm_hsub_pi16 (t1, t2); _mm_empty (); } +#endif /* Test the 128-bit form */ static void @@ -44,7 +54,7 @@ compute_correct_result (int *i1, int *i2, int *r) } static void -ssse3_test (void) +TEST (void) { int i; int r [4] __attribute__ ((aligned(16))); @@ -56,10 +66,12 @@ ssse3_test (void) /* Manually compute the result */ compute_correct_result (&vals[i + 0], &vals[i + 4], ck); +#ifndef __AVX__ /* Run the 64-bit tests */ ssse3_test_phsubw (&vals[i + 0], &vals[i + 2], &r[0]); ssse3_test_phsubw (&vals[i + 4], &vals[i + 6], &r[2]); fail += chk_128 (ck, r); +#endif /* Run the 128-bit tests */ ssse3_test_phsubw128 (&vals[i + 0], &vals[i + 4], r); diff --git a/gcc/testsuite/gcc.target/i386/ssse3-pmaddubsw.c b/gcc/testsuite/gcc.target/i386/ssse3-pmaddubsw.c index 3a2a27c..00bfc84 100644 --- a/gcc/testsuite/gcc.target/i386/ssse3-pmaddubsw.c +++ b/gcc/testsuite/gcc.target/i386/ssse3-pmaddubsw.c @@ -2,11 +2,21 @@ /* { dg-require-effective-target ssse3 } */ /* { dg-options "-O2 -fno-strict-aliasing -mssse3" } */ -#include "ssse3-check.h" +#ifndef CHECK_H +#define CHECK_H "ssse3-check.h" +#endif + +#ifndef TEST +#define TEST ssse3_test +#endif + +#include CHECK_H + #include "ssse3-vals.h" #include +#ifndef __AVX__ /* Test the 64-bit form */ static void ssse3_test_pmaddubsw (int *i1, int *i2, int *r) @@ -16,6 +26,7 @@ ssse3_test_pmaddubsw (int *i1, int *i2, int *r) *(__m64 *) r = _mm_maddubs_pi16 (t1, t2); _mm_empty (); } +#endif /* Test the 128-bit form */ static void @@ -58,7 +69,7 @@ compute_correct_result (int *i1, int *i2, int *r) } static void -ssse3_test (void) +TEST (void) { int i; int r [4] __attribute__ ((aligned(16))); @@ -70,10 +81,12 @@ ssse3_test (void) /* Manually compute the result */ compute_correct_result (&vals[i + 0], &vals[i + 4], ck); +#ifndef __AVX__ /* Run the 64-bit tests */ ssse3_test_pmaddubsw (&vals[i + 0], &vals[i + 4], &r[0]); ssse3_test_pmaddubsw (&vals[i + 2], &vals[i + 6], &r[2]); fail += chk_128 (ck, r); +#endif /* Run the 128-bit tests */ ssse3_test_pmaddubsw128 (&vals[i + 0], &vals[i + 4], r); diff --git a/gcc/testsuite/gcc.target/i386/ssse3-pmulhrsw.c b/gcc/testsuite/gcc.target/i386/ssse3-pmulhrsw.c index 193c4fc..24570b3 100644 --- a/gcc/testsuite/gcc.target/i386/ssse3-pmulhrsw.c +++ b/gcc/testsuite/gcc.target/i386/ssse3-pmulhrsw.c @@ -2,11 +2,21 @@ /* { dg-require-effective-target ssse3 } */ /* { dg-options "-O2 -fno-strict-aliasing -mssse3" } */ -#include "ssse3-check.h" +#ifndef CHECK_H +#define CHECK_H "ssse3-check.h" +#endif + +#ifndef TEST +#define TEST ssse3_test +#endif + +#include CHECK_H + #include "ssse3-vals.h" #include +#ifndef __AVX__ /* Test the 64-bit form */ static void ssse3_test_pmulhrsw (int *i1, int *i2, int *r) @@ -16,6 +26,7 @@ ssse3_test_pmulhrsw (int *i1, int *i2, int *r) *(__m64 *) r = _mm_mulhrs_pi16 (t1, t2); _mm_empty (); } +#endif /* Test the 128-bit form */ static void @@ -45,7 +56,7 @@ compute_correct_result (int *i1, int *i2, int *r) } static void -ssse3_test (void) +TEST (void) { int i; int r [4] __attribute__ ((aligned(16))); @@ -57,10 +68,12 @@ ssse3_test (void) /* Manually compute the result */ compute_correct_result (&vals[i + 0], &vals[i + 4], ck); +#ifndef __AVX__ /* Run the 64-bit tests */ ssse3_test_pmulhrsw (&vals[i + 0], &vals[i + 4], &r[0]); ssse3_test_pmulhrsw (&vals[i + 2], &vals[i + 6], &r[2]); fail += chk_128 (ck, r); +#endif /* Run the 128-bit tests */ ssse3_test_pmulhrsw128 (&vals[i + 0], &vals[i + 4], r); diff --git a/gcc/testsuite/gcc.target/i386/ssse3-pshufb.c b/gcc/testsuite/gcc.target/i386/ssse3-pshufb.c index 0a24d9e..b995456 100644 --- a/gcc/testsuite/gcc.target/i386/ssse3-pshufb.c +++ b/gcc/testsuite/gcc.target/i386/ssse3-pshufb.c @@ -2,11 +2,21 @@ /* { dg-require-effective-target ssse3 } */ /* { dg-options "-O2 -fno-strict-aliasing -mssse3" } */ -#include "ssse3-check.h" +#ifndef CHECK_H +#define CHECK_H "ssse3-check.h" +#endif + +#ifndef TEST +#define TEST ssse3_test +#endif + +#include CHECK_H + #include "ssse3-vals.h" #include +#ifndef __AVX__ /* Test the 64-bit form */ static void ssse3_test_pshufb (int *i1, int *i2, int *r) @@ -16,6 +26,7 @@ ssse3_test_pshufb (int *i1, int *i2, int *r) *(__m64 *)r = _mm_shuffle_pi8 (t1, t2); _mm_empty (); } +#endif /* Test the 128-bit form */ static void @@ -27,6 +38,7 @@ ssse3_test_pshufb128 (int *i1, int *i2, int *r) *(__m128i *)r = _mm_shuffle_epi8 (t1, t2); } +#ifndef __AVX__ /* Routine to manually compute the results */ static void compute_correct_result_64 (int *i1, int *i2, int *r) @@ -48,6 +60,7 @@ compute_correct_result_64 (int *i1, int *i2, int *r) bout[i] = b1[8 + (select & 0x7)]; } } +#endif static void compute_correct_result_128 (int *i1, int *i2, int *r) @@ -69,7 +82,7 @@ compute_correct_result_128 (int *i1, int *i2, int *r) } static void -ssse3_test (void) +TEST (void) { int i; int r [4] __attribute__ ((aligned(16))); @@ -78,6 +91,7 @@ ssse3_test (void) for (i = 0; i < 256; i += 8) { +#ifndef __AVX__ /* Manually compute the result */ compute_correct_result_64 (&vals[i + 0], &vals[i + 4], ck); @@ -85,6 +99,7 @@ ssse3_test (void) ssse3_test_pshufb (&vals[i + 0], &vals[i + 4], &r[0]); ssse3_test_pshufb (&vals[i + 2], &vals[i + 6], &r[2]); fail += chk_128 (ck, r); +#endif /* Recompute the result for 128-bits */ compute_correct_result_128 (&vals[i + 0], &vals[i + 4], ck); diff --git a/gcc/testsuite/gcc.target/i386/ssse3-psignb.c b/gcc/testsuite/gcc.target/i386/ssse3-psignb.c index ba7617b..7462929 100644 --- a/gcc/testsuite/gcc.target/i386/ssse3-psignb.c +++ b/gcc/testsuite/gcc.target/i386/ssse3-psignb.c @@ -2,11 +2,20 @@ /* { dg-require-effective-target ssse3 } */ /* { dg-options "-O2 -fno-strict-aliasing -mssse3" } */ -#include "ssse3-check.h" +#ifndef CHECK_H +#define CHECK_H "ssse3-check.h" +#endif + +#ifndef TEST +#define TEST ssse3_test +#endif + +#include CHECK_H #include "ssse3-vals.h" #include +#ifndef __AVX__ /* Test the 64-bit form */ static void ssse3_test_psignb (int *i1, int *i2, int *r) @@ -16,6 +25,7 @@ ssse3_test_psignb (int *i1, int *i2, int *r) *(__m64 *) r = _mm_sign_pi8 (t1, t2); _mm_empty (); } +#endif /* Test the 128-bit form */ static void @@ -46,7 +56,7 @@ compute_correct_result (int *i1, int *i2, int *r) } static void -ssse3_test (void) +TEST (void) { int i; int r [4] __attribute__ ((aligned(16))); @@ -58,10 +68,12 @@ ssse3_test (void) /* Manually compute the result */ compute_correct_result (&vals[i + 0], &vals[i + 4], ck); +#ifndef __AVX__ /* Run the 64-bit tests */ ssse3_test_psignb (&vals[i + 0], &vals[i + 4], &r[0]); ssse3_test_psignb (&vals[i + 2], &vals[i + 6], &r[2]); fail += chk_128 (ck, r); +#endif /* Run the 128-bit tests */ ssse3_test_psignb128 (&vals[i + 0], &vals[i + 4], r); diff --git a/gcc/testsuite/gcc.target/i386/ssse3-psignd.c b/gcc/testsuite/gcc.target/i386/ssse3-psignd.c index 8b1ab4d..eca0489 100644 --- a/gcc/testsuite/gcc.target/i386/ssse3-psignd.c +++ b/gcc/testsuite/gcc.target/i386/ssse3-psignd.c @@ -2,11 +2,20 @@ /* { dg-require-effective-target ssse3 } */ /* { dg-options "-O2 -fno-strict-aliasing -mssse3" } */ -#include "ssse3-check.h" +#ifndef CHECK_H +#define CHECK_H "ssse3-check.h" +#endif + +#ifndef TEST +#define TEST ssse3_test +#endif + +#include CHECK_H #include "ssse3-vals.h" #include +#ifndef __AVX__ /* Test the 64-bit form */ static void ssse3_test_psignd (int *i1, int *i2, int *r) @@ -16,6 +25,7 @@ ssse3_test_psignd (int *i1, int *i2, int *r) *(__m64 *) r = _mm_sign_pi32 (t1, t2); _mm_empty (); } +#endif /* Test the 128-bit form */ static void @@ -43,7 +53,7 @@ compute_correct_result (int *i1, int *i2, int *r) } static void -ssse3_test (void) +TEST (void) { int i; int r [4] __attribute__ ((aligned(16))); @@ -55,10 +65,12 @@ ssse3_test (void) /* Manually compute the result */ compute_correct_result (&vals[i + 0], &vals[i + 4], ck); +#ifndef __AVX__ /* Run the 64-bit tests */ ssse3_test_psignd (&vals[i + 0], &vals[i + 4], &r[0]); ssse3_test_psignd (&vals[i + 2], &vals[i + 6], &r[2]); fail += chk_128 (ck, r); +#endif /* Run the 128-bit tests */ ssse3_test_psignd128 (&vals[i + 0], &vals[i + 4], r); diff --git a/gcc/testsuite/gcc.target/i386/ssse3-psignw.c b/gcc/testsuite/gcc.target/i386/ssse3-psignw.c index 04e9ed2..00a506f 100644 --- a/gcc/testsuite/gcc.target/i386/ssse3-psignw.c +++ b/gcc/testsuite/gcc.target/i386/ssse3-psignw.c @@ -2,11 +2,20 @@ /* { dg-require-effective-target ssse3 } */ /* { dg-options "-O2 -fno-strict-aliasing -mssse3" } */ -#include "ssse3-check.h" +#ifndef CHECK_H +#define CHECK_H "ssse3-check.h" +#endif + +#ifndef TEST +#define TEST ssse3_test +#endif + +#include CHECK_H #include "ssse3-vals.h" #include +#ifndef __AVX__ /* Test the 64-bit form */ static void ssse3_test_psignw (int *i1, int *i2, int *r) @@ -16,6 +25,7 @@ ssse3_test_psignw (int *i1, int *i2, int *r) *(__m64 *) r = _mm_sign_pi16 (t1, t2); _mm_empty (); } +#endif /* Test the 128-bit form */ static void @@ -46,7 +56,7 @@ compute_correct_result (int *i1, int *i2, int *r) } static void -ssse3_test (void) +TEST (void) { int i; int r [4] __attribute__ ((aligned(16))); @@ -58,10 +68,12 @@ ssse3_test (void) /* Manually compute the result */ compute_correct_result (&vals[i + 0], &vals[i + 4], ck); +#ifndef __AVX__ /* Run the 64-bit tests */ ssse3_test_psignw (&vals[i + 0], &vals[i + 4], &r[0]); ssse3_test_psignw (&vals[i + 2], &vals[i + 6], &r[2]); fail += chk_128 (ck, r); +#endif /* Run the 128-bit tests */ ssse3_test_psignw128 (&vals[i + 0], &vals[i + 4], r); diff --git a/gcc/testsuite/gcc.target/i386/vararg-10.c b/gcc/testsuite/gcc.target/i386/vararg-10.c new file mode 100644 index 0000000..0536498 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/vararg-10.c @@ -0,0 +1,112 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-mavx" } */ + +#include +#include + +#include "avx-check.h" + +struct m256d +{ + __m256d v; +}; + +__m128 n1 = { -283.3, -23.3, 213.4, 1119.03 }; +struct m256d n2 = { { -93.83, 893.318, 3994.3, -39484.0 } }; +__m128i n3 = { 893, -3180 } ; +int n4 = 324; +double n5 = 103.3; +__m128i n6 = { -123, 2 }; +__m128d n7 = { -91.387, -8193.518 }; +struct m256d n8 = { { -123.3, 2.3, 3.4, -10.03 } }; +__m128 n9 = { -123.3, 2.3, 3.4, -10.03 }; +__m128i n10 = { 1233, -100 }; +int n11 = 407; +double n12 = 304.9; +__m128i n13 = { 233, -110 }; +__m256i n14 = { -1233, 23, 34, -1003 }; +__m128i n15 = { -393, -180 }; +__m128d n16 = { 73.0, 63.18 }; +__m256 n17 = { -183.3, -22.3, 13.9, -119.3, 483.1, 122.3, -33.4, -9.37 }; +__m128 n18 = { -183.3, 22.3, 13.4, -19.03 }; + +__m128 e1; +struct m256d e2; +__m128i e3; +int e4; +double e5; +__m128i e6; +__m128d e7; +struct m256d e8; +__m128 e9; +__m128i e10; +int e11; +double e12; +__m128i e13; +__m256i e14; +__m128i e15; +__m128d e16; +__m256 e17; +__m128 e18; + +static void +__attribute__((noinline)) +foo (va_list va_arglist) +{ + e4 = va_arg (va_arglist, int); + e5 = va_arg (va_arglist, double); + e6 = va_arg (va_arglist, __m128i); + e7 = va_arg (va_arglist, __m128d); + e8 = va_arg (va_arglist, struct m256d); + e9 = va_arg (va_arglist, __m128); + e10 = va_arg (va_arglist, __m128i); + e11 = va_arg (va_arglist, int); + e12 = va_arg (va_arglist, double); + e13 = va_arg (va_arglist, __m128i); + e14 = va_arg (va_arglist, __m256i); + e15 = va_arg (va_arglist, __m128i); + e16 = va_arg (va_arglist, __m128d); + e17 = va_arg (va_arglist, __m256); + e18 = va_arg (va_arglist, __m128); + va_end (va_arglist); +} + +static void +__attribute__((noinline)) +test (__m128 a1, struct m256d a2, __m128i a3, ...) +{ + va_list va_arglist; + + e1 = a1; + e2 = a2; + e3 = a3; + va_start (va_arglist, a3); + foo (va_arglist); + va_end (va_arglist); +} + +static void +avx_test (void) +{ + test (n1, n2, n3, n4, n5, n6, n7, n8, n9, n10, n11, n12, + n13, n14, n15, n16, n17, n18); + assert (__builtin_memcmp (&e1, &n1, sizeof (e1)) == 0); + assert (__builtin_memcmp (&e2, &n2, sizeof (e2)) == 0); + assert (__builtin_memcmp (&e3, &n3, sizeof (e3)) == 0); + assert (n4 == e4); + assert (n5 == e5); + assert (__builtin_memcmp (&e6, &n6, sizeof (e6)) == 0); + assert (__builtin_memcmp (&e7, &n7, sizeof (e7)) == 0); + assert (__builtin_memcmp (&e8, &n8, sizeof (e8)) == 0); + assert (__builtin_memcmp (&e9, &n9, sizeof (e9)) == 0); + assert (__builtin_memcmp (&e10, &n10, sizeof (e10)) == 0); + assert (n11 == e11); + assert (n12 == e12); + assert (__builtin_memcmp (&e13, &n13, sizeof (e13)) == 0); + assert (__builtin_memcmp (&e14, &n14, sizeof (e14)) == 0); + assert (__builtin_memcmp (&e15, &n15, sizeof (e15)) == 0); + assert (__builtin_memcmp (&e16, &n16, sizeof (e16)) == 0); + assert (__builtin_memcmp (&e17, &n17, sizeof (e17)) == 0); + assert (__builtin_memcmp (&e18, &n18, sizeof (e18)) == 0); +} diff --git a/gcc/testsuite/gcc.target/i386/vararg-3.c b/gcc/testsuite/gcc.target/i386/vararg-3.c new file mode 100644 index 0000000..a6b5876 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/vararg-3.c @@ -0,0 +1,85 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#include +#include + +#include "sse2-check.h" + +__m128 n1 = { -283.3, -23.3, 213.4, 1119.03 }; +__m128d n2 = { -93.83, 893.318 }; +__m128i n3 = { 893, -3180 } ; +int n4 = 324; +double n5 = 103.3; +__m128i n6 = { -123, 2 }; +__m128d n7 = { -91.387, -8193.518 }; +__m128 n8 = { -123.3, 2.3, 3.4, -10.03 }; +__m128i n9 = { 1233, -100 }; +int n10 = 407; +double n11 = 304.9; +__m128i n12 = { 233, -110 }; +__m128i n13 = { -393, -180 }; +__m128d n14 = { 73.0, 63.18 }; +__m128 n15 = { -183.3, 22.3, 13.4, -19.03 }; + +__m128 e1; +__m128d e2; +__m128i e3; +int e4; +double e5; +__m128i e6; +__m128d e7; +__m128 e8; +__m128i e9; +int e10; +double e11; +__m128i e12; +__m128i e13; +__m128d e14; +__m128 e15; + +static void +__attribute__((noinline)) +test (__m128 a1, __m128d a2, __m128i a3, ...) +{ + va_list va_arglist; + + e1 = a1; + e2 = a2; + e3 = a3; + va_start (va_arglist, a3); + e4 = va_arg (va_arglist, int); + e5 = va_arg (va_arglist, double); + e6 = va_arg (va_arglist, __m128i); + e7 = va_arg (va_arglist, __m128d); + e8 = va_arg (va_arglist, __m128); + e9 = va_arg (va_arglist, __m128i); + e10 = va_arg (va_arglist, int); + e11 = va_arg (va_arglist, double); + e12 = va_arg (va_arglist, __m128i); + e13 = va_arg (va_arglist, __m128i); + e14 = va_arg (va_arglist, __m128d); + e15 = va_arg (va_arglist, __m128); + va_end (va_arglist); +} + +static void +sse2_test (void) +{ + test (n1, n2, n3, n4, n5, n6, n7, n8, n9, n10, n11, n12, n13, n14, n15); + assert (__builtin_memcmp (&e1, &n1, sizeof (e1)) == 0); + assert (__builtin_memcmp (&e2, &n2, sizeof (e2)) == 0); + assert (__builtin_memcmp (&e3, &n3, sizeof (e3)) == 0); + assert (n4 == e4); + assert (n5 == e5); + assert (__builtin_memcmp (&e6, &n6, sizeof (e6)) == 0); + assert (__builtin_memcmp (&e7, &n7, sizeof (e7)) == 0); + assert (__builtin_memcmp (&e8, &n8, sizeof (e8)) == 0); + assert (__builtin_memcmp (&e9, &n9, sizeof (e9)) == 0); + assert (n10 == e10); + assert (n11 == e11); + assert (__builtin_memcmp (&e12, &n12, sizeof (e12)) == 0); + assert (__builtin_memcmp (&e13, &n13, sizeof (e13)) == 0); + assert (__builtin_memcmp (&e14, &n14, sizeof (e14)) == 0); + assert (__builtin_memcmp (&e15, &n15, sizeof (e15)) == 0); +} diff --git a/gcc/testsuite/gcc.target/i386/vararg-4.c b/gcc/testsuite/gcc.target/i386/vararg-4.c new file mode 100644 index 0000000..e2f83b0 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/vararg-4.c @@ -0,0 +1,92 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#include +#include + +#include "sse2-check.h" + +__m128 n1 = { -283.3, -23.3, 213.4, 1119.03 }; +__m128d n2 = { -93.83, 893.318 }; +__m128i n3 = { 893, -3180 } ; +int n4 = 324; +double n5 = 103.3; +__m128i n6 = { -123, 2 }; +__m128d n7 = { -91.387, -8193.518 }; +__m128 n8 = { -123.3, 2.3, 3.4, -10.03 }; +__m128i n9 = { 1233, -100 }; +int n10 = 407; +double n11 = 304.9; +__m128i n12 = { 233, -110 }; +__m128i n13 = { -393, -180 }; +__m128d n14 = { 73.0, 63.18 }; +__m128 n15 = { -183.3, 22.3, 13.4, -19.03 }; + +__m128 e1; +__m128d e2; +__m128i e3; +int e4; +double e5; +__m128i e6; +__m128d e7; +__m128 e8; +__m128i e9; +int e10; +double e11; +__m128i e12; +__m128i e13; +__m128d e14; +__m128 e15; + +static void +__attribute__((noinline)) +foo (va_list va_arglist) +{ + e4 = va_arg (va_arglist, int); + e5 = va_arg (va_arglist, double); + e6 = va_arg (va_arglist, __m128i); + e7 = va_arg (va_arglist, __m128d); + e8 = va_arg (va_arglist, __m128); + e9 = va_arg (va_arglist, __m128i); + e10 = va_arg (va_arglist, int); + e11 = va_arg (va_arglist, double); + e12 = va_arg (va_arglist, __m128i); + e13 = va_arg (va_arglist, __m128i); + e14 = va_arg (va_arglist, __m128d); + e15 = va_arg (va_arglist, __m128); +} + +static void +__attribute__((noinline)) +test (__m128 a1, __m128d a2, __m128i a3, ...) +{ + va_list va_arglist; + + e1 = a1; + e2 = a2; + e3 = a3; + va_start (va_arglist, a3); + foo (va_arglist); + va_end (va_arglist); +} + +static void +sse2_test (void) +{ + test (n1, n2, n3, n4, n5, n6, n7, n8, n9, n10, n11, n12, n13, n14, n15); + assert (__builtin_memcmp (&e1, &n1, sizeof (e1)) == 0); + assert (__builtin_memcmp (&e2, &n2, sizeof (e2)) == 0); + assert (__builtin_memcmp (&e3, &n3, sizeof (e3)) == 0); + assert (n4 == e4); + assert (n5 == e5); + assert (__builtin_memcmp (&e6, &n6, sizeof (e6)) == 0); + assert (__builtin_memcmp (&e7, &n7, sizeof (e7)) == 0); + assert (__builtin_memcmp (&e8, &n8, sizeof (e8)) == 0); + assert (__builtin_memcmp (&e9, &n9, sizeof (e9)) == 0); + assert (n10 == e10); + assert (n11 == e11); + assert (__builtin_memcmp (&e12, &n12, sizeof (e12)) == 0); + assert (__builtin_memcmp (&e13, &n13, sizeof (e13)) == 0); + assert (__builtin_memcmp (&e14, &n14, sizeof (e14)) == 0); + assert (__builtin_memcmp (&e15, &n15, sizeof (e15)) == 0); +} diff --git a/gcc/testsuite/gcc.target/i386/vararg-5.c b/gcc/testsuite/gcc.target/i386/vararg-5.c new file mode 100644 index 0000000..03ff60c --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/vararg-5.c @@ -0,0 +1,99 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-mavx" } */ + +#include +#include + +#include "avx-check.h" + +__m128 n1 = { -283.3, -23.3, 213.4, 1119.03 }; +__m256d n2 = { -93.83, 893.318, 3994.3, -39484.0 }; +__m128i n3 = { 893, -3180 } ; +int n4 = 324; +double n5 = 103.3; +__m128i n6 = { -123, 2 }; +__m128d n7 = { -91.387, -8193.518 }; +__m256d n8 = { -123.3, 2.3, 3.4, -10.03 }; +__m128 n9 = { -123.3, 2.3, 3.4, -10.03 }; +__m128i n10 = { 1233, -100 }; +int n11 = 407; +double n12 = 304.9; +__m128i n13 = { 233, -110 }; +__m256i n14 = { -1233, 23, 34, -1003 }; +__m128i n15 = { -393, -180 }; +__m128d n16 = { 73.0, 63.18 }; +__m256 n17 = { -183.3, -22.3, 13.9, -119.3, 483.1, 122.3, -33.4, -9.37 }; +__m128 n18 = { -183.3, 22.3, 13.4, -19.03 }; + +__m128 e1; +__m256d e2; +__m128i e3; +int e4; +double e5; +__m128i e6; +__m128d e7; +__m256d e8; +__m128 e9; +__m128i e10; +int e11; +double e12; +__m128i e13; +__m256i e14; +__m128i e15; +__m128d e16; +__m256 e17; +__m128 e18; + +static void +__attribute__((noinline)) +test (__m128 a1, __m256d a2, __m128i a3, ...) +{ + va_list va_arglist; + + e1 = a1; + e2 = a2; + e3 = a3; + va_start (va_arglist, a3); + e4 = va_arg (va_arglist, int); + e5 = va_arg (va_arglist, double); + e6 = va_arg (va_arglist, __m128i); + e7 = va_arg (va_arglist, __m128d); + e8 = va_arg (va_arglist, __m256d); + e9 = va_arg (va_arglist, __m128); + e10 = va_arg (va_arglist, __m128i); + e11 = va_arg (va_arglist, int); + e12 = va_arg (va_arglist, double); + e13 = va_arg (va_arglist, __m128i); + e14 = va_arg (va_arglist, __m256i); + e15 = va_arg (va_arglist, __m128i); + e16 = va_arg (va_arglist, __m128d); + e17 = va_arg (va_arglist, __m256); + e18 = va_arg (va_arglist, __m128); + va_end (va_arglist); +} + +static void +avx_test (void) +{ + test (n1, n2, n3, n4, n5, n6, n7, n8, n9, n10, n11, n12, + n13, n14, n15, n16, n17, n18); + assert (__builtin_memcmp (&e1, &n1, sizeof (e1)) == 0); + assert (__builtin_memcmp (&e2, &n2, sizeof (e2)) == 0); + assert (__builtin_memcmp (&e3, &n3, sizeof (e3)) == 0); + assert (n4 == e4); + assert (n5 == e5); + assert (__builtin_memcmp (&e6, &n6, sizeof (e6)) == 0); + assert (__builtin_memcmp (&e7, &n7, sizeof (e7)) == 0); + assert (__builtin_memcmp (&e8, &n8, sizeof (e8)) == 0); + assert (__builtin_memcmp (&e9, &n9, sizeof (e9)) == 0); + assert (__builtin_memcmp (&e10, &n10, sizeof (e10)) == 0); + assert (n11 == e11); + assert (n12 == e12); + assert (__builtin_memcmp (&e13, &n13, sizeof (e13)) == 0); + assert (__builtin_memcmp (&e14, &n14, sizeof (e14)) == 0); + assert (__builtin_memcmp (&e15, &n15, sizeof (e15)) == 0); + assert (__builtin_memcmp (&e16, &n16, sizeof (e16)) == 0); + assert (__builtin_memcmp (&e17, &n17, sizeof (e17)) == 0); + assert (__builtin_memcmp (&e18, &n18, sizeof (e18)) == 0); +} diff --git a/gcc/testsuite/gcc.target/i386/vararg-6.c b/gcc/testsuite/gcc.target/i386/vararg-6.c new file mode 100644 index 0000000..5c645c4 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/vararg-6.c @@ -0,0 +1,107 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-mavx" } */ + +#include +#include + +#include "avx-check.h" + +__m128 n1 = { -283.3, -23.3, 213.4, 1119.03 }; +__m256d n2 = { -93.83, 893.318, 3994.3, -39484.0 }; +__m128i n3 = { 893, -3180 } ; +int n4 = 324; +double n5 = 103.3; +__m128i n6 = { -123, 2 }; +__m128d n7 = { -91.387, -8193.518 }; +__m256d n8 = { -123.3, 2.3, 3.4, -10.03 }; +__m128 n9 = { -123.3, 2.3, 3.4, -10.03 }; +__m128i n10 = { 1233, -100 }; +int n11 = 407; +double n12 = 304.9; +__m128i n13 = { 233, -110 }; +__m256i n14 = { -1233, 23, 34, -1003 }; +__m128i n15 = { -393, -180 }; +__m128d n16 = { 73.0, 63.18 }; +__m256 n17 = { -183.3, -22.3, 13.9, -119.3, 483.1, 122.3, -33.4, -9.37 }; +__m128 n18 = { -183.3, 22.3, 13.4, -19.03 }; + +__m128 e1; +__m256d e2; +__m128i e3; +int e4; +double e5; +__m128i e6; +__m128d e7; +__m256d e8; +__m128 e9; +__m128i e10; +int e11; +double e12; +__m128i e13; +__m256i e14; +__m128i e15; +__m128d e16; +__m256 e17; +__m128 e18; + +static void +__attribute__((noinline)) +foo (va_list va_arglist) +{ + e4 = va_arg (va_arglist, int); + e5 = va_arg (va_arglist, double); + e6 = va_arg (va_arglist, __m128i); + e7 = va_arg (va_arglist, __m128d); + e8 = va_arg (va_arglist, __m256d); + e9 = va_arg (va_arglist, __m128); + e10 = va_arg (va_arglist, __m128i); + e11 = va_arg (va_arglist, int); + e12 = va_arg (va_arglist, double); + e13 = va_arg (va_arglist, __m128i); + e14 = va_arg (va_arglist, __m256i); + e15 = va_arg (va_arglist, __m128i); + e16 = va_arg (va_arglist, __m128d); + e17 = va_arg (va_arglist, __m256); + e18 = va_arg (va_arglist, __m128); + va_end (va_arglist); +} + +static void +__attribute__((noinline)) +test (__m128 a1, __m256d a2, __m128i a3, ...) +{ + va_list va_arglist; + + e1 = a1; + e2 = a2; + e3 = a3; + va_start (va_arglist, a3); + foo (va_arglist); + va_end (va_arglist); +} + +static void +avx_test (void) +{ + test (n1, n2, n3, n4, n5, n6, n7, n8, n9, n10, n11, n12, + n13, n14, n15, n16, n17, n18); + assert (__builtin_memcmp (&e1, &n1, sizeof (e1)) == 0); + assert (__builtin_memcmp (&e2, &n2, sizeof (e2)) == 0); + assert (__builtin_memcmp (&e3, &n3, sizeof (e3)) == 0); + assert (n4 == e4); + assert (n5 == e5); + assert (__builtin_memcmp (&e6, &n6, sizeof (e6)) == 0); + assert (__builtin_memcmp (&e7, &n7, sizeof (e7)) == 0); + assert (__builtin_memcmp (&e8, &n8, sizeof (e8)) == 0); + assert (__builtin_memcmp (&e9, &n9, sizeof (e9)) == 0); + assert (__builtin_memcmp (&e10, &n10, sizeof (e10)) == 0); + assert (n11 == e11); + assert (n12 == e12); + assert (__builtin_memcmp (&e13, &n13, sizeof (e13)) == 0); + assert (__builtin_memcmp (&e14, &n14, sizeof (e14)) == 0); + assert (__builtin_memcmp (&e15, &n15, sizeof (e15)) == 0); + assert (__builtin_memcmp (&e16, &n16, sizeof (e16)) == 0); + assert (__builtin_memcmp (&e17, &n17, sizeof (e17)) == 0); + assert (__builtin_memcmp (&e18, &n18, sizeof (e18)) == 0); +} diff --git a/gcc/testsuite/gcc.target/i386/vararg-7.c b/gcc/testsuite/gcc.target/i386/vararg-7.c new file mode 100644 index 0000000..bebf609 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/vararg-7.c @@ -0,0 +1,90 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#include +#include + +#include "sse2-check.h" + +struct m128 +{ + __m128 v; +}; + +struct m128 n1 = { { -283.3, -23.3, 213.4, 1119.03 } }; +__m128d n2 = { -93.83, 893.318 }; +__m128i n3 = { 893, -3180 } ; +int n4 = 324; +double n5 = 103.3; +__m128i n6 = { -123, 2 }; +__m128d n7 = { -91.387, -8193.518 }; +struct m128 n8 = { { -123.3, 2.3, 3.4, -10.03 } }; +__m128i n9 = { 1233, -100 }; +int n10 = 407; +double n11 = 304.9; +__m128i n12 = { 233, -110 }; +__m128i n13 = { -393, -180 }; +__m128d n14 = { 73.0, 63.18 }; +struct m128 n15 = { { -183.3, 22.3, 13.4, -19.03 } }; + +struct m128 e1; +__m128d e2; +__m128i e3; +int e4; +double e5; +__m128i e6; +__m128d e7; +struct m128 e8; +__m128i e9; +int e10; +double e11; +__m128i e12; +__m128i e13; +__m128d e14; +struct m128 e15; + +static void +__attribute__((noinline)) +test (struct m128 a1, __m128d a2, __m128i a3, ...) +{ + va_list va_arglist; + + e1 = a1; + e2 = a2; + e3 = a3; + va_start (va_arglist, a3); + e4 = va_arg (va_arglist, int); + e5 = va_arg (va_arglist, double); + e6 = va_arg (va_arglist, __m128i); + e7 = va_arg (va_arglist, __m128d); + e8 = va_arg (va_arglist, struct m128); + e9 = va_arg (va_arglist, __m128i); + e10 = va_arg (va_arglist, int); + e11 = va_arg (va_arglist, double); + e12 = va_arg (va_arglist, __m128i); + e13 = va_arg (va_arglist, __m128i); + e14 = va_arg (va_arglist, __m128d); + e15 = va_arg (va_arglist, struct m128); + va_end (va_arglist); +} + +static void +sse2_test (void) +{ + test (n1, n2, n3, n4, n5, n6, n7, n8, n9, n10, n11, n12, n13, n14, n15); + assert (__builtin_memcmp (&e1, &n1, sizeof (e1)) == 0); + assert (__builtin_memcmp (&e2, &n2, sizeof (e2)) == 0); + assert (__builtin_memcmp (&e3, &n3, sizeof (e3)) == 0); + assert (n4 == e4); + assert (n5 == e5); + assert (__builtin_memcmp (&e6, &n6, sizeof (e6)) == 0); + assert (__builtin_memcmp (&e7, &n7, sizeof (e7)) == 0); + assert (__builtin_memcmp (&e8, &n8, sizeof (e8)) == 0); + assert (__builtin_memcmp (&e9, &n9, sizeof (e9)) == 0); + assert (n10 == e10); + assert (n11 == e11); + assert (__builtin_memcmp (&e12, &n12, sizeof (e12)) == 0); + assert (__builtin_memcmp (&e13, &n13, sizeof (e13)) == 0); + assert (__builtin_memcmp (&e14, &n14, sizeof (e14)) == 0); + assert (__builtin_memcmp (&e15, &n15, sizeof (e15)) == 0); +} diff --git a/gcc/testsuite/gcc.target/i386/vararg-8.c b/gcc/testsuite/gcc.target/i386/vararg-8.c new file mode 100644 index 0000000..bf6d3b5 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/vararg-8.c @@ -0,0 +1,97 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse2" } */ + +#include +#include + +#include "sse2-check.h" + +struct m128 +{ + __m128 v; +}; + +struct m128 n1 = { { -283.3, -23.3, 213.4, 1119.03 } }; +__m128d n2 = { -93.83, 893.318 }; +__m128i n3 = { 893, -3180 } ; +int n4 = 324; +double n5 = 103.3; +__m128i n6 = { -123, 2 }; +__m128d n7 = { -91.387, -8193.518 }; +struct m128 n8 = { { -123.3, 2.3, 3.4, -10.03 } }; +__m128i n9 = { 1233, -100 }; +int n10 = 407; +double n11 = 304.9; +__m128i n12 = { 233, -110 }; +__m128i n13 = { -393, -180 }; +__m128d n14 = { 73.0, 63.18 }; +struct m128 n15 = { { -183.3, 22.3, 13.4, -19.03 } }; + +struct m128 e1; +__m128d e2; +__m128i e3; +int e4; +double e5; +__m128i e6; +__m128d e7; +struct m128 e8; +__m128i e9; +int e10; +double e11; +__m128i e12; +__m128i e13; +__m128d e14; +struct m128 e15; + +static void +__attribute__((noinline)) +foo (va_list va_arglist) +{ + e4 = va_arg (va_arglist, int); + e5 = va_arg (va_arglist, double); + e6 = va_arg (va_arglist, __m128i); + e7 = va_arg (va_arglist, __m128d); + e8 = va_arg (va_arglist, struct m128); + e9 = va_arg (va_arglist, __m128i); + e10 = va_arg (va_arglist, int); + e11 = va_arg (va_arglist, double); + e12 = va_arg (va_arglist, __m128i); + e13 = va_arg (va_arglist, __m128i); + e14 = va_arg (va_arglist, __m128d); + e15 = va_arg (va_arglist, struct m128); +} + +static void +__attribute__((noinline)) +test (struct m128 a1, __m128d a2, __m128i a3, ...) +{ + va_list va_arglist; + + e1 = a1; + e2 = a2; + e3 = a3; + va_start (va_arglist, a3); + foo (va_arglist); + va_end (va_arglist); +} + +static void +sse2_test (void) +{ + test (n1, n2, n3, n4, n5, n6, n7, n8, n9, n10, n11, n12, n13, n14, n15); + assert (__builtin_memcmp (&e1, &n1, sizeof (e1)) == 0); + assert (__builtin_memcmp (&e2, &n2, sizeof (e2)) == 0); + assert (__builtin_memcmp (&e3, &n3, sizeof (e3)) == 0); + assert (n4 == e4); + assert (n5 == e5); + assert (__builtin_memcmp (&e6, &n6, sizeof (e6)) == 0); + assert (__builtin_memcmp (&e7, &n7, sizeof (e7)) == 0); + assert (__builtin_memcmp (&e8, &n8, sizeof (e8)) == 0); + assert (__builtin_memcmp (&e9, &n9, sizeof (e9)) == 0); + assert (n10 == e10); + assert (n11 == e11); + assert (__builtin_memcmp (&e12, &n12, sizeof (e12)) == 0); + assert (__builtin_memcmp (&e13, &n13, sizeof (e13)) == 0); + assert (__builtin_memcmp (&e14, &n14, sizeof (e14)) == 0); + assert (__builtin_memcmp (&e15, &n15, sizeof (e15)) == 0); +} diff --git a/gcc/testsuite/gcc.target/i386/vararg-9.c b/gcc/testsuite/gcc.target/i386/vararg-9.c new file mode 100644 index 0000000..581abb1 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/vararg-9.c @@ -0,0 +1,104 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-mavx" } */ + +#include +#include + +#include "avx-check.h" + +struct m256d +{ + __m256d v; +}; + +__m128 n1 = { -283.3, -23.3, 213.4, 1119.03 }; +struct m256d n2 = { { -93.83, 893.318, 3994.3, -39484.0 } }; +__m128i n3 = { 893, -3180 } ; +int n4 = 324; +double n5 = 103.3; +__m128i n6 = { -123, 2 }; +__m128d n7 = { -91.387, -8193.518 }; +struct m256d n8 = { { -123.3, 2.3, 3.4, -10.03 } }; +__m128 n9 = { -123.3, 2.3, 3.4, -10.03 }; +__m128i n10 = { 1233, -100 }; +int n11 = 407; +double n12 = 304.9; +__m128i n13 = { 233, -110 }; +__m256i n14 = { -1233, 23, 34, -1003 }; +__m128i n15 = { -393, -180 }; +__m128d n16 = { 73.0, 63.18 }; +__m256 n17 = { -183.3, -22.3, 13.9, -119.3, 483.1, 122.3, -33.4, -9.37 }; +__m128 n18 = { -183.3, 22.3, 13.4, -19.03 }; + +__m128 e1; +struct m256d e2; +__m128i e3; +int e4; +double e5; +__m128i e6; +__m128d e7; +struct m256d e8; +__m128 e9; +__m128i e10; +int e11; +double e12; +__m128i e13; +__m256i e14; +__m128i e15; +__m128d e16; +__m256 e17; +__m128 e18; + +static void +__attribute__((noinline)) +test (__m128 a1, struct m256d a2, __m128i a3, ...) +{ + va_list va_arglist; + + e1 = a1; + e2 = a2; + e3 = a3; + va_start (va_arglist, a3); + e4 = va_arg (va_arglist, int); + e5 = va_arg (va_arglist, double); + e6 = va_arg (va_arglist, __m128i); + e7 = va_arg (va_arglist, __m128d); + e8 = va_arg (va_arglist, struct m256d); + e9 = va_arg (va_arglist, __m128); + e10 = va_arg (va_arglist, __m128i); + e11 = va_arg (va_arglist, int); + e12 = va_arg (va_arglist, double); + e13 = va_arg (va_arglist, __m128i); + e14 = va_arg (va_arglist, __m256i); + e15 = va_arg (va_arglist, __m128i); + e16 = va_arg (va_arglist, __m128d); + e17 = va_arg (va_arglist, __m256); + e18 = va_arg (va_arglist, __m128); + va_end (va_arglist); +} + +static void +avx_test (void) +{ + test (n1, n2, n3, n4, n5, n6, n7, n8, n9, n10, n11, n12, + n13, n14, n15, n16, n17, n18); + assert (__builtin_memcmp (&e1, &n1, sizeof (e1)) == 0); + assert (__builtin_memcmp (&e2, &n2, sizeof (e2)) == 0); + assert (__builtin_memcmp (&e3, &n3, sizeof (e3)) == 0); + assert (n4 == e4); + assert (n5 == e5); + assert (__builtin_memcmp (&e6, &n6, sizeof (e6)) == 0); + assert (__builtin_memcmp (&e7, &n7, sizeof (e7)) == 0); + assert (__builtin_memcmp (&e8, &n8, sizeof (e8)) == 0); + assert (__builtin_memcmp (&e9, &n9, sizeof (e9)) == 0); + assert (__builtin_memcmp (&e10, &n10, sizeof (e10)) == 0); + assert (n11 == e11); + assert (n12 == e12); + assert (__builtin_memcmp (&e13, &n13, sizeof (e13)) == 0); + assert (__builtin_memcmp (&e14, &n14, sizeof (e14)) == 0); + assert (__builtin_memcmp (&e15, &n15, sizeof (e15)) == 0); + assert (__builtin_memcmp (&e16, &n16, sizeof (e16)) == 0); + assert (__builtin_memcmp (&e17, &n17, sizeof (e17)) == 0); + assert (__builtin_memcmp (&e18, &n18, sizeof (e18)) == 0); +} diff --git a/gcc/testsuite/gcc.target/x86_64/abi/abi-x86_64.exp b/gcc/testsuite/gcc.target/x86_64/abi/abi-x86_64.exp index 4f9fd46..61dc3e4 100644 --- a/gcc/testsuite/gcc.target/x86_64/abi/abi-x86_64.exp +++ b/gcc/testsuite/gcc.target/x86_64/abi/abi-x86_64.exp @@ -39,7 +39,7 @@ foreach src [lsort [find $srcdir/$subdir test_*.c]] { $additional_flags } else { c-torture-execute [list $src \ - $srcdir/$subdir/asm-support.s] \ + $srcdir/$subdir/asm-support.S] \ $additional_flags } } diff --git a/gcc/testsuite/gcc.target/x86_64/abi/asm-support.s b/gcc/testsuite/gcc.target/x86_64/abi/asm-support.S similarity index 97% rename from gcc/testsuite/gcc.target/x86_64/abi/asm-support.s rename to gcc/testsuite/gcc.target/x86_64/abi/asm-support.S index 00a08c0..61b66e1 100644 --- a/gcc/testsuite/gcc.target/x86_64/abi/asm-support.s +++ b/gcc/testsuite/gcc.target/x86_64/abi/asm-support.S @@ -1,4 +1,7 @@ .file "snapshot.S" +#ifdef __AVX__ + .sse_check none +#endif .text .p2align 4,,15 .globl snapshot diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index e508038..c9512b2 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -2571,3 +2571,14 @@ proc check_effective_target_automatic_stack_alignment { } { return 0 } } + +# Return 1 if avx instructions can be compiled. + +proc check_effective_target_avx { } { + return [check_no_compiler_messages avx object { + void _mm256_zeroall (void) + { + __builtin_ia32_vzeroall (); + } + } "-O2 -mavx" ] +} -- 2.7.4