From d661f61847696dc5ac54b397908f886bd3583484 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Wed, 30 Jan 2019 13:07:01 +0100 Subject: [PATCH] clk: stm32mp1: add IPCC clock Add support for enable/disable of IPCC clock using AHB3 registers Signed-off-by: Patrick Delaunay --- drivers/clk/clk_stm32mp1.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/clk_stm32mp1.c b/drivers/clk/clk_stm32mp1.c index 88f453c..a2ab5ed 100644 --- a/drivers/clk/clk_stm32mp1.c +++ b/drivers/clk/clk_stm32mp1.c @@ -536,6 +536,7 @@ static const struct stm32mp1_clk_gate stm32mp1_clk_gate[] = { STM32MP1_CLK_SET_CLR(RCC_MP_AHB2ENSETR, 16, SDMMC3_K, _SDMMC3_SEL), STM32MP1_CLK_SET_CLR(RCC_MP_AHB3ENSETR, 11, HSEM, _UNKNOWN_SEL), + STM32MP1_CLK_SET_CLR(RCC_MP_AHB3ENSETR, 12, IPCC, _UNKNOWN_SEL), STM32MP1_CLK_SET_CLR(RCC_MP_AHB4ENSETR, 0, GPIOA, _UNKNOWN_SEL), STM32MP1_CLK_SET_CLR(RCC_MP_AHB4ENSETR, 1, GPIOB, _UNKNOWN_SEL), -- 2.7.4