From d5cf6e92b4f76e55b2b9013b1332ead34881858f Mon Sep 17 00:00:00 2001
From: Sagar Ghuge <sagar.ghuge@intel.com>
Date: Wed, 5 Dec 2018 17:02:42 -0800
Subject: [PATCH] glsl: Add "built-in" functions to do uint64_to_fp32(uint64_t)

Reviewed-by: Elie Tournier <tournier.elie@gmail.com>
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
---
 src/compiler/glsl/float64.glsl | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/src/compiler/glsl/float64.glsl b/src/compiler/glsl/float64.glsl
index e8f6acc..da80513 100644
--- a/src/compiler/glsl/float64.glsl
+++ b/src/compiler/glsl/float64.glsl
@@ -1100,6 +1100,26 @@ __fp64_to_fp32(uint64_t __a)
    return __roundAndPackFloat32(aSign, aExp - 0x381, zFrac);
 }
 
+float
+__uint64_to_fp32(uint64_t __a)
+{
+   uint zFrac = 0u;
+   uvec2 aFrac = unpackUint2x32(__a);
+   int shiftCount = __countLeadingZeros32(mix(aFrac.y, aFrac.x, aFrac.y == 0u));
+   shiftCount -= mix(40, 8, aFrac.y == 0u);
+
+   if (0 <= shiftCount) {
+      __shortShift64Left(aFrac.y, aFrac.x, shiftCount, aFrac.y, aFrac.x);
+      bool is_zero = (aFrac.y | aFrac.x) == 0u;
+      return mix(__packFloat32(0u, 0x95 - shiftCount, aFrac.x), 0, is_zero);
+   }
+
+   shiftCount += 7;
+   __shift64RightJamming(aFrac.y, aFrac.x, -shiftCount, aFrac.y, aFrac.x);
+   zFrac = mix(aFrac.x<<shiftCount, aFrac.x, shiftCount < 0);
+   return __roundAndPackFloat32(0u, 0x9C - shiftCount, zFrac);
+}
+
 /* Returns the result of converting the single-precision floating-point value
  * `a' to the double-precision floating-point format.
  */
-- 
2.7.4