From d5b5d226c7238b152f070ce259ce491367b1b23e Mon Sep 17 00:00:00 2001 From: Pat Gavlin Date: Sat, 25 Feb 2017 10:09:00 -0800 Subject: [PATCH] Fix _our_GetThreadCycles for clang/xarch. The `"=A"` constraint in `asm volatile("rdtsc" : "=A"(cycles))` does not work as expected on AMD64. Instead, the assembly must use an output constraint for both `eax` and `edx` (i.e. `=a"(lo), "=d"(hi)`). Commit migrated from https://github.com/dotnet/coreclr/commit/6be8d477451eb69861cd000330990487ffa4fcc6 --- src/coreclr/src/jit/compiler.cpp | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/coreclr/src/jit/compiler.cpp b/src/coreclr/src/jit/compiler.cpp index a9eba55..cd9fa4d 100644 --- a/src/coreclr/src/jit/compiler.cpp +++ b/src/coreclr/src/jit/compiler.cpp @@ -73,9 +73,9 @@ inline bool _our_GetThreadCycles(unsigned __int64* cycleOut) inline bool _our_GetThreadCycles(unsigned __int64* cycleOut) { - uint64_t cycles; - asm volatile("rdtsc" : "=A"(cycles)); - *cycleOut = cycles; + uint32_t hi, lo; + __asm__ __volatile__("rdtsc" : "=a"(lo), "=d"(hi)); + *cycleOut = (static_cast(hi) << 32) | static_cast(lo); return true; } -- 2.7.4