From d5ac3ae8d3b3269140c641be99b1a8bc1abf8906 Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Fri, 23 Mar 2018 06:41:39 +0000 Subject: [PATCH] [X86] Give VLDDQUrm and LDDQUrm the same itinerary. llvm-svn: 328292 --- llvm/lib/Target/X86/X86InstrSSE.td | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/llvm/lib/Target/X86/X86InstrSSE.td b/llvm/lib/Target/X86/X86InstrSSE.td index 3925e8a..acaa190 100644 --- a/llvm/lib/Target/X86/X86InstrSSE.td +++ b/llvm/lib/Target/X86/X86InstrSSE.td @@ -4834,11 +4834,12 @@ let SchedRW = [WriteVecLoad] in { let Predicates = [HasAVX] in { def VLDDQUrm : S3DI<0xF0, MRMSrcMem, (outs VR128:$dst), (ins i128mem:$src), "vlddqu\t{$src, $dst|$dst, $src}", - [(set VR128:$dst, (int_x86_sse3_ldu_dq addr:$src))]>, VEX, VEX_WIG; + [(set VR128:$dst, (int_x86_sse3_ldu_dq addr:$src))], + IIC_SSE_LDDQU>, VEX, VEX_WIG; def VLDDQUYrm : S3DI<0xF0, MRMSrcMem, (outs VR256:$dst), (ins i256mem:$src), "vlddqu\t{$src, $dst|$dst, $src}", - [(set VR256:$dst, (int_x86_avx_ldu_dq_256 addr:$src))]>, - VEX, VEX_L, VEX_WIG; + [(set VR256:$dst, (int_x86_avx_ldu_dq_256 addr:$src))], + IIC_SSE_LDDQU>, VEX, VEX_L, VEX_WIG; } // Predicates def LDDQUrm : S3DI<0xF0, MRMSrcMem, (outs VR128:$dst), (ins i128mem:$src), "lddqu\t{$src, $dst|$dst, $src}", -- 2.7.4