From d51cad0b840a14c66732cb6a166c11ddf55d18b2 Mon Sep 17 00:00:00 2001 From: Andrew Stubbs Date: Sat, 12 Feb 2022 23:44:48 +0000 Subject: [PATCH] amdgcn: Allow vector reductions on constants Obviously it would be better if these reductions could be evaluated at compile time, but this will avoid an ICE. gcc/ChangeLog: * config/gcn/gcn.cc (gcn_expand_reduc_scalar): Use force_reg. --- gcc/config/gcn/gcn.cc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gcc/config/gcn/gcn.cc b/gcc/config/gcn/gcn.cc index 74819c6..402f025 100644 --- a/gcc/config/gcn/gcn.cc +++ b/gcc/config/gcn/gcn.cc @@ -4460,7 +4460,7 @@ gcn_expand_reduc_scalar (machine_mode mode, rtx src, int unspec) pair of lanes, then on every pair of results from the previous iteration (thereby effectively reducing every 4 lanes) and so on until all lanes are reduced. */ - rtx in, out = src; + rtx in, out = force_reg (mode, src); for (int i = 0, shift = 1; i < 6; i++, shift <<= 1) { rtx shift_val = gen_rtx_CONST_INT (VOIDmode, shift); -- 2.7.4