From d517f274e9db414ae4d6df5173c3e7f41b9dac66 Mon Sep 17 00:00:00 2001 From: Vaibhav Hiremath Date: Wed, 21 Oct 2015 16:50:20 +0530 Subject: [PATCH] greybus: platform: Add platform driver for DB3 AP bridge With DB3, we now have AP as a master as far as AP bridges are concerned. SVC will talk only to AP and AP will control bridges; unlike other module interfaces. So AP supposed to manage/control bridges in all power states including power on reset. During power on reset AP should follow below sequence - Sequence (treated as a Cold Boot) Stage-1 ======= AP: - Power On (Power up from PMIC to AP) - AP start booting Since power to AP bridges are controlled through gpio, power is gated to APB1 & 2 No ref_clk to APB available (under SVC's control) - AP configures USB hub to enable HSIC interface to APB - As part of platform driver probe, AP follow below sequence - Set the pinctrl in default state - Hold APBs in reset by pulling down reset pin - Enable power to APB by enabling regulator and switches - De-assert (set 'low') 'boot_ret' signal - AP will assert (set 'high') the wake_detect signal, triggering connect/detect event to the SVC - AP waits for wake pulse from SVC SVC: - Power On (power up from PMIC to SVC) - SVC starts booting - SVC will de-assert reset signal to unipro switch - Switch starts booting - SVC confirms switch boot status using SPI (or something) - SVC waits for 300 msec (ES2 known issue) - SVC waits for detect/connect event from AP Stage-2 ======= SVC: - ON connect/detect event, SVC send back wake pulse (cold boot) to AP over wake_detect pin, if SVC boot is completed. AP: - On wake pulse from SVC (for cold boot), AP de-asserts (set high') reset signal to APB 1 and/or 2 - Bridges starts booting - Eventually Unipro linkup occurs Testing: - Build tested against Helium kernel - Due to unavailability of MSM and DB3 platform, only minimal testing has been done. - Code has been modified for validation on Helium + SDB platform. Mostly dts changes for gpio numbers And debug messages to check gpio values - On Helium + SDB platform, with addition of debug messages validated the sequence. TODO list: - Currently _only_ supports power on sequence (cold boot). Both warm and cold boot support. Cold and Warm boot is differentiated based on pulse width of wake_detect signal >=5 msec = Cold boot else Warm boot - No support for Power management So the "power-down", "power-off", "wake_in" and "wake_out" signals are not explored/implemented. - Support for Work thread repetitive wake signal if no response from peer May required for PM support, as we have delays in the sequences - pinctrl states, specially to make sure we enable right pullup or pulldown when we set wake_detect pin to input - Convert gpio list into an array, and associated xxx-gpio-name property Signed-off-by: Vaibhav Hiremath Signed-off-by: Greg Kroah-Hartman --- drivers/staging/greybus/Makefile | 2 + drivers/staging/greybus/db3-platform.c | 378 +++++++++++++++++++++++++++++++++ 2 files changed, 380 insertions(+) create mode 100644 drivers/staging/greybus/db3-platform.c diff --git a/drivers/staging/greybus/Makefile b/drivers/staging/greybus/Makefile index a627340..b8dc36b 100644 --- a/drivers/staging/greybus/Makefile +++ b/drivers/staging/greybus/Makefile @@ -34,6 +34,7 @@ gb-light-y := light.o gb-raw-y := raw.o gb-es1-y := es1.o gb-es2-y := es2.o +gb-db3-y := db3-platform.o obj-m += greybus.o obj-m += gb-phy.o @@ -44,6 +45,7 @@ obj-m += gb-light.o obj-m += gb-raw.o obj-m += gb-es1.o obj-m += gb-es2.o +obj-m += gb-db3.o KERNELVER ?= $(shell uname -r) KERNELDIR ?= /lib/modules/$(KERNELVER)/build diff --git a/drivers/staging/greybus/db3-platform.c b/drivers/staging/greybus/db3-platform.c new file mode 100644 index 0000000..4391348 --- /dev/null +++ b/drivers/staging/greybus/db3-platform.c @@ -0,0 +1,378 @@ +/* + * DB3 Platform driver for AP bridge control interface. + * + * Copyright 2014-2015 Google Inc. + * Copyright 2014-2015 Linaro Ltd. + * + * Released under the GPLv2 only. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +enum apb_state { + APB_STATE_OFF, + APB_STATE_ACTIVE, + APB_STATE_STANDBY, +}; + +/* + * Control GPIO signals to and from AP <=> AP Bridges + */ +struct apb_ctrl_gpios { + int wake_detect; /* bi-dir, maps to WAKE_MOD and WAKE_FRAME signals */ + int reset; + int boot_ret; + int pwroff; + int wake_in; + int wake_out; + int pwrdn; +}; + +struct apb_ctrl_drvdata { + struct apb_ctrl_gpios ctrl; + + unsigned int wake_detect_irq; + enum apb_state state; + + struct regulator *vcore; + struct regulator *vio; + + struct pinctrl *pinctrl; + struct pinctrl_state *pin_default; + + /* To protect concurrent access of GPIO registers, need protection */ + spinlock_t lock; +}; + +static inline void assert_wake(unsigned int wake_detect) +{ + gpio_set_value(wake_detect, 1); +} + +static inline void deassert_wake(unsigned int wake_detect) +{ + gpio_set_value(wake_detect, 0); +} + +static irqreturn_t apb_ctrl_wake_detect_irq(int irq, void *devid) +{ + struct apb_ctrl_drvdata *apb_data = devid; + unsigned long flags; + + /* + * TODO: + * Since currently SoC gpio's are being used we are safe here + * But ideally we should create a workqueue and process the control + * signals, especially when we start using GPIO's over slow + * buses like I2C. + */ + if (!gpio_is_valid(apb_data->ctrl.wake_detect) && + !gpio_is_valid(apb_data->ctrl.reset)) + return IRQ_HANDLED; /* Should it be IRQ_NONE ?? */ + + spin_lock_irqsave(&apb_data->lock, flags); + + if (apb_data->state != APB_STATE_ACTIVE) { + /* Bring bridge out of reset on this event */ + gpio_set_value(apb_data->ctrl.reset, 0); + apb_data->state = APB_STATE_ACTIVE; + } else { + /* + * Assert Wake_OUT signal to APB + * It would resemble WakeDetect module's signal pass-through + */ + /* + * We have to generate the pulse, so we may need to schedule + * workqueue here. + * + * Also, since we are using both rising and falling edge for + * interrupt trigger, we may not need workqueue. Just pass + * through the value to bridge. + * Just read GPIO value and pass it to the bridge + */ + } + + spin_unlock_irqrestore(&apb_data->lock, flags); + + return IRQ_HANDLED; +} + +static void apb_ctrl_cleanup(struct apb_ctrl_drvdata *apb_data) +{ + if (apb_data->vcore && regulator_is_enabled(apb_data->vcore) > 0) + regulator_disable(apb_data->vcore); + + if (apb_data->vio && regulator_is_enabled(apb_data->vio) > 0) + regulator_disable(apb_data->vio); + + /* As part of exit, put APB back in reset state */ + if (gpio_is_valid(apb_data->ctrl.reset)) + gpio_set_value(apb_data->ctrl.reset, 1); + + /* TODO: May have to send an event to SVC about this exit */ +} + +/* + * Note: Please do not modify the below sequence, as it is as per the spec + */ +static int apb_ctrl_init_seq(struct device *dev, + struct apb_ctrl_drvdata *apb_data) +{ + int ret; + + pinctrl_select_state(apb_data->pinctrl, apb_data->pin_default); + + /* Hold APB in reset state */ + ret = devm_gpio_request_one(dev, apb_data->ctrl.reset, + GPIOF_OUT_INIT_LOW, "reset"); + if (ret) { + dev_err(dev, "Failed requesting reset gpio %d\n", + apb_data->ctrl.reset); + return ret; + } + + /* Enable power to APB */ + if (apb_data->vcore) { + ret = regulator_enable(apb_data->vcore); + if (ret) { + dev_err(dev, "failed to enable core regulator\n"); + return ret; + } + } + + if (apb_data->vio) { + ret = regulator_enable(apb_data->vio); + if (ret) { + dev_err(dev, "failed to enable IO regulator\n"); + return ret; + } + } + + /* + * We should be safe here to deassert boot retention signal, as + * we are only supporting cold boot as of now. + */ + ret = devm_gpio_request_one(dev, apb_data->ctrl.boot_ret, + GPIOF_OUT_INIT_LOW, "boot retention"); + if (ret) { + dev_err(dev, "Failed requesting reset gpio %d\n", + apb_data->ctrl.boot_ret); + return ret; + } + + ret = devm_gpio_request(dev, apb_data->ctrl.wake_detect, "wake detect"); + if (ret) + dev_err(dev, "Failed requesting wake_detect gpio %d\n", + apb_data->ctrl.wake_detect); + + return ret; +} + +static int apb_ctrl_get_devtree_data(struct device *dev, + struct apb_ctrl_drvdata *apb_data) +{ + struct device_node *np = dev->of_node; + + /* fetch control signals */ + apb_data->ctrl.wake_detect = of_get_named_gpio(np, "wake-detect-gpios", 0); + if (apb_data->ctrl.wake_detect < 0 || + !gpio_is_valid(apb_data->ctrl.wake_detect)) { + dev_err(dev, "failed to get wake detect gpio\n"); + return apb_data->ctrl.wake_detect; + } + + apb_data->ctrl.reset = of_get_named_gpio(np, "reset-gpios", 0); + if (apb_data->ctrl.wake_detect < 0 || + !gpio_is_valid(apb_data->ctrl.reset)) { + dev_err(dev, "failed to get wake detect gpio\n"); + return apb_data->ctrl.wake_detect; + } + + apb_data->ctrl.boot_ret = of_get_named_gpio(np, "boot-ret-gpios", 0); + if (apb_data->ctrl.boot_ret < 0 || + !gpio_is_valid(apb_data->ctrl.boot_ret)) { + dev_err(dev, "failed to get boot retention gpio\n"); + return apb_data->ctrl.boot_ret; + } + + /* It's not mandetory to support power management interface */ + apb_data->ctrl.pwroff = of_get_named_gpio(np, "pwr-off-gpios", 0); + if (apb_data->ctrl.pwroff < 0 || + !gpio_is_valid(apb_data->ctrl.pwroff)) + dev_info(dev, "failed to get power off gpio\n"); + + apb_data->ctrl.pwrdn = of_get_named_gpio(np, "pwr-down-gpios", 0); + if (apb_data->ctrl.pwrdn < 0 || + !gpio_is_valid(apb_data->ctrl.pwrdn)) + dev_info(dev, "failed to get power down gpio\n"); + + /* Regulators are optional, as we may have fixed supply coming in */ + apb_data->vcore = devm_regulator_get(dev, "vcore"); + if (IS_ERR_OR_NULL(apb_data->vcore)) { + dev_info(dev, "no core regulator found\n"); + apb_data->vcore = NULL; + } + + apb_data->vio = devm_regulator_get(dev, "vio"); + if (IS_ERR_OR_NULL(apb_data->vio)) { + dev_info(dev, "no IO regulator found\n"); + apb_data->vio = NULL; + } + + apb_data->pinctrl = devm_pinctrl_get(dev); + if (IS_ERR(apb_data->pinctrl)) { + dev_err(dev, "could not get pinctrl handle\n"); + return PTR_ERR(apb_data->pinctrl); + } + apb_data->pin_default = pinctrl_lookup_state(apb_data->pinctrl, "default"); + if (IS_ERR(apb_data->pin_default)) { + dev_err(dev, "could not get default pin state\n"); + return PTR_ERR(apb_data->pin_default); + } + + return 0; +} + +static int apb_ctrl_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct apb_ctrl_drvdata *apb_data; + int ret; + + apb_data = devm_kzalloc(&pdev->dev, sizeof(*apb_data), GFP_KERNEL); + if (!apb_data) + return -ENOMEM; + + ret = apb_ctrl_get_devtree_data(dev, apb_data); + if (ret) { + dev_err(dev, "failed to get devicetree data %d\n", ret); + return ret; + } + + ret = apb_ctrl_init_seq(dev, apb_data); + if (ret) { + dev_err(dev, "failed to set init state of control signal %d\n", + ret); + goto exit; + } + + platform_set_drvdata(pdev, apb_data); + + apb_data->state = APB_STATE_OFF; + /* + * Assert AP module detect signal by pulling wake_detect low + */ + deassert_wake(apb_data->ctrl.wake_detect); + + /* + * In order to receive an interrupt, the GPIO must be set to input mode + * + * As per WDM spec, for the cold boot, the wake pulse must be + * >= 5000 usec, but at this stage it is power up sequence, + * so we always treat it as cold boot. + */ + gpio_direction_input(apb_data->ctrl.wake_detect); + + ret = devm_request_irq(dev, gpio_to_irq(apb_data->ctrl.wake_detect), + apb_ctrl_wake_detect_irq, + IRQF_TRIGGER_RISING, + "wake detect", apb_data); + if (ret) { + dev_err(&pdev->dev, "failed to request wake detect IRQ\n"); + goto exit; + } + + /* + * Interrupt handling for WAKE_IN (from bridge) signal is required + * + * Assumption here is, AP already would have woken up and in the + * WAKE_IN/WAKE_FRAME event from bridge, as AP would pass-through event + * to SVC. + * + * Not sure anything else needs to take care here. + */ + dev_err(dev, "Device registered successfully \n"); + return 0; + +exit: + apb_ctrl_cleanup(apb_data); + return ret; +} + +static int apb_ctrl_remove(struct platform_device *pdev) +{ + struct apb_ctrl_drvdata *apb_data = platform_get_drvdata(pdev); + + if (apb_data) + apb_ctrl_cleanup(apb_data); + + platform_set_drvdata(pdev, NULL); + + return 0; +} + +static int apb_ctrl_suspend(struct device *dev) +{ + /* + * If timing profile premits, we may shutdown bridge + * completely + * + * TODO: sequence ?? + * + * Also, need to make sure we meet precondition for unipro suspend + * Precondition: Definition ??? + */ + return 0; +} + +static int apb_ctrl_resume(struct device *dev) +{ + /* + * Atleast for ES2 we have to meet the delay requirement between + * unipro switch and AP bridge init, depending on whether bridge is in + * OFF state or standby state. + * + * Based on whether bridge is in standby or OFF state we may have to + * assert multiple signals. Please refer to WDM spec, for more info. + * + */ + return 0; +} + +static SIMPLE_DEV_PM_OPS(apb_ctrl_pm_ops, apb_ctrl_suspend, apb_ctrl_resume); + +static struct of_device_id apb_ctrl_of_match[] = { + { .compatible = "usbffff,2", }, + { }, +}; +MODULE_DEVICE_TABLE(of, apb_ctrl_of_match); + +static struct platform_driver apb_ctrl_device_driver = { + .probe = apb_ctrl_probe, + .remove = apb_ctrl_remove, + .driver = { + .name = "unipro-APbridge", + .pm = &apb_ctrl_pm_ops, + .of_match_table = of_match_ptr(apb_ctrl_of_match), + } +}; + +module_platform_driver(apb_ctrl_device_driver); + +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Vaibhav Hiremath "); +MODULE_DESCRIPTION("AP Bridge Control Driver for DB3 platform"); -- 2.7.4