From d4e2de6bc2c210ede6eb8e24c3da940d4fc0a042 Mon Sep 17 00:00:00 2001 From: Nick Clifton Date: Fri, 17 Oct 2003 10:23:33 +0000 Subject: [PATCH] Fix normal operation for h8300-coff target --- bfd/ChangeLog | 12 ++++++++ bfd/coff-h8300.c | 78 +++++++++++++++++++++++++++++++++------------------ bfd/cpu-h8300.c | 12 ++------ gas/ChangeLog | 7 +++++ gas/config/tc-h8300.c | 17 +++++++---- 5 files changed, 85 insertions(+), 41 deletions(-) diff --git a/bfd/ChangeLog b/bfd/ChangeLog index 751d2a7..33dc6c0 100644 --- a/bfd/ChangeLog +++ b/bfd/ChangeLog @@ -1,3 +1,15 @@ +2003-10-17 Shrinivas Atre + + * coff-h8300.c (funcvec_hash_newfunc): Handle normal mode. + (h8300_reloc16_extra_cases): Likewise. + (h8300_bfd_link_add_symbols): Likewise. + +2003-10-17 Dhananjay Deshpande + + * cpu-h8300.c (h8300sxn_info_struct): Correct address size. + (h8300sn_info_struct): Likewise. + (h8300hn_info_struct): Likewise. + 2003-10-16 Pavel Roskin * peXXigen.c (_bfd_XXi_swap_aouthdr_out): Don't calculate image size diff --git a/bfd/coff-h8300.c b/bfd/coff-h8300.c index bfe31c6..5cb327a 100644 --- a/bfd/coff-h8300.c +++ b/bfd/coff-h8300.c @@ -154,13 +154,20 @@ funcvec_hash_newfunc (struct bfd_hash_entry *entry, /* Bump the offset at which we store entries in the function vector. We'd like to bump up the size of the vectors section, but it's not easily available here. */ - if (bfd_get_mach (table->abfd) == bfd_mach_h8300) - table->offset += 2; - else if (bfd_get_mach (table->abfd) == bfd_mach_h8300h - || bfd_get_mach (table->abfd) == bfd_mach_h8300s) - table->offset += 4; - else - return NULL; + switch (bfd_get_mach (table->abfd)) + { + case bfd_mach_h8300: + case bfd_mach_h8300hn: + case bfd_mach_h8300sn: + table->offset += 2; + break; + case bfd_mach_h8300h: + case bfd_mach_h8300s: + table->offset += 4; + break; + default: + return NULL; + } /* Everything went OK. */ return (struct bfd_hash_entry *) ret; @@ -1096,6 +1103,7 @@ h8300_reloc16_extra_cases (bfd *abfd, struct bfd_link_info *link_info, if (symbol->flags & BSF_LOCAL) { char *new_name = bfd_malloc ((bfd_size_type) strlen (name) + 9); + if (new_name == NULL) abort (); @@ -1124,21 +1132,28 @@ h8300_reloc16_extra_cases (bfd *abfd, struct bfd_link_info *link_info, src_address++; /* Now create an entry in the function vector itself. */ - if (bfd_get_mach (input_section->owner) == bfd_mach_h8300) - bfd_put_16 (abfd, - bfd_coff_reloc16_get_value (reloc, - link_info, - input_section), - vectors_sec->contents + h->offset); - else if (bfd_get_mach (input_section->owner) == bfd_mach_h8300h - || bfd_get_mach (input_section->owner) == bfd_mach_h8300s) - bfd_put_32 (abfd, - bfd_coff_reloc16_get_value (reloc, - link_info, - input_section), - vectors_sec->contents + h->offset); - else - abort (); + switch (bfd_get_mach (input_section->owner)) + { + case bfd_mach_h8300: + case bfd_mach_h8300hn: + case bfd_mach_h8300sn: + bfd_put_16 (abfd, + bfd_coff_reloc16_get_value (reloc, + link_info, + input_section), + vectors_sec->contents + h->offset); + break; + case bfd_mach_h8300h: + case bfd_mach_h8300s: + bfd_put_32 (abfd, + bfd_coff_reloc16_get_value (reloc, + link_info, + input_section), + vectors_sec->contents + h->offset); + break; + default: + abort (); + } /* Gross. We've already written the contents of the vector section before we get here... So we write it again with the new data. */ @@ -1304,11 +1319,20 @@ h8300_bfd_link_add_symbols (bfd *abfd, struct bfd_link_info *info) /* Bump the size of the vectors section. Each vector takes 2 bytes on the h8300 and 4 bytes on the h8300h. */ - if (bfd_get_mach (abfd) == bfd_mach_h8300) - htab->vectors_sec->_raw_size += 2; - else if (bfd_get_mach (abfd) == bfd_mach_h8300h - || bfd_get_mach (abfd) == bfd_mach_h8300s) - htab->vectors_sec->_raw_size += 4; + switch (bfd_get_mach (abfd)) + { + case bfd_mach_h8300: + case bfd_mach_h8300hn: + case bfd_mach_h8300sn: + htab->vectors_sec->_raw_size += 2; + break; + case bfd_mach_h8300h: + case bfd_mach_h8300s: + htab->vectors_sec->_raw_size += 4; + break; + default: + abort (); + } } } } diff --git a/bfd/cpu-h8300.c b/bfd/cpu-h8300.c index 1a4f4d7..5907de0 100644 --- a/bfd/cpu-h8300.c +++ b/bfd/cpu-h8300.c @@ -23,11 +23,6 @@ #include "sysdep.h" #include "libbfd.h" -static bfd_boolean h8300_scan - (const struct bfd_arch_info *, const char *); -static const bfd_arch_info_type * compatible - (const bfd_arch_info_type *, const bfd_arch_info_type *); - static bfd_boolean h8300_scan (const struct bfd_arch_info *info, const char *string) { @@ -111,7 +106,7 @@ compatible (const bfd_arch_info_type *in, const bfd_arch_info_type *out) static const bfd_arch_info_type h8300sxn_info_struct = { 32, /* 32 bits in a word */ - 32, /* 32 bits in an address */ + 16, /* 16 bits in an address */ 8, /* 8 bits in a byte */ bfd_arch_h8300, bfd_mach_h8300sxn, @@ -143,7 +138,7 @@ static const bfd_arch_info_type h8300sx_info_struct = static const bfd_arch_info_type h8300sn_info_struct = { 32, /* 32 bits in a word. */ - 32, /* 32 bits in an address. */ + 16, /* 16 bits in an address. */ 8, /* 8 bits in a byte. */ bfd_arch_h8300, bfd_mach_h8300sn, @@ -156,11 +151,10 @@ static const bfd_arch_info_type h8300sn_info_struct = &h8300sx_info_struct }; - static const bfd_arch_info_type h8300hn_info_struct = { 32, /* 32 bits in a word. */ - 32, /* 32 bits in an address. */ + 16, /* 16 bits in an address. */ 8, /* 8 bits in a byte. */ bfd_arch_h8300, bfd_mach_h8300hn, diff --git a/gas/ChangeLog b/gas/ChangeLog index 51376d8..934d674 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,10 @@ +2003-10-17 Shrinivas Atre + + * config/tc-h8300.c (PSIZE): Correct for Normal mode. + (get_operand): Accept both 16 bit 32 bit registers as pointer + registers, when operating in Normal mode. + (fix_operand_size): Make default address size 16 for Normal mode. + 2003-10-17 Ian Lance Taylor * config/tc-arm.c (do_iwmmxt_byte_addr): Reject control diff --git a/gas/config/tc-h8300.c b/gas/config/tc-h8300.c index f383e79..986dd69 100644 --- a/gas/config/tc-h8300.c +++ b/gas/config/tc-h8300.c @@ -58,7 +58,7 @@ int Smode; int Nmode; int SXmode; -#define PSIZE (Hmode ? L_32 : L_16) +#define PSIZE (Hmode && !Nmode ? L_32 : L_16) int bsize = L_8; /* Default branch displacement. */ @@ -689,7 +689,7 @@ get_operand (ptr, op, direction) *ptr = parse_exp (src + 1, op); if (op->exp.X_add_number >= 0x100) { - int divisor; + int divisor = 1; op->mode = VECIND; /* FIXME : 2? or 4? */ @@ -718,7 +718,9 @@ get_operand (ptr, op, direction) return; } - if ((mode & SIZE) != PSIZE) + if (((mode & SIZE) != PSIZE) + /* For Normal mode accept 16 bit and 32 bit pointer registers. */ + && (!Nmode || ((mode & SIZE) != L_32))) as_bad (_("Wrong size pointer register for architecture.")); op->mode = src[0] == '-' ? RDPREDEC : RDPREINC; @@ -828,7 +830,9 @@ get_operand (ptr, op, direction) src += len; if (*src == '+' || *src == '-') { - if ((mode & SIZE) != PSIZE) + if (((mode & SIZE) != PSIZE) + /* For Normal mode accept 16 bit and 32 bit pointer registers. */ + && (!Nmode || ((mode & SIZE) != L_32))) as_bad (_("Wrong size pointer register for architecture.")); op->mode = *src == '+' ? RSPOSTINC : RSPOSTDEC; op->reg = num; @@ -836,7 +840,9 @@ get_operand (ptr, op, direction) *ptr = src; return; } - if ((mode & SIZE) != PSIZE) + if (((mode & SIZE) != PSIZE) + /* For Normal mode accept 16 bit and 32 bit pointer registers. */ + && (!Nmode || ((mode & SIZE) != L_32))) as_bad (_("Wrong size pointer register for architecture.")); op->mode = direction | IND | PSIZE; @@ -1855,6 +1861,7 @@ fix_operand_size (operand, size) is safe. get_specific() will relax L_24 into L_32 where necessary. */ if (Hmode + && !Nmode && (operand->exp.X_add_number < -32768 || operand->exp.X_add_number > 32767 || operand->exp.X_add_symbol != 0 -- 2.7.4