From d4773c6a3dfa0da8802bc7adb6e127a36cc0600a Mon Sep 17 00:00:00 2001 From: Philip Reames Date: Sat, 15 Apr 2023 21:26:07 -0700 Subject: [PATCH] [RISCV] Fix a crash in RISCVGatherScatterLowering We were assuming that the constant must always be fixed length when this is not required. Such code is unlikely after optimization, which is why we didn't see this previously. --- llvm/lib/Target/RISCV/RISCVGatherScatterLowering.cpp | 3 +++ llvm/test/CodeGen/RISCV/rvv/strided-load-store.ll | 17 +++++++++++++++++ 2 files changed, 20 insertions(+) diff --git a/llvm/lib/Target/RISCV/RISCVGatherScatterLowering.cpp b/llvm/lib/Target/RISCV/RISCVGatherScatterLowering.cpp index 7e7b25d..d40ad25 100644 --- a/llvm/lib/Target/RISCV/RISCVGatherScatterLowering.cpp +++ b/llvm/lib/Target/RISCV/RISCVGatherScatterLowering.cpp @@ -107,6 +107,9 @@ bool RISCVGatherScatterLowering::isLegalTypeAndAlignment(Type *DataType, // TODO: Should we consider the mask when looking for a stride? static std::pair matchStridedConstant(Constant *StartC) { + if (!isa(StartC->getType())) + return std::make_pair(nullptr, nullptr); + unsigned NumElts = cast(StartC->getType())->getNumElements(); // Check that the start value is a strided constant. diff --git a/llvm/test/CodeGen/RISCV/rvv/strided-load-store.ll b/llvm/test/CodeGen/RISCV/rvv/strided-load-store.ll index bcc73e0..f5ba168 100644 --- a/llvm/test/CodeGen/RISCV/rvv/strided-load-store.ll +++ b/llvm/test/CodeGen/RISCV/rvv/strided-load-store.ll @@ -135,6 +135,23 @@ define void @scatter_loopless( %x, ptr %p, i64 %stride) { ret void } +; We previously crashed expecting a constant to be fixed length. +define void @constant_stride( %x, ptr %p, i64 %stride) { +; CHECK-LABEL: @constant_stride( +; CHECK-NEXT: [[PTRS:%.*]] = getelementptr i32, ptr [[P:%.*]], zeroinitializer +; CHECK-NEXT: call void @llvm.masked.scatter.nxv1i64.nxv1p0( [[X:%.*]], [[PTRS]], i32 8, shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) +; CHECK-NEXT: ret void +; + %ptrs = getelementptr i32, ptr %p, zeroinitializer + call void @llvm.masked.scatter.nxv1i64.nxv1p0( + %x, + %ptrs, + i32 8, + shufflevector ( insertelement ( poison, i1 1, i64 0), poison, zeroinitializer) + ) + ret void +} + declare i64 @llvm.vscale.i64() declare void @llvm.masked.scatter.nxv1i64.nxv1p0(, , i32, ) declare @llvm.masked.gather.nxv1i64.nxv1p0(, i32, , ) -- 2.7.4