From d46ab84caa512d35ad644e8b26158ae1e86bc624 Mon Sep 17 00:00:00 2001 From: krebbel Date: Wed, 2 Dec 2015 07:49:47 +0000 Subject: [PATCH] S/390: Further bswap enhancements. gcc/ChangeLog: 2015-12-02 Andreas Krebbel * config/s390/s390.md ("bswap2"): Add support for strv and strvg. ("bswaphi2"): New pattern. New splitter for HI reg-reg bswap. gcc/testsuite/ChangeLog: 2015-12-02 Andreas Krebbel * gcc.target/s390/bswap-1.c (foo64c, foo32a, foo32c): New functions. * gcc.target/s390/bswaphi-1.c: New test. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@231152 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/ChangeLog | 7 ++++++ gcc/config/s390/s390.md | 38 +++++++++++++++++++++++-------- gcc/testsuite/ChangeLog | 5 ++++ gcc/testsuite/gcc.target/s390/bswap-1.c | 26 +++++++++++++++++---- gcc/testsuite/gcc.target/s390/bswaphi-1.c | 27 ++++++++++++++++++++++ 5 files changed, 88 insertions(+), 15 deletions(-) create mode 100644 gcc/testsuite/gcc.target/s390/bswaphi-1.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 04dbcb0..2976dfc 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2015-12-02 Andreas Krebbel + + * config/s390/s390.md ("bswap2"): Add support for strv and + strvg. + ("bswaphi2"): New pattern. + New splitter for HI reg-reg bswap. + 2015-11-27 Jiri Engelthaler PR driver/68029 diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md index a5335ca..e5db537 100644 --- a/gcc/config/s390/s390.md +++ b/gcc/config/s390/s390.md @@ -10451,25 +10451,43 @@ ; FIXME: There is also mvcin but we cannot use it since src and target ; may overlap. (define_insn "bswap2" - [(set (match_operand:GPR 0 "register_operand" "=d, d") - (bswap:GPR (match_operand:GPR 1 "nonimmediate_operand" " d,RT")))] + [(set (match_operand:GPR 0 "nonimmediate_operand" "=d, d,RT") + (bswap:GPR (match_operand:GPR 1 "nonimmediate_operand" " d,RT, d")))] "TARGET_CPU_ZARCH" "@ lrvr\t%0,%1 - lrv\t%0,%1" - [(set_attr "type" "*,load") - (set_attr "op_type" "RRE,RXY") + lrv\t%0,%1 + strv\t%1,%0" + [(set_attr "type" "*,load,store") + (set_attr "op_type" "RRE,RXY,RXY") (set_attr "z10prop" "z10_super")]) (define_insn "bswaphi2" - [(set (match_operand:HI 0 "register_operand" "=d") - (bswap:HI (match_operand:HI 1 "memory_operand" "RT")))] + [(set (match_operand:HI 0 "nonimmediate_operand" "=d, d,RT") + (bswap:HI (match_operand:HI 1 "nonimmediate_operand" " d,RT, d")))] "TARGET_CPU_ZARCH" - "lrvh\t%0,%1" - [(set_attr "type" "load") - (set_attr "op_type" "RXY") + "@ + # + lrvh\t%0,%1 + strvh\t%1,%0" + [(set_attr "type" "*,load,store") + (set_attr "op_type" "RRE,RXY,RXY") (set_attr "z10prop" "z10_super")]) +(define_split + [(set (match_operand:HI 0 "register_operand" "") + (bswap:HI (match_operand:HI 1 "register_operand" "")))] + "TARGET_CPU_ZARCH" + [(set (match_dup 2) (bswap:SI (match_dup 3))) + (set (match_dup 2) (lshiftrt:SI (match_dup 2) + (const_int 16))) + (set (match_dup 0) (subreg:HI (match_dup 2) 2))] +{ + operands[2] = gen_reg_rtx (SImode); + operands[3] = simplify_gen_subreg (SImode, operands[1], HImode, 0); +}) + + ; ; Population count instruction ; diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index e102766..9118682 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,5 +1,10 @@ 2015-12-02 Andreas Krebbel + * gcc.target/s390/bswap-1.c (foo64c, foo32a, foo32c): New functions. + * gcc.target/s390/bswaphi-1.c: New test. + +2015-12-02 Andreas Krebbel + * lib/target-supports.exp: Add s390 and s390x to the list of long long atomic targets. diff --git a/gcc/testsuite/gcc.target/s390/bswap-1.c b/gcc/testsuite/gcc.target/s390/bswap-1.c index e1f113a..edfcdf8 100644 --- a/gcc/testsuite/gcc.target/s390/bswap-1.c +++ b/gcc/testsuite/gcc.target/s390/bswap-1.c @@ -21,16 +21,32 @@ foo64b () } /* { dg-final { scan-assembler-times "lrvg\t%r2,0\\(%r\[0-9\]*\\)" 1 { target lp64 } } } */ +void +foo64c (uint64_t a) +{ + u64 = __builtin_bswap64 (a); +} +/* { dg-final { scan-assembler-times "strvg\t%r2,0\\(%r\[0-9\]*\\)" 1 { target lp64 } } } */ + + + +uint32_t +foo32a (uint32_t a) +{ + return __builtin_bswap32 (a); +} +/* { dg-final { scan-assembler-times "lrvr\t%r2,%r2" 1 } } */ + uint32_t -foo32 () +foo32b () { return __builtin_bswap32 (u32); } /* { dg-final { scan-assembler-times "lrv\t%r2,0\\(%r\[0-9\]*\\)" 1 } } */ -uint16_t -foo16 () +void +foo32c (uint32_t a) { - return __builtin_bswap16 (u16); + u32 = __builtin_bswap32 (a); } -/* { dg-final { scan-assembler-times "lrvh\t%r2,0\\(%r\[0-9\]*\\)" 1 } } */ +/* { dg-final { scan-assembler-times "strv\t%r2,0\\(%r\[0-9\]*\\)" 1 } } */ diff --git a/gcc/testsuite/gcc.target/s390/bswaphi-1.c b/gcc/testsuite/gcc.target/s390/bswaphi-1.c new file mode 100644 index 0000000..f6be9b4 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/bswaphi-1.c @@ -0,0 +1,27 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z900 -mzarch" } */ + +#include + +uint16_t u16; + +uint16_t +foo16a (uint16_t a) +{ + return __builtin_bswap16 (a); +} +/* { dg-final { scan-assembler-times "lrvr\t%r2,%r\[0-9\]*" 1 } } */ + +uint16_t +foo16b () +{ + return __builtin_bswap16 (u16); +} +/* { dg-final { scan-assembler-times "lrvh\t%r2,0\\(%r\[0-9\]*\\)" 1 } } */ + +void +foo16c (uint16_t a) +{ + u16 = __builtin_bswap16 (a); +} +/* { dg-final { scan-assembler-times "strvh\t%r2,0\\(%r\[0-9\]*\\)" 1 } } */ -- 2.7.4