From d401e376e464b97cabde1fa9c675630e7f275a1c Mon Sep 17 00:00:00 2001
From: Nikita Popov <nikita.ppv@gmail.com>
Date: Sat, 5 Sep 2020 10:56:19 +0200
Subject: [PATCH] [InstCombine] Test abs with dominating condition (NFC)

---
 llvm/test/Transforms/InstCombine/abs-intrinsic.ll | 46 +++++++++++++++++++++++
 1 file changed, 46 insertions(+)

diff --git a/llvm/test/Transforms/InstCombine/abs-intrinsic.ll b/llvm/test/Transforms/InstCombine/abs-intrinsic.ll
index 20ba876..7442ed7 100644
--- a/llvm/test/Transforms/InstCombine/abs-intrinsic.ll
+++ b/llvm/test/Transforms/InstCombine/abs-intrinsic.ll
@@ -126,3 +126,49 @@ define <4 x i32> @abs_of_select_neg_false_val(<4 x i1> %b, <4 x i32> %x) {
   %abs = call <4 x i32> @llvm.abs.v4i32(<4 x i32> %sel, i1 false)
   ret <4 x i32> %abs
 }
+
+define i32 @abs_dom_cond_nopoison(i32 %x) {
+; CHECK-LABEL: @abs_dom_cond_nopoison(
+; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[X:%.*]], -1
+; CHECK-NEXT:    br i1 [[CMP]], label [[TRUE:%.*]], label [[FALSE:%.*]]
+; CHECK:       true:
+; CHECK-NEXT:    [[A1:%.*]] = call i32 @llvm.abs.i32(i32 [[X]], i1 false)
+; CHECK-NEXT:    ret i32 [[A1]]
+; CHECK:       false:
+; CHECK-NEXT:    [[A2:%.*]] = call i32 @llvm.abs.i32(i32 [[X]], i1 false)
+; CHECK-NEXT:    ret i32 [[A2]]
+;
+  %cmp = icmp sge i32 %x, 0
+  br i1 %cmp, label %true, label %false
+
+true:
+  %a1 = call i32 @llvm.abs.i32(i32 %x, i1 false)
+  ret i32 %a1
+
+false:
+  %a2 = call i32 @llvm.abs.i32(i32 %x, i1 false)
+  ret i32 %a2
+}
+
+define i32 @abs_dom_cond_poison(i32 %x) {
+; CHECK-LABEL: @abs_dom_cond_poison(
+; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[X:%.*]], -1
+; CHECK-NEXT:    br i1 [[CMP]], label [[TRUE:%.*]], label [[FALSE:%.*]]
+; CHECK:       true:
+; CHECK-NEXT:    [[A1:%.*]] = call i32 @llvm.abs.i32(i32 [[X]], i1 true)
+; CHECK-NEXT:    ret i32 [[A1]]
+; CHECK:       false:
+; CHECK-NEXT:    [[A2:%.*]] = call i32 @llvm.abs.i32(i32 [[X]], i1 true)
+; CHECK-NEXT:    ret i32 [[A2]]
+;
+  %cmp = icmp sge i32 %x, 0
+  br i1 %cmp, label %true, label %false
+
+true:
+  %a1 = call i32 @llvm.abs.i32(i32 %x, i1 true)
+  ret i32 %a1
+
+false:
+  %a2 = call i32 @llvm.abs.i32(i32 %x, i1 true)
+  ret i32 %a2
+}
-- 
2.7.4