From d3efb59f29a77625756adefa230177067c4083e9 Mon Sep 17 00:00:00 2001 From: Sander de Smalen Date: Mon, 9 Jul 2018 15:22:08 +0000 Subject: [PATCH] [AArch64][SVE] Asm: Support for CNT(B|H|W|D) and CNTP instructions. This patch adds support for the following instructions: CNTB CNTH - Determine the number of active elements implied by CNTW CNTD the named predicate constant, multiplied by an immediate, e.g. cnth x0, vl8, #16 CNTP - Count active predicate elements, e.g. cntp x0, p0, p1.b counts the number of active elements in p1, predicated by p0, and stores the result in x0. llvm-svn: 336552 --- llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td | 32 +++++++++------ llvm/lib/Target/AArch64/SVEInstrFormats.td | 53 ++++++++++++++++++++++++ llvm/test/MC/AArch64/SVE/cntb-diagnostics.s | 57 ++++++++++++++++++++++++++ llvm/test/MC/AArch64/SVE/cntb.s | 44 ++++++++++++++++++++ llvm/test/MC/AArch64/SVE/cntd-diagnostics.s | 57 ++++++++++++++++++++++++++ llvm/test/MC/AArch64/SVE/cntd.s | 44 ++++++++++++++++++++ llvm/test/MC/AArch64/SVE/cnth-diagnostics.s | 57 ++++++++++++++++++++++++++ llvm/test/MC/AArch64/SVE/cnth.s | 44 ++++++++++++++++++++ llvm/test/MC/AArch64/SVE/cntp-diagnostics.s | 11 +++++ llvm/test/MC/AArch64/SVE/cntp.s | 32 +++++++++++++++ llvm/test/MC/AArch64/SVE/cntw-diagnostics.s | 57 ++++++++++++++++++++++++++ llvm/test/MC/AArch64/SVE/cntw.s | 44 ++++++++++++++++++++ 12 files changed, 519 insertions(+), 13 deletions(-) create mode 100644 llvm/test/MC/AArch64/SVE/cntb-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE/cntb.s create mode 100644 llvm/test/MC/AArch64/SVE/cntd-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE/cntd.s create mode 100644 llvm/test/MC/AArch64/SVE/cnth-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE/cnth.s create mode 100644 llvm/test/MC/AArch64/SVE/cntp-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE/cntp.s create mode 100644 llvm/test/MC/AArch64/SVE/cntw-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE/cntw.s diff --git a/llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td b/llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td index e2ed98b..9c78f04 100644 --- a/llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td +++ b/llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td @@ -555,19 +555,6 @@ let Predicates = [HasSVE] in { defm TRN1_PPP : sve_int_perm_bin_perm_pp<0b100, "trn1">; defm TRN2_PPP : sve_int_perm_bin_perm_pp<0b101, "trn2">; - def RDVLI_XI : sve_int_read_vl_a<0b0, 0b11111, "rdvl">; - def ADDVL_XXI : sve_int_arith_vl<0b0, "addvl">; - def ADDPL_XXI : sve_int_arith_vl<0b1, "addpl">; - - defm INCB_XPiI : sve_int_pred_pattern_a<0b000, "incb">; - defm DECB_XPiI : sve_int_pred_pattern_a<0b001, "decb">; - defm INCH_XPiI : sve_int_pred_pattern_a<0b010, "inch">; - defm DECH_XPiI : sve_int_pred_pattern_a<0b011, "dech">; - defm INCW_XPiI : sve_int_pred_pattern_a<0b100, "incw">; - defm DECW_XPiI : sve_int_pred_pattern_a<0b101, "decw">; - defm INCD_XPiI : sve_int_pred_pattern_a<0b110, "incd">; - defm DECD_XPiI : sve_int_pred_pattern_a<0b111, "decd">; - defm CMPHS_PPzZZ : sve_int_cmp_0<0b000, "cmphs">; defm CMPHI_PPzZZ : sve_int_cmp_0<0b001, "cmphi">; defm CMPGE_PPzZZ : sve_int_cmp_0<0b100, "cmpge">; @@ -612,6 +599,25 @@ let Predicates = [HasSVE] in { defm FCMEQ_PPzZ0 : sve_fp_2op_p_pd<0b100, "fcmeq">; defm FCMNE_PPzZ0 : sve_fp_2op_p_pd<0b110, "fcmne">; + def RDVLI_XI : sve_int_read_vl_a<0b0, 0b11111, "rdvl">; + def ADDVL_XXI : sve_int_arith_vl<0b0, "addvl">; + def ADDPL_XXI : sve_int_arith_vl<0b1, "addpl">; + + defm CNTB_XPiI : sve_int_count<0b000, "cntb">; + defm CNTH_XPiI : sve_int_count<0b010, "cnth">; + defm CNTW_XPiI : sve_int_count<0b100, "cntw">; + defm CNTD_XPiI : sve_int_count<0b110, "cntd">; + defm CNTP_XPP : sve_int_pcount_pred<0b0000, "cntp">; + + defm INCB_XPiI : sve_int_pred_pattern_a<0b000, "incb">; + defm DECB_XPiI : sve_int_pred_pattern_a<0b001, "decb">; + defm INCH_XPiI : sve_int_pred_pattern_a<0b010, "inch">; + defm DECH_XPiI : sve_int_pred_pattern_a<0b011, "dech">; + defm INCW_XPiI : sve_int_pred_pattern_a<0b100, "incw">; + defm DECW_XPiI : sve_int_pred_pattern_a<0b101, "decw">; + defm INCD_XPiI : sve_int_pred_pattern_a<0b110, "incd">; + defm DECD_XPiI : sve_int_pred_pattern_a<0b111, "decd">; + defm SQINCB_XPiWdI : sve_int_pred_pattern_b_s32<0b00000, "sqincb">; defm UQINCB_WPiI : sve_int_pred_pattern_b_u32<0b00001, "uqincb">; defm SQDECB_XPiWdI : sve_int_pred_pattern_b_s32<0b00010, "sqdecb">; diff --git a/llvm/lib/Target/AArch64/SVEInstrFormats.td b/llvm/lib/Target/AArch64/SVEInstrFormats.td index cc6b548..39612a2 100644 --- a/llvm/lib/Target/AArch64/SVEInstrFormats.td +++ b/llvm/lib/Target/AArch64/SVEInstrFormats.td @@ -356,11 +356,64 @@ multiclass sve_int_count_v opc, string asm> { def _D : sve_int_count_v<0b11, opc, asm, ZPR64>; } +class sve_int_pcount_pred sz8_64, bits<4> opc, string asm, + PPRRegOp pprty> +: I<(outs GPR64:$Rd), (ins PPRAny:$Pg, pprty:$Pn), + asm, "\t$Rd, $Pg, $Pn", + "", + []>, Sched<[]> { + bits<4> Pg; + bits<4> Pn; + bits<5> Rd; + let Inst{31-24} = 0b00100101; + let Inst{23-22} = sz8_64; + let Inst{21-19} = 0b100; + let Inst{18-16} = opc{3-1}; + let Inst{15-14} = 0b10; + let Inst{13-10} = Pg; + let Inst{9} = opc{0}; + let Inst{8-5} = Pn; + let Inst{4-0} = Rd; +} + +multiclass sve_int_pcount_pred opc, string asm> { + def _B : sve_int_pcount_pred<0b00, opc, asm, PPR8>; + def _H : sve_int_pcount_pred<0b01, opc, asm, PPR16>; + def _S : sve_int_pcount_pred<0b10, opc, asm, PPR32>; + def _D : sve_int_pcount_pred<0b11, opc, asm, PPR64>; +} //===----------------------------------------------------------------------===// // SVE Element Count Group //===----------------------------------------------------------------------===// +class sve_int_count opc, string asm> +: I<(outs GPR64:$Rd), (ins sve_pred_enum:$pattern, sve_incdec_imm:$imm4), + asm, "\t$Rd, $pattern, mul $imm4", + "", + []>, Sched<[]> { + bits<5> Rd; + bits<4> imm4; + bits<5> pattern; + let Inst{31-24} = 0b00000100; + let Inst{23-22} = opc{2-1}; + let Inst{21-20} = 0b10; + let Inst{19-16} = imm4; + let Inst{15-11} = 0b11100; + let Inst{10} = opc{0}; + let Inst{9-5} = pattern; + let Inst{4-0} = Rd; +} + +multiclass sve_int_count opc, string asm> { + def NAME : sve_int_count; + + def : InstAlias(NAME) GPR64:$Rd, sve_pred_enum:$pattern, 1), 1>; + def : InstAlias(NAME) GPR64:$Rd, 0b11111, 1), 2>; +} + class sve_int_countvlv opc, string asm, ZPRRegOp zprty> : I<(outs zprty:$Zdn), (ins zprty:$_Zdn, sve_pred_enum:$pattern, sve_incdec_imm:$imm4), asm, "\t$Zdn, $pattern, mul $imm4", diff --git a/llvm/test/MC/AArch64/SVE/cntb-diagnostics.s b/llvm/test/MC/AArch64/SVE/cntb-diagnostics.s new file mode 100644 index 0000000..90ec588 --- /dev/null +++ b/llvm/test/MC/AArch64/SVE/cntb-diagnostics.s @@ -0,0 +1,57 @@ +// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s + +// ------------------------------------------------------------------------- // +// Invalid result register + +cntb w0 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand +// CHECK-NEXT: cntb w0 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +cntb sp +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand +// CHECK-NEXT: cntb sp +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +cntb z0.b +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand +// CHECK-NEXT: cntb z0.b +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// ------------------------------------------------------------------------- // +// Immediate not compatible with encode/decode function. + +cntb x0, all, mul #-1 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 16] +// CHECK-NEXT: cntb x0, all, mul #-1 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +cntb x0, all, mul #0 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 16] +// CHECK-NEXT: cntb x0, all, mul #0 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +cntb x0, all, mul #17 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 16] +// CHECK-NEXT: cntb x0, all, mul #17 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// ------------------------------------------------------------------------- // +// Invalid predicate patterns + +cntb x0, #-1 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern +// CHECK-NEXT: cntb x0, #-1 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +cntb x0, #32 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern +// CHECK-NEXT: cntb x0, #32 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +cntb x0, vl512 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand +// CHECK-NEXT: cntb x0, vl512 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: diff --git a/llvm/test/MC/AArch64/SVE/cntb.s b/llvm/test/MC/AArch64/SVE/cntb.s new file mode 100644 index 0000000..c5539ca --- /dev/null +++ b/llvm/test/MC/AArch64/SVE/cntb.s @@ -0,0 +1,44 @@ +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \ +// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \ +// RUN: | FileCheck %s --check-prefix=CHECK-ERROR +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \ +// RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \ +// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN + +cntb x0 +// CHECK-INST: cntb x0 +// CHECK-ENCODING: [0xe0,0xe3,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 e3 20 04 + +cntb x0, all +// CHECK-INST: cntb x0 +// CHECK-ENCODING: [0xe0,0xe3,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 e3 20 04 + +cntb x0, all, mul #1 +// CHECK-INST: cntb x0 +// CHECK-ENCODING: [0xe0,0xe3,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 e3 20 04 + +cntb x0, all, mul #16 +// CHECK-INST: cntb x0, all, mul #16 +// CHECK-ENCODING: [0xe0,0xe3,0x2f,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 e3 2f 04 + +cntb x0, pow2 +// CHECK-INST: cntb x0, pow2 +// CHECK-ENCODING: [0x00,0xe0,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 00 e0 20 04 + +cntb x0, #28 +// CHECK-INST: cntb x0, #28 +// CHECK-ENCODING: [0x80,0xe3,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 80 e3 20 04 diff --git a/llvm/test/MC/AArch64/SVE/cntd-diagnostics.s b/llvm/test/MC/AArch64/SVE/cntd-diagnostics.s new file mode 100644 index 0000000..6480f16 --- /dev/null +++ b/llvm/test/MC/AArch64/SVE/cntd-diagnostics.s @@ -0,0 +1,57 @@ +// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s + +// ------------------------------------------------------------------------- // +// Invalid result register + +cntd w0 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand +// CHECK-NEXT: cntd w0 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +cntd sp +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand +// CHECK-NEXT: cntd sp +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +cntd z0.b +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand +// CHECK-NEXT: cntd z0.b +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// ------------------------------------------------------------------------- // +// Immediate not compatible with encode/decode function. + +cntd x0, all, mul #-1 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 16] +// CHECK-NEXT: cntd x0, all, mul #-1 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +cntd x0, all, mul #0 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 16] +// CHECK-NEXT: cntd x0, all, mul #0 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +cntd x0, all, mul #17 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 16] +// CHECK-NEXT: cntd x0, all, mul #17 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// ------------------------------------------------------------------------- // +// Invalid predicate patterns + +cntd x0, #-1 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern +// CHECK-NEXT: cntd x0, #-1 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +cntd x0, #32 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern +// CHECK-NEXT: cntd x0, #32 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +cntd x0, vl512 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand +// CHECK-NEXT: cntd x0, vl512 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: diff --git a/llvm/test/MC/AArch64/SVE/cntd.s b/llvm/test/MC/AArch64/SVE/cntd.s new file mode 100644 index 0000000..31fc968 --- /dev/null +++ b/llvm/test/MC/AArch64/SVE/cntd.s @@ -0,0 +1,44 @@ +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \ +// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \ +// RUN: | FileCheck %s --check-prefix=CHECK-ERROR +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \ +// RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \ +// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN + +cntd x0 +// CHECK-INST: cntd x0 +// CHECK-ENCODING: [0xe0,0xe3,0xe0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 e3 e0 04 + +cntd x0, all +// CHECK-INST: cntd x0 +// CHECK-ENCODING: [0xe0,0xe3,0xe0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 e3 e0 04 + +cntd x0, all, mul #1 +// CHECK-INST: cntd x0 +// CHECK-ENCODING: [0xe0,0xe3,0xe0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 e3 e0 04 + +cntd x0, all, mul #16 +// CHECK-INST: cntd x0, all, mul #16 +// CHECK-ENCODING: [0xe0,0xe3,0xef,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 e3 ef 04 + +cntd x0, pow2 +// CHECK-INST: cntd x0, pow2 +// CHECK-ENCODING: [0x00,0xe0,0xe0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 00 e0 e0 04 + +cntd x0, #28 +// CHECK-INST: cntd x0, #28 +// CHECK-ENCODING: [0x80,0xe3,0xe0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 80 e3 e0 04 diff --git a/llvm/test/MC/AArch64/SVE/cnth-diagnostics.s b/llvm/test/MC/AArch64/SVE/cnth-diagnostics.s new file mode 100644 index 0000000..e504092 --- /dev/null +++ b/llvm/test/MC/AArch64/SVE/cnth-diagnostics.s @@ -0,0 +1,57 @@ +// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s + +// ------------------------------------------------------------------------- // +// Invalid result register + +cnth w0 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand +// CHECK-NEXT: cnth w0 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +cnth sp +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand +// CHECK-NEXT: cnth sp +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +cnth z0.b +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand +// CHECK-NEXT: cnth z0.b +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// ------------------------------------------------------------------------- // +// Immediate not compatible with encode/decode function. + +cnth x0, all, mul #-1 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 16] +// CHECK-NEXT: cnth x0, all, mul #-1 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +cnth x0, all, mul #0 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 16] +// CHECK-NEXT: cnth x0, all, mul #0 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +cnth x0, all, mul #17 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 16] +// CHECK-NEXT: cnth x0, all, mul #17 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// ------------------------------------------------------------------------- // +// Invalid predicate patterns + +cnth x0, #-1 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern +// CHECK-NEXT: cnth x0, #-1 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +cnth x0, #32 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern +// CHECK-NEXT: cnth x0, #32 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +cnth x0, vl512 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand +// CHECK-NEXT: cnth x0, vl512 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: diff --git a/llvm/test/MC/AArch64/SVE/cnth.s b/llvm/test/MC/AArch64/SVE/cnth.s new file mode 100644 index 0000000..404f835 --- /dev/null +++ b/llvm/test/MC/AArch64/SVE/cnth.s @@ -0,0 +1,44 @@ +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \ +// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \ +// RUN: | FileCheck %s --check-prefix=CHECK-ERROR +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \ +// RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \ +// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN + +cnth x0 +// CHECK-INST: cnth x0 +// CHECK-ENCODING: [0xe0,0xe3,0x60,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 e3 60 04 + +cnth x0, all +// CHECK-INST: cnth x0 +// CHECK-ENCODING: [0xe0,0xe3,0x60,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 e3 60 04 + +cnth x0, all, mul #1 +// CHECK-INST: cnth x0 +// CHECK-ENCODING: [0xe0,0xe3,0x60,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 e3 60 04 + +cnth x0, all, mul #16 +// CHECK-INST: cnth x0, all, mul #16 +// CHECK-ENCODING: [0xe0,0xe3,0x6f,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 e3 6f 04 + +cnth x0, pow2 +// CHECK-INST: cnth x0, pow2 +// CHECK-ENCODING: [0x00,0xe0,0x60,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 00 e0 60 04 + +cnth x0, #28 +// CHECK-INST: cnth x0, #28 +// CHECK-ENCODING: [0x80,0xe3,0x60,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 80 e3 60 04 diff --git a/llvm/test/MC/AArch64/SVE/cntp-diagnostics.s b/llvm/test/MC/AArch64/SVE/cntp-diagnostics.s new file mode 100644 index 0000000..95466d2 --- /dev/null +++ b/llvm/test/MC/AArch64/SVE/cntp-diagnostics.s @@ -0,0 +1,11 @@ +// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s + +cntp sp +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand +// CHECK-NEXT: cntp sp +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +cntp x0, p15, p0 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate register +// CHECK-NEXT: cntp x0, p15, p0 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: diff --git a/llvm/test/MC/AArch64/SVE/cntp.s b/llvm/test/MC/AArch64/SVE/cntp.s new file mode 100644 index 0000000..ec96928 --- /dev/null +++ b/llvm/test/MC/AArch64/SVE/cntp.s @@ -0,0 +1,32 @@ +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \ +// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \ +// RUN: | FileCheck %s --check-prefix=CHECK-ERROR +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \ +// RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \ +// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN + +cntp x0, p15, p0.b +// CHECK-INST: cntp x0, p15, p0.b +// CHECK-ENCODING: [0x00,0xbc,0x20,0x25] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 00 bc 20 25 + +cntp x0, p15, p0.h +// CHECK-INST: cntp x0, p15, p0.h +// CHECK-ENCODING: [0x00,0xbc,0x60,0x25] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 00 bc 60 25 + +cntp x0, p15, p0.s +// CHECK-INST: cntp x0, p15, p0.s +// CHECK-ENCODING: [0x00,0xbc,0xa0,0x25] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 00 bc a0 25 + +cntp x0, p15, p0.d +// CHECK-INST: cntp x0, p15, p0.d +// CHECK-ENCODING: [0x00,0xbc,0xe0,0x25] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 00 bc e0 25 diff --git a/llvm/test/MC/AArch64/SVE/cntw-diagnostics.s b/llvm/test/MC/AArch64/SVE/cntw-diagnostics.s new file mode 100644 index 0000000..c1cad40 --- /dev/null +++ b/llvm/test/MC/AArch64/SVE/cntw-diagnostics.s @@ -0,0 +1,57 @@ +// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s + +// ------------------------------------------------------------------------- // +// Invalid result register + +cntw w0 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand +// CHECK-NEXT: cntw w0 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +cntw sp +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand +// CHECK-NEXT: cntw sp +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +cntw z0.b +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand +// CHECK-NEXT: cntw z0.b +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// ------------------------------------------------------------------------- // +// Immediate not compatible with encode/decode function. + +cntw x0, all, mul #-1 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 16] +// CHECK-NEXT: cntw x0, all, mul #-1 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +cntw x0, all, mul #0 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 16] +// CHECK-NEXT: cntw x0, all, mul #0 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +cntw x0, all, mul #17 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 16] +// CHECK-NEXT: cntw x0, all, mul #17 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// ------------------------------------------------------------------------- // +// Invalid predicate patterns + +cntw x0, #-1 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern +// CHECK-NEXT: cntw x0, #-1 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +cntw x0, #32 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern +// CHECK-NEXT: cntw x0, #32 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +cntw x0, vl512 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand +// CHECK-NEXT: cntw x0, vl512 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: diff --git a/llvm/test/MC/AArch64/SVE/cntw.s b/llvm/test/MC/AArch64/SVE/cntw.s new file mode 100644 index 0000000..0f4a53e --- /dev/null +++ b/llvm/test/MC/AArch64/SVE/cntw.s @@ -0,0 +1,44 @@ +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \ +// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \ +// RUN: | FileCheck %s --check-prefix=CHECK-ERROR +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \ +// RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \ +// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN + +cntw x0 +// CHECK-INST: cntw x0 +// CHECK-ENCODING: [0xe0,0xe3,0xa0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 e3 a0 04 + +cntw x0, all +// CHECK-INST: cntw x0 +// CHECK-ENCODING: [0xe0,0xe3,0xa0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 e3 a0 04 + +cntw x0, all, mul #1 +// CHECK-INST: cntw x0 +// CHECK-ENCODING: [0xe0,0xe3,0xa0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 e3 a0 04 + +cntw x0, all, mul #16 +// CHECK-INST: cntw x0, all, mul #16 +// CHECK-ENCODING: [0xe0,0xe3,0xaf,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 e3 af 04 + +cntw x0, pow2 +// CHECK-INST: cntw x0, pow2 +// CHECK-ENCODING: [0x00,0xe0,0xa0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 00 e0 a0 04 + +cntw x0, #28 +// CHECK-INST: cntw x0, #28 +// CHECK-ENCODING: [0x80,0xe3,0xa0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 80 e3 a0 04 -- 2.7.4