From d3e5f2b74df453bb5879d3aadb66d88266470a43 Mon Sep 17 00:00:00 2001 From: Inki Dae Date: Fri, 23 Nov 2018 10:37:11 +0900 Subject: [PATCH] ARM: dts: exynos: set g3d parent clock to dpll MALI GPU device uses VPLL as its parent clock which generates 400MHz clock so it's not enough for MALI GPU device. This patch changes g3d parent clock to dpll which generates 600MHz. Change-Id: I42f0a8c13ec8eec8e91f73ba210e3c0cbcb596d0 Signed-off-by: Inki Dae --- arch/arm/boot/dts/exynos5422-odroid-core.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/exynos5422-odroid-core.dtsi b/arch/arm/boot/dts/exynos5422-odroid-core.dtsi index 6ebd184..704594f 100644 --- a/arch/arm/boot/dts/exynos5422-odroid-core.dtsi +++ b/arch/arm/boot/dts/exynos5422-odroid-core.dtsi @@ -422,6 +422,8 @@ &mali { mali-supply = <&buck4_reg>; + assigned-clocks = <&clock CLK_MOUT_ACLK_G3D>; + assigned-clock-parents = <&clock CLK_MOUT_DPLL>; status = "okay"; }; -- 2.7.4