From d3b2c172518dceed0d1d68f5b90dde5a2f6a438d Mon Sep 17 00:00:00 2001 From: Larry Finger Date: Tue, 19 Jul 2011 12:50:41 -0500 Subject: [PATCH] staging: rtl8192e: Prepare header files to ease use of typedef enum conversion The tool that I am using fails for certain conditions. This patch makes trivial changes to the source to allow the tool to work for all cases. I also remove some artifacts left from the typedef struct conversion. Signed-off-by: Larry Finger --- drivers/staging/rtl8192e/r8190P_def.h | 30 ++++++++-------- drivers/staging/rtl8192e/r8192E_cmdpkt.h | 12 +++---- drivers/staging/rtl8192e/r8192E_firmware.h | 20 +++++------ drivers/staging/rtl8192e/r8192E_phy.h | 6 ++-- drivers/staging/rtl8192e/rtl819x_HT.h | 40 +++++++++++----------- drivers/staging/rtl8192e/rtl819x_Qos.h | 18 +++++----- drivers/staging/rtl8192e/rtl_core.h | 30 ++++++++-------- drivers/staging/rtl8192e/rtl_debug.h | 4 +-- drivers/staging/rtl8192e/rtl_dm.h | 55 +++++++++++++++--------------- drivers/staging/rtl8192e/rtllib.h | 55 +++++++++++++++--------------- 10 files changed, 136 insertions(+), 134 deletions(-) diff --git a/drivers/staging/rtl8192e/r8190P_def.h b/drivers/staging/rtl8192e/r8190P_def.h index 8fcb9ce..a1b4967 100644 --- a/drivers/staging/rtl8192e/r8190P_def.h +++ b/drivers/staging/rtl8192e/r8190P_def.h @@ -29,12 +29,12 @@ #define RX_CMD_QUEUE 1 -typedef enum _rtl819x_loopback{ +typedef enum _rtl819x_loopback_e{ RTL819X_NO_LOOPBACK = 0, RTL819X_MAC_LOOPBACK = 1, RTL819X_DMA_LOOPBACK = 2, RTL819X_CCK_LOOPBACK = 3, -}rtl819x_loopback_e; +} rtl819x_loopback_e; #define RESET_DELAY_8185 20 @@ -132,7 +132,7 @@ typedef enum _rtl819x_loopback{ typedef enum _VERSION_8190{ VERSION_8190_BD=0x3, VERSION_8190_BE -}VERSION_8190,*PVERSION_8190; +} VERSION_8190,*PVERSION_8190; #define IC_VersionCut_C 0x2 #define IC_VersionCut_D 0x3 @@ -143,14 +143,14 @@ typedef enum tag_Rf_OpType RF_OP_By_SW_3wire = 0, RF_OP_By_FW, RF_OP_MAX -}RF_OpType_E; +} RF_OpType_E; typedef enum _POWER_SAVE_MODE { POWER_SAVE_MODE_ACTIVE, POWER_SAVE_MODE_SAVE, -}POWER_SAVE_MODE; +} POWER_SAVE_MODE; typedef enum _INTERFACE_SELECT_8190PCI{ INTF_SEL1_MINICARD = 0, @@ -178,7 +178,7 @@ struct bb_reg_definition { u32 rfTxAFE; u32 rfLSSIReadBack; u32 rfLSSIReadBackPi; -};//, *struct bb_reg_definition *; +}; struct tx_fwinfo { u8 TxRate:7; @@ -205,7 +205,7 @@ struct tx_fwinfo { u32 TxAGCSign:1; u32 Tx_INFO_RSVD:6; u32 PacketID:13; -};//; +}; struct tx_fwinfo_8190pci { u8 TxRate:7; @@ -237,7 +237,7 @@ struct tx_fwinfo_8190pci { u32 PacketID:13; -};//, *struct tx_fwinfo_8190pci *; +}; #define TX_DESC_SIZE 32 @@ -276,7 +276,7 @@ struct phy_ofdm_rx_status_rxsc_sgien_exintfflag { u8 rxsc:2; u8 sgi_en:1; u8 ex_intf_flag:1; -};//; +}; struct phy_sts_ofdm_819xpci { u8 trsw_gain_X[4]; @@ -292,13 +292,13 @@ struct phy_sts_ofdm_819xpci { u8 max_ex_pwr; u8 sgi_en; u8 rxsc_sgien_exflg; -};//; +}; struct phy_sts_cck_819xpci { u8 adc_pwdb_X[4]; u8 sq_rpt; u8 cck_agc_rpt; -};//; +}; #define PHY_RSSI_SLID_WIN_MAX 100 @@ -340,7 +340,7 @@ struct tx_desc { u32 Reserved5; u32 Reserved6; u32 Reserved7; -};//, *ptx_desc; +}; struct tx_desc_cmd { @@ -364,7 +364,7 @@ struct tx_desc_cmd { u32 Reserved4; u32 Reserved5; u32 Reserved6; -};//, *ptx_desc_cmd; +}; struct rx_desc { u16 Length:14; @@ -385,7 +385,7 @@ struct rx_desc { u32 BufferAddress; -};//, *prx_desc; +}; struct rx_fwinfo { @@ -407,6 +407,6 @@ struct rx_fwinfo { u32 TSFL; -};//, *prx_fwinfo; +}; #endif diff --git a/drivers/staging/rtl8192e/r8192E_cmdpkt.h b/drivers/staging/rtl8192e/r8192E_cmdpkt.h index 6fc37b6..97cc7b3 100644 --- a/drivers/staging/rtl8192e/r8192E_cmdpkt.h +++ b/drivers/staging/rtl8192e/r8192E_cmdpkt.h @@ -55,14 +55,14 @@ struct cmpk_txfb { u16 reserve3; /* */ u16 duration; /* */ -};//; +}; struct cmpk_intr_sta { u8 element_id; u8 length; u16 reserve; u32 interrupt_status; -};//; +}; struct cmpk_set_cfg { @@ -79,7 +79,7 @@ struct cmpk_set_cfg { u8 cfg_offset; u32 value; u32 mask; -};//; +}; #define cmpk_query_cfg_t struct cmpk_set_cfg @@ -118,7 +118,7 @@ struct cmpk_rx_dbginfo { u8 element_id; -};//; +}; struct cmpk_tx_rahis { u8 element_id; @@ -137,7 +137,7 @@ struct cmpk_tx_rahis { } __packed; -typedef enum tag_command_packet_directories +typedef enum _cmpk_element_e { RX_TX_FEEDBACK = 0, RX_INTERRUPT_STATUS = 1, @@ -148,7 +148,7 @@ typedef enum tag_command_packet_directories RX_TX_PER_PKT_FEEDBACK = 6, RX_TX_RATE_HISTORY = 7, RX_CMD_ELE_MAX -}cmpk_element_e; +} cmpk_element_e; extern u32 cmpk_message_handle_rx(struct net_device *dev, struct rtllib_rx_stats * pstats); extern bool cmpk_message_handle_tx(struct net_device *dev, u8* codevirtualaddress, u32 packettype, u32 buffer_len); diff --git a/drivers/staging/rtl8192e/r8192E_firmware.h b/drivers/staging/rtl8192e/r8192E_firmware.h index cb34b2b..64cc362 100644 --- a/drivers/staging/rtl8192e/r8192E_firmware.h +++ b/drivers/staging/rtl8192e/r8192E_firmware.h @@ -23,40 +23,40 @@ #define GET_COMMAND_PACKET_FRAG_THRESHOLD(v) (4*(v/4) - 8 ) -typedef enum _firmware_init_step{ +typedef enum _firmware_init_step_e{ FW_INIT_STEP0_BOOT = 0, FW_INIT_STEP1_MAIN = 1, FW_INIT_STEP2_DATA = 2, -}firmware_init_step_e; +} firmware_init_step_e; -typedef enum _opt_rst_type{ +typedef enum _opt_rst_type_e{ OPT_SYSTEM_RESET = 0, OPT_FIRMWARE_RESET = 1, -}opt_rst_type_e; +} opt_rst_type_e; typedef enum _desc_packet_type_e{ DESC_PACKET_TYPE_INIT = 0, DESC_PACKET_TYPE_NORMAL = 1, -}desc_packet_type_e; +} desc_packet_type_e; -typedef enum _firmware_source{ +typedef enum _firmware_source_e{ FW_SOURCE_IMG_FILE = 0, FW_SOURCE_HEADER_FILE = 1, -}firmware_source_e, *pfirmware_source_e; +} firmware_source_e, *pfirmware_source_e; -typedef enum _firmware_status{ +typedef enum _firmware_status_e{ FW_STATUS_0_INIT = 0, FW_STATUS_1_MOVE_BOOT_CODE = 1, FW_STATUS_2_MOVE_MAIN_CODE = 2, FW_STATUS_3_TURNON_CPU = 3, FW_STATUS_4_MOVE_DATA_CODE = 4, FW_STATUS_5_READY = 5, -}firmware_status_e; +} firmware_status_e; struct fw_seg_container { u16 seg_size; u8 *seg_ptr; -};//, *pfw_seg_container; +}; struct rt_firmware { firmware_status_e firmware_status; diff --git a/drivers/staging/rtl8192e/r8192E_phy.h b/drivers/staging/rtl8192e/r8192E_phy.h index 8a9b491..29bf6c6 100644 --- a/drivers/staging/rtl8192e/r8192E_phy.h +++ b/drivers/staging/rtl8192e/r8192E_phy.h @@ -73,7 +73,7 @@ extern u32 rtl819XRadioB_Array[]; extern u32 rtl819XRadioC_Array[]; extern u32 rtl819XRadioD_Array[]; -typedef enum _HW90_BLOCK { +typedef enum _HW90_BLOCK_E { HW90_BLOCK_MAC = 0, HW90_BLOCK_PHY0 = 1, HW90_BLOCK_PHY1 = 2, @@ -81,13 +81,13 @@ typedef enum _HW90_BLOCK { HW90_BLOCK_MAXIMUM = 4, } HW90_BLOCK_E, *PHW90_BLOCK_E; -typedef enum _RF90_RADIO_PATH{ +typedef enum _RF90_RADIO_PATH_E{ RF90_PATH_A = 0, RF90_PATH_B = 1, RF90_PATH_C = 2, RF90_PATH_D = 3, RF90_PATH_MAX -}RF90_RADIO_PATH_E, *PRF90_RADIO_PATH_E; +} RF90_RADIO_PATH_E, *PRF90_RADIO_PATH_E; #define bMaskByte0 0xff #define bMaskByte1 0xff00 diff --git a/drivers/staging/rtl8192e/rtl819x_HT.h b/drivers/staging/rtl8192e/rtl819x_HT.h index eeee72a..7a53872 100644 --- a/drivers/staging/rtl8192e/rtl819x_HT.h +++ b/drivers/staging/rtl8192e/rtl819x_HT.h @@ -56,19 +56,19 @@ typedef enum _HT_MCS_RATE{ HT_MCS13 = 0x00002000, HT_MCS14 = 0x00004000, HT_MCS15 = 0x00008000, -}HT_MCS_RATE,*PHT_MCS_RATE; +} HT_MCS_RATE,*PHT_MCS_RATE; typedef enum _HT_CHANNEL_WIDTH{ HT_CHANNEL_WIDTH_20 = 0, HT_CHANNEL_WIDTH_20_40 = 1, -}HT_CHANNEL_WIDTH, *PHT_CHANNEL_WIDTH; +} HT_CHANNEL_WIDTH, *PHT_CHANNEL_WIDTH; typedef enum _HT_EXTCHNL_OFFSET{ HT_EXTCHNL_OFFSET_NO_EXT = 0, HT_EXTCHNL_OFFSET_UPPER = 1, HT_EXTCHNL_OFFSET_NO_DEF = 2, HT_EXTCHNL_OFFSET_LOWER = 3, -}HT_EXTCHNL_OFFSET, *PHT_EXTCHNL_OFFSET; +} HT_EXTCHNL_OFFSET, *PHT_EXTCHNL_OFFSET; typedef enum _CHNLOP{ CHNLOP_NONE = 0, @@ -204,13 +204,13 @@ struct mimops_ctrl { typedef enum _HT_SPEC_VER{ HT_SPEC_VER_IEEE = 0, HT_SPEC_VER_EWC = 1, -}HT_SPEC_VER, *PHT_SPEC_VER; +} HT_SPEC_VER, *PHT_SPEC_VER; typedef enum _HT_AGGRE_MODE_E{ HT_AGG_AUTO = 0, HT_AGG_FORCE_ENABLE = 1, HT_AGG_FORCE_DISABLE = 2, -}HT_AGGRE_MODE_E, *PHT_AGGRE_MODE_E; +} HT_AGGRE_MODE_E, *PHT_AGGRE_MODE_E; struct rt_hi_throughput { @@ -327,7 +327,7 @@ struct rt_htinfo_sta_entry { u16 nAMSDU_MaxSize; -};//, *struct rt_htinfo_sta_entry *; +}; @@ -359,12 +359,12 @@ struct mimo_rssi { u32 AntennaC; u32 AntennaD; u32 Average; -};//, *struct mimo_rssi *; +}; struct mimo_evm { u32 EVM1; u32 EVM2; -};//, *struct mimo_evm *; +}; struct false_alarm_stats { u32 Cnt_Parity_Fail; @@ -374,7 +374,7 @@ struct false_alarm_stats { u32 Cnt_Ofdm_fail; u32 Cnt_Cck_fail; u32 Cnt_all; -};//, *struct false_alarm_stats *; +}; extern u8 MCS_FILTER_ALL[16]; @@ -397,14 +397,14 @@ extern u8 MCS_FILTER_1SS[16]; #define IS_11N_MCS_RATE(rate) (rate&0x80) -typedef enum _HT_AGGRE_SIZE{ +typedef enum _HT_AGGRE_SIZE_E{ HT_AGG_SIZE_8K = 0, HT_AGG_SIZE_16K = 1, HT_AGG_SIZE_32K = 2, HT_AGG_SIZE_64K = 3, -}HT_AGGRE_SIZE_E, *PHT_AGGRE_SIZE_E; +} HT_AGGRE_SIZE_E, *PHT_AGGRE_SIZE_E; -typedef enum _HT_IOT_PEER +typedef enum _HT_IOT_PEER_E { HT_IOT_PEER_UNKNOWN = 0, HT_IOT_PEER_REALTEK = 1, @@ -418,14 +418,14 @@ typedef enum _HT_IOT_PEER HT_IOT_PEER_SELF_SOFTAP = 9, HT_IOT_PEER_AIRGO = 10, HT_IOT_PEER_MAX = 11, -}HT_IOT_PEER_E, *PHTIOT_PEER_E; +} HT_IOT_PEER_E, *PHTIOT_PEER_E; -typedef enum _HT_IOT_PEER_SUBTYPE +typedef enum _HT_IOT_PEER_SUBTYPE_E { HT_IOT_PEER_ATHEROS_DIR635 = 0, -}HT_IOT_PEER_SUBTYPE_E, *PHTIOT_PEER_SUBTYPE_E; +} HT_IOT_PEER_SUBTYPE_E, *PHTIOT_PEER_SUBTYPE_E; -typedef enum _HT_IOT_ACTION{ +typedef enum _HT_IOT_ACTION_E{ HT_IOT_ACT_TX_USE_AMSDU_4K = 0x00000001, HT_IOT_ACT_TX_USE_AMSDU_8K = 0x00000002, HT_IOT_ACT_DISABLE_MCS14 = 0x00000004, @@ -458,21 +458,21 @@ typedef enum _HT_IOT_ACTION{ HT_IOT_ACT_DISABLE_RX_40MHZ_SHORT_GI = 0x08000000, -}HT_IOT_ACTION_E, *PHT_IOT_ACTION_E; +} HT_IOT_ACTION_E, *PHT_IOT_ACTION_E; typedef enum _HT_IOT_RAFUNC{ HT_IOT_RAFUNC_DISABLE_ALL = 0x00, HT_IOT_RAFUNC_PEER_1R = 0x01, HT_IOT_RAFUNC_TX_AMSDU = 0x02, -}HT_IOT_RAFUNC, *PHT_IOT_RAFUNC; +} HT_IOT_RAFUNC, *PHT_IOT_RAFUNC; -typedef enum _RT_HT_CAP{ +typedef enum _RT_HT_CAPBILITY{ RT_HT_CAP_USE_TURBO_AGGR = 0x01, RT_HT_CAP_USE_LONG_PREAMBLE = 0x02, RT_HT_CAP_USE_AMPDU = 0x04, RT_HT_CAP_USE_WOW = 0x8, RT_HT_CAP_USE_SOFTAP = 0x10, RT_HT_CAP_USE_92SE = 0x20, -}RT_HT_CAPBILITY, *PRT_HT_CAPBILITY; +} RT_HT_CAPBILITY, *PRT_HT_CAPBILITY; #endif diff --git a/drivers/staging/rtl8192e/rtl819x_Qos.h b/drivers/staging/rtl8192e/rtl819x_Qos.h index d4902d8..1a8267d 100644 --- a/drivers/staging/rtl8192e/rtl819x_Qos.h +++ b/drivers/staging/rtl8192e/rtl819x_Qos.h @@ -107,7 +107,7 @@ struct wmm_tspec { struct octet_string { u8 *Octet; u16 Length; -};//, *struct octet_string *; +}; #define MAX_WMMELE_LENGTH 64 typedef u32 QOS_MODE, *PQOS_MODE; @@ -139,7 +139,7 @@ typedef u32 QOS_MODE, *PQOS_MODE; typedef enum _ACK_POLICY{ eAckPlc0_ACK = 0x00, eAckPlc1_NoACK = 0x01, -}ACK_POLICY,*PACK_POLICY; +} ACK_POLICY,*PACK_POLICY; #define SET_WMM_QOS_INFO_FIELD(_pStart, _val) WriteEF1Byte(_pStart, _val) @@ -165,7 +165,7 @@ typedef enum _ACK_POLICY{ #define GET_WMM_QOS_INFO_FIELD_STA_MAX_SP_LEN(_pStart) LE_BITS_TO_1BYTE(_pStart, 5, 2) #define SET_WMM_QOS_INFO_FIELD_STA_MAX_SP_LEN(_pStart, _val) SET_BITS_TO_LE_1BYTE(_pStart, 5, 2, _val) -typedef enum { +typedef enum _QOSIE_SOURCE{ QOSIE_SRC_ADDTSREQ, QOSIE_SRC_ADDTSRSP, QOSIE_SRC_REASOCREQ, @@ -212,7 +212,7 @@ typedef u32 AC_CODING; typedef enum _QOS_ELE_SUBTYPE{ QOSELE_TYPE_INFO = 0x00, QOSELE_TYPE_PARAM = 0x01, -}QOS_ELE_SUBTYPE,*PQOS_ELE_SUBTYPE; +} QOS_ELE_SUBTYPE,*PQOS_ELE_SUBTYPE; typedef enum _DIRECTION_VALUE{ @@ -220,20 +220,20 @@ typedef enum _DIRECTION_VALUE{ DIR_DOWN = 1, DIR_DIRECT = 2, DIR_BI_DIR = 3, -}DIRECTION_VALUE,*PDIRECTION_VALUE; +} DIRECTION_VALUE,*PDIRECTION_VALUE; typedef enum _ACM_METHOD{ eAcmWay0_SwAndHw = 0, eAcmWay1_HW = 1, eAcmWay2_SW = 2, -}ACM_METHOD,*PACM_METHOD; +} ACM_METHOD,*PACM_METHOD; struct acm { u64 UsedTime; u64 MediumTime; u8 HwAcmCtl; -};//, *struct acm *; +}; @@ -343,7 +343,7 @@ struct sta_qos { bool bEnableRxImmBA; -};//, *struct sta_qos *; +}; #define QBSS_LOAD_SIZE 5 #define GET_QBSS_LOAD_STA_COUNT(__pStart) ReadEF2Byte(__pStart) @@ -366,7 +366,7 @@ struct bss_qos { u8 QBssLoad[QBSS_LOAD_SIZE]; bool bQBssLoadValid; -};//, *struct bss_qos *; +}; #define sQoSCtlLng 2 #define QOS_CTRL_LEN(_QosMode) ( (_QosMode > QOS_DISABLE)? sQoSCtlLng : 0 ) diff --git a/drivers/staging/rtl8192e/rtl_core.h b/drivers/staging/rtl8192e/rtl_core.h index 1038ed8..16fbb93 100644 --- a/drivers/staging/rtl8192e/rtl_core.h +++ b/drivers/staging/rtl8192e/rtl_core.h @@ -240,7 +240,7 @@ enum RTL_DEBUG { COMP_ERR = BIT31 }; -typedef enum{ +typedef enum _nic_t{ NIC_UNKNOWN = 0, NIC_8192E = 1, NIC_8190P = 2, @@ -255,9 +255,9 @@ typedef enum _RT_EEPROM_TYPE{ EEPROM_93C46, EEPROM_93C56, EEPROM_BOOT_EFUSE, -}RT_EEPROM_TYPE,*PRT_EEPROM_TYPE; +} RT_EEPROM_TYPE,*PRT_EEPROM_TYPE; -typedef enum _tag_TxCmd_Config_Index{ +typedef enum _DCMD_TXCMD_OP{ TXCMD_TXRA_HISTORY_CTRL = 0xFF900000, TXCMD_RESET_TX_PKT_BUFF = 0xFF900001, TXCMD_RESET_RX_PKT_BUFF = 0xFF900002, @@ -265,7 +265,7 @@ typedef enum _tag_TxCmd_Config_Index{ TXCMD_SET_RX_RSSI = 0xFF900004, TXCMD_SET_TX_PWR_TRACKING = 0xFF900005, TXCMD_XXXX_CTRL, -}DCMD_TXCMD_OP; +} DCMD_TXCMD_OP; typedef enum _RT_RF_TYPE_819xU{ RF_TYPE_MIN = 0, @@ -274,21 +274,21 @@ typedef enum _RT_RF_TYPE_819xU{ RF_8258, RF_6052=4, RF_PSEUDO_11N = 5, -}RT_RF_TYPE_819xU, *PRT_RF_TYPE_819xU; +} RT_RF_TYPE_819xU, *PRT_RF_TYPE_819xU; -typedef enum tag_Rf_Operatetion_State +typedef enum _RF_STEP_E { RF_STEP_INIT = 0, RF_STEP_NORMAL, RF_STEP_MAX -}RF_STEP_E; +} RF_STEP_E; typedef enum _RT_STATUS{ RT_STATUS_SUCCESS, RT_STATUS_FAILURE, RT_STATUS_PENDING, RT_STATUS_RESOURCE -}RT_STATUS,*PRT_STATUS; +} RT_STATUS,*PRT_STATUS; typedef enum _RT_CUSTOMER_ID { @@ -322,7 +322,7 @@ typedef enum _RT_CUSTOMER_ID RT_CID_819x_Arcadyan_Belkin = 29, RT_CID_819x_SAMSUNG = 30, RT_CID_819x_WNC_COREGA = 31, -}RT_CUSTOMER_ID, *PRT_CUSTOMER_ID; +} RT_CUSTOMER_ID, *PRT_CUSTOMER_ID; typedef enum _RESET_TYPE { RESET_TYPE_NORESET = 0x00, @@ -333,7 +333,7 @@ typedef enum _RESET_TYPE { typedef enum _IC_INFERIORITY_8192S{ IC_INFERIORITY_A = 0, IC_INFERIORITY_B = 1, -}IC_INFERIORITY_8192S, *PIC_INFERIORITY_8192S; +} IC_INFERIORITY_8192S, *PIC_INFERIORITY_8192S; typedef enum _PCI_BRIDGE_VENDOR { PCI_BRIDGE_VENDOR_INTEL = 0x0, @@ -360,20 +360,20 @@ struct rtl_reg_debug { unsigned char length; } head; unsigned char buf[0xff]; -};//; +}; struct rt_tx_rahis { u32 cck[4]; u32 ofdm[8]; u32 ht_mcs[4][16]; -};//, *prt_tx_rahis_t; +}; struct rt_smooth_data_4rf { char elements[4][100]; u32 index; u32 TotalNum; u32 TotalVal[4]; -};//, *struct rt_smooth_data_4rf *; +}; struct rt_stats { unsigned long txrdu; @@ -487,7 +487,7 @@ typedef enum _TWO_PORT_STATUS TWO_PORT_STATUS__DEFAULT_G_EXTENSION_N20, TWO_PORT_STATUS__ADHOC, TWO_PORT_STATUS__WITHOUT_ANY_ASSOCIATE -}TWO_PORT_STATUS; +} TWO_PORT_STATUS; struct txbbgain_struct { long txbb_iq_amplifygain; @@ -1015,7 +1015,7 @@ struct r8192_priv { u8 H2CTxCmdSeq; -};//; +}; extern const struct ethtool_ops rtl819x_ethtool_ops; diff --git a/drivers/staging/rtl8192e/rtl_debug.h b/drivers/staging/rtl8192e/rtl_debug.h index 1d4177e..2c32ece 100644 --- a/drivers/staging/rtl8192e/rtl_debug.h +++ b/drivers/staging/rtl8192e/rtl_debug.h @@ -43,7 +43,7 @@ struct net_device; printk Fmt; \ } -typedef enum tag_DBGP_Flag_Type_Definition +typedef enum _DBGP_FLAG_E { FQoS = 0, FTX = 1, @@ -65,7 +65,7 @@ typedef enum tag_DBGP_Flag_Type_Definition FINIT = 17, FIOCTL = 18, DBGP_TYPE_MAX -}DBGP_FLAG_E; +} DBGP_FLAG_E; #define QoS_INIT BIT0 #define QoS_VISTA BIT1 diff --git a/drivers/staging/rtl8192e/rtl_dm.h b/drivers/staging/rtl8192e/rtl_dm.h index a9aa09f..219e4af 100644 --- a/drivers/staging/rtl8192e/rtl_dm.h +++ b/drivers/staging/rtl8192e/rtl_dm.h @@ -125,25 +125,25 @@ struct dig_t { bool initialgain_lowerbound_state; long rssi_val; -};//; +}; -typedef enum tag_dynamic_init_gain_state_definition +typedef enum _dm_dig_sta_e { DM_STA_DIG_OFF = 0, DM_STA_DIG_ON, DM_STA_DIG_MAX -}dm_dig_sta_e; +} dm_dig_sta_e; -typedef enum tag_dynamic_ratr_state_definition +typedef enum _dm_ratr_sta_e { DM_RATR_STA_HIGH = 0, DM_RATR_STA_MIDDLE = 1, DM_RATR_STA_LOW = 2, DM_RATR_STA_MAX -}dm_ratr_sta_e; +} dm_ratr_sta_e; -typedef enum tag_dynamic_init_gain_operation_type_definition +typedef enum _dm_dig_op_e { DIG_TYPE_THRESH_HIGH = 0, DIG_TYPE_THRESH_LOW = 1, @@ -159,41 +159,41 @@ typedef enum tag_dynamic_init_gain_operation_type_definition DIG_TYPE_ENABLE = 20, DIG_TYPE_DISABLE = 30, DIG_OP_TYPE_MAX -}dm_dig_op_e; +} dm_dig_op_e; -typedef enum tag_dig_algorithm_definition +typedef enum _dm_dig_alg_e { DIG_ALGO_BY_FALSE_ALARM = 0, DIG_ALGO_BY_RSSI = 1, DIG_ALGO_BEFORE_CONNECT_BY_RSSI_AND_ALARM = 2, DIG_ALGO_BY_TOW_PORT = 3, DIG_ALGO_MAX -}dm_dig_alg_e; +} dm_dig_alg_e; -typedef enum tag_DIG_TWO_PORT_ALGO_Definition +typedef enum _DM_DIG_TWO_PORT_ALG_E { DIG_TWO_PORT_ALGO_RSSI = 0, DIG_TWO_PORT_ALGO_FALSE_ALARM = 1, -}DM_DIG_TWO_PORT_ALG_E; +} DM_DIG_TWO_PORT_ALG_E; -typedef enum tag_DIG_EXT_PORT_ALGO_Definition +typedef enum _DM_DIG_EXT_PORT_ALG_E { DIG_EXT_PORT_STAGE_0 = 0, DIG_EXT_PORT_STAGE_1 = 1, DIG_EXT_PORT_STAGE_2 = 2, DIG_EXT_PORT_STAGE_3 = 3, DIG_EXT_PORT_STAGE_MAX = 4, -}DM_DIG_EXT_PORT_ALG_E; +} DM_DIG_EXT_PORT_ALG_E; -typedef enum tag_dig_dbgmode_definition +typedef enum _dm_dig_dbg_e { DIG_DBG_OFF = 0, DIG_DBG_ON = 1, DIG_DBG_MAX -}dm_dig_dbg_e; +} dm_dig_dbg_e; -typedef enum tag_dig_connect_definition +typedef enum _dm_dig_connect_e { DIG_STA_DISCONNECT = 0, DIG_STA_CONNECT = 1, @@ -202,22 +202,23 @@ typedef enum tag_dig_connect_definition DIG_AP_CONNECT = 4, DIG_AP_ADD_STATION = 5, DIG_CONNECT_MAX -}dm_dig_connect_e; +} dm_dig_connect_e; -typedef enum tag_dig_packetdetection_threshold_definition +typedef enum _dm_dig_pd_th_e { DIG_PD_AT_LOW_POWER = 0, DIG_PD_AT_NORMAL_POWER = 1, DIG_PD_AT_HIGH_POWER = 2, DIG_PD_MAX -}dm_dig_pd_th_e; +} dm_dig_pd_th_e; -typedef enum tag_dig_cck_cs_ratio_state_definition +typedef enum _dm_dig_cs_ratio_e { DIG_CS_RATIO_LOWER = 0, DIG_CS_RATIO_HIGHER = 1, DIG_CS_MAX -}dm_dig_cs_ratio_e; +} dm_dig_cs_ratio_e; + struct drx_path_sel { u8 Enable; u8 DbgMode; @@ -232,28 +233,28 @@ struct drx_path_sel { u8 rf_rssi[4]; u8 rf_enable_rssi_th[4]; long cck_pwdb_sta[4]; -};//; +}; -typedef enum tag_CCK_Rx_Path_Method_Definition +typedef enum _DM_CCK_Rx_Path_Method { CCK_Rx_Version_1 = 0, CCK_Rx_Version_2= 1, CCK_Rx_Version_MAX -}DM_CCK_Rx_Path_Method; +} DM_CCK_Rx_Path_Method; -typedef enum tag_DM_DbgMode_Definition +typedef enum _DM_DBG_E { DM_DBG_OFF = 0, DM_DBG_ON = 1, DM_DBG_MAX -}DM_DBG_E; +} DM_DBG_E; struct dcmd_txcmd { u32 Op; u32 Length; u32 Value; -};//, *struct dcmd_txcmd *; +}; /*------------------------------Define structure----------------------------*/ diff --git a/drivers/staging/rtl8192e/rtllib.h b/drivers/staging/rtl8192e/rtllib.h index aadaa95..b5ee8e5 100644 --- a/drivers/staging/rtl8192e/rtllib.h +++ b/drivers/staging/rtl8192e/rtllib.h @@ -200,7 +200,7 @@ struct cb_desc { u8 bBTTxPacket; u8 bIsBTProbRsp; -};//, *pcb_desc; +}; /*--------------------------Define -------------------------------------------*/ #define MGN_1M 0x02 @@ -309,7 +309,7 @@ typedef enum _HAL_DEF_VARIABLE{ HAL_DEF_PCI_SUPPORT_ASPM, HAL_DEF_THERMAL_VALUE, HAL_DEF_USB_IN_TOKEN_REV, -}HAL_DEF_VARIABLE; +} HAL_DEF_VARIABLE; typedef enum _HW_VARIABLES{ @@ -401,14 +401,14 @@ typedef enum _HW_VARIABLES{ HW_VAR_INT_MIGRATION, HW_VAR_INT_AC, HW_VAR_RF_TIMING, -}HW_VARIABLES; +} HW_VARIABLES; typedef enum _RT_OP_MODE{ RT_OP_MODE_AP, RT_OP_MODE_INFRASTRUCTURE, RT_OP_MODE_IBSS, RT_OP_MODE_NO_LINK, -}RT_OP_MODE, *PRT_OP_MODE; +} RT_OP_MODE, *PRT_OP_MODE; #define aSifsTime (((priv->rtllib->current_network.mode == IEEE_A)||(priv->rtllib->current_network.mode == IEEE_N_24G)||(priv->rtllib->current_network.mode == IEEE_N_5G))? 16 : 10) @@ -482,7 +482,7 @@ struct ieee_param { u8 key[0]; } crypt; } u; -};//; +}; #if WIRELESS_EXT < 17 @@ -619,7 +619,8 @@ typedef enum _InitialGainOpType{ IG_Backup=0, IG_Restore, IG_Max -}InitialGainOpType; +} InitialGainOpType; + typedef enum _LED_CTL_MODE{ LED_CTL_POWER_ON = 1, LED_CTL_LINK = 2, @@ -634,7 +635,7 @@ typedef enum _LED_CTL_MODE{ LED_CTL_START_WPS_BOTTON = 11, LED_CTL_STOP_WPS_FAIL = 12, LED_CTL_STOP_WPS_FAIL_OVERLAP = 13, -}LED_CTL_MODE; +} LED_CTL_MODE; typedef enum _RT_RF_TYPE_DEF { @@ -644,7 +645,7 @@ typedef enum _RT_RF_TYPE_DEF RF_1T1R, RF_2T2R_GREEN, RF_819X_MAX_TYPE -}RT_RF_TYPE_DEF; +} RT_RF_TYPE_DEF; typedef enum _WIRELESS_MODE { WIRELESS_MODE_UNKNOWN = 0x00, @@ -656,7 +657,7 @@ typedef enum _WIRELESS_MODE { WIRELESS_MODE_N_5G = 0x20 } WIRELESS_MODE; -typedef enum _NETWORK_TYPE{ +typedef enum _WIRELESS_NETWORK_TYPE{ WIRELESS_11B = 1, WIRELESS_11G = 2, WIRELESS_11A = 4, @@ -1775,14 +1776,14 @@ enum rtllib_state { struct tx_pending { int frag; struct rtllib_txb *txb; -};//; +}; struct bandwidth_autoswitch { long threshold_20Mhzto40Mhz; long threshold_40Mhzto20Mhz; bool bforced_tx20Mhz; bool bautoswitch_enable; -};//,*pbandwidth_autoswitch; +}; @@ -1797,7 +1798,7 @@ typedef enum _Fsync_State{ Default_Fsync, HW_Fsync, SW_Fsync -}Fsync_State; +} Fsync_State; typedef enum _RT_PS_MODE { @@ -1805,25 +1806,25 @@ typedef enum _RT_PS_MODE eMaxPs, eFastPs, eAutoPs, -}RT_PS_MODE; +} RT_PS_MODE; typedef enum _IPS_CALLBACK_FUNCION { IPS_CALLBACK_NONE = 0, IPS_CALLBACK_MGNT_LINK_REQUEST = 1, IPS_CALLBACK_JOIN_REQUEST = 2, -}IPS_CALLBACK_FUNCION; +} IPS_CALLBACK_FUNCION; typedef enum _RT_JOIN_ACTION{ RT_JOIN_INFRA = 1, RT_JOIN_IBSS = 2, RT_START_IBSS = 3, RT_NO_ACTION = 4, -}RT_JOIN_ACTION; +} RT_JOIN_ACTION; struct ibss_parms { u16 atimWin; -};//, *struct ibss_parms *; +}; #define MAX_NUM_RATES 264 typedef enum _RT_RF_POWER_STATE @@ -1831,7 +1832,7 @@ typedef enum _RT_RF_POWER_STATE eRfOn, eRfSleep, eRfOff -}RT_RF_POWER_STATE; +} RT_RF_POWER_STATE; #define MAX_SUPPORT_WOL_PATTERN_NUM 8 @@ -1845,7 +1846,7 @@ typedef enum _WOLPATTERN_TYPE eIPv4IPv6TCPSYN, eMACIDOnly, eNoDefined, -}WOLPATTERN_TYPE; +} WOLPATTERN_TYPE; struct rt_pm_wol_info { u32 PatternId; @@ -1853,7 +1854,7 @@ struct rt_pm_wol_info { u16 CrcRemainder; u8 WFMIndex; WOLPATTERN_TYPE PatternType; -};//, *struct rt_pm_wol_info *; +}; struct rt_pwr_save_ctrl { @@ -1912,7 +1913,7 @@ struct rt_pwr_save_ctrl { u8 oWLANMode; struct rt_pm_wol_info PmWoLPatternInfo[MAX_SUPPORT_WOL_PATTERN_NUM]; -};//,*struct rt_pwr_save_ctrl *; +}; typedef u32 RT_RF_CHANGE_SOURCE; #define RF_CHANGE_BY_SW BIT31 @@ -1921,7 +1922,7 @@ typedef u32 RT_RF_CHANGE_SOURCE; #define RF_CHANGE_BY_IPS BIT28 #define RF_CHANGE_BY_INIT 0 -typedef enum +typedef enum _country_code_type_t { COUNTRY_CODE_FCC = 0, COUNTRY_CODE_IC = 1, @@ -1937,13 +1938,13 @@ typedef enum COUNTRY_CODE_WORLD_WIDE_13 = 11, COUNTRY_CODE_TELEC_NETGEAR = 12, COUNTRY_CODE_MAX -}country_code_type_t; +} country_code_type_t; typedef enum _SCAN_OPERATION_BACKUP_OPT{ SCAN_OPT_BACKUP=0, SCAN_OPT_RESTORE, SCAN_OPT_MAX -}SCAN_OPERATION_BACKUP_OPT; +} SCAN_OPERATION_BACKUP_OPT; typedef enum _FW_CMD_IO_TYPE{ FW_CMD_DIG_ENABLE = 0, @@ -1977,7 +1978,7 @@ typedef enum _FW_CMD_IO_TYPE{ FW_CMD_CTRL_DM_BY_DRIVER_NEW = 28, FW_CMD_PAPE_CONTROL = 29, FW_CMD_CHAN_SET = 30, -}FW_CMD_IO_TYPE,*PFW_CMD_IO_TYPE; +} FW_CMD_IO_TYPE,*PFW_CMD_IO_TYPE; #define RT_MAX_LD_SLOT_NUM 10 struct rt_link_detect { @@ -2000,7 +2001,7 @@ struct rt_link_detect { u32 NumTxUnicastOkInPeriod; u32 LastNumTxUnicast; u32 LastNumRxUnicast; -};//, *struct rt_link_detect *; +}; struct sw_cam_table { @@ -2011,7 +2012,7 @@ struct sw_cam_table { u8 useDK; u8 key_index; -};//,*struct sw_cam_table *; +}; #define TOTAL_CAM_ENTRY 32 struct rate_adaptive { u8 rate_adaptive_disabled; @@ -2046,7 +2047,7 @@ typedef enum _RATR_TABLE_MODE_8192S{ RATR_INX_WIRELESS_B = 6, RATR_INX_WIRELESS_MC = 7, RATR_INX_WIRELESS_A = 8, -}RATR_TABLE_MODE_8192S, *PRATR_TABLE_MODE_8192S; +} RATR_TABLE_MODE_8192S, *PRATR_TABLE_MODE_8192S; #define NUM_PMKID_CACHE 16 struct rt_pmkid_list { -- 2.7.4