From d383851245a2dcc8fe84994125f64edb3e9803f4 Mon Sep 17 00:00:00 2001 From: Peipeng Zhao Date: Thu, 9 Nov 2017 14:53:23 +0800 Subject: [PATCH] led: fixed led driver for is31fl32xx PD#154214: fixed led is31fl32xx driver for D605 board please add CONFIG_LEDS_IS31FL32XX=y on kernel defconfig please read Documentation/leds/leds-is31fl32xx.txt in order to configure dts Change-Id: Ib9903c5d628fd392bde3787786a4dfb2e90911a6 Signed-off-by: Peipeng Zhao --- Documentation/leds/leds-is31fl32xx.txt | 111 +++++++++++++++++++++++++++++++++ MAINTAINERS | 4 ++ drivers/leds/leds-is31fl32xx.c | 14 ++++- 3 files changed, 126 insertions(+), 3 deletions(-) create mode 100644 Documentation/leds/leds-is31fl32xx.txt diff --git a/Documentation/leds/leds-is31fl32xx.txt b/Documentation/leds/leds-is31fl32xx.txt new file mode 100644 index 0000000..079e243 --- /dev/null +++ b/Documentation/leds/leds-is31fl32xx.txt @@ -0,0 +1,111 @@ +dts config for lm3556 + +======================== + +&i2c_ao { + status = "okay"; + pinctrl-names="default"; + pinctrl-0=<&ao_i2c_master_pin2>; + + is31fl3236a: is31f3236a@0x78 { + compatible = "issi,is31fl3236"; + reg = <0x3c>; + status = "okay"; + led1_r { + label="LED1_R"; + reg_offset = <24>; + }; + led1_g { + label="LED1_G"; + reg_offset = <23>; + }; + led1_b { + label="LED1_B"; + reg_offset = <22>; + }; + led2_r { + label="LED2_R"; + reg_offset = <21>; + }; + led2_g { + label="LED2_G"; + reg_offset = <20>; + }; + led2_b { + label="LED2_B"; + reg_offset = <19>; + }; + led3_r { + label="LED3_R"; + reg_offset = <18>; + }; + led3_g { + label="LED3_G"; + reg_offset = <17>; + }; + led3_b { + label="LED3_B"; + reg_offset = <16>; + }; + led4_r { + label="LED4_R"; + reg_offset = <15>; + }; + led4_g { + label="LED4_G"; + reg_offset = <14>; + }; + led4_b { + label="LED4_B"; + reg_offset = <13>; + }; + led5_r { + label="LED5_R"; + reg_offset = <36>; + }; + led5_g { + label="LED5_G"; + reg_offset = <35>; + }; + led5_b { + label="LED5_B"; + reg_offset = <34>; + }; + led6_r { + label="LED6_R"; + reg_offset = <33>; + }; + led6_g { + label="LED6_G"; + reg_offset = <32>; + }; + led6_b { + label="LED6_B"; + reg_offset = <31>; + }; + led7_r { + label="LED7_R"; + reg_offset = <30>; + }; + led7_g { + label="LED7_G"; + reg_offset = <29>; + }; + led7_b { + label="LED7_B"; + reg_offset = <28>; + }; + led8_r { + label="LED8_R"; + reg_offset = <27>; + }; + led8_g { + label="LED8_G"; + reg_offset = <26>; + }; + led8_b { + label="LED8_B"; + reg_offset = <25>; + }; + }; +} diff --git a/MAINTAINERS b/MAINTAINERS index 8116124..30307ea 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -14139,3 +14139,7 @@ M: Peipeng Zhao F: sound/soc/codec/amlogic/es7243.c F: sound/soc/codec/amlogic/es7243.h F: Documentation/devicetree/bindings/sound/es7243.txt + +AMLOGIC LED DRVIER +M: Peipeng Zhao +F: Documentation/leds/leds-is31fl32xx.txt diff --git a/drivers/leds/leds-is31fl32xx.c b/drivers/leds/leds-is31fl32xx.c index 478844c..2dba831 100644 --- a/drivers/leds/leds-is31fl32xx.c +++ b/drivers/leds/leds-is31fl32xx.c @@ -84,6 +84,7 @@ struct is31fl32xx_chipdef { bool pwm_registers_reversed; u8 led_control_register_base; u8 enable_bits_per_led_control_register; + u8 pwm_frequency_set_reg; int (*reset_func)(struct is31fl32xx_priv *priv); int (*sw_shutdown_func)(struct is31fl32xx_priv *priv, bool enable); }; @@ -95,6 +96,7 @@ static const struct is31fl32xx_chipdef is31fl3236_cdef = { .global_control_reg = 0x4a, .reset_reg = 0x4f, .pwm_register_base = 0x01, + .pwm_frequency_set_reg = 0x4b, .led_control_register_base = 0x26, .enable_bits_per_led_control_register = 1, }; @@ -308,8 +310,8 @@ static int is31fl32xx_init_regs(struct is31fl32xx_priv *priv) for (i = 0; i < num_regs; i++) { ret = is31fl32xx_write(priv, - cdef->led_control_register_base+i, - value); + cdef->led_control_register_base+i, + value); if (ret) return ret; } @@ -325,6 +327,12 @@ static int is31fl32xx_init_regs(struct is31fl32xx_priv *priv) return ret; } + if (cdef->pwm_frequency_set_reg) { + ret = is31fl32xx_write(priv, cdef->pwm_frequency_set_reg, 0x01); + if (ret) + return ret; + } + return 0; } @@ -345,7 +353,7 @@ static int is31fl32xx_parse_child_dt(const struct device *dev, if (of_property_read_string(child, "label", &cdev->name)) cdev->name = child->name; - ret = of_property_read_u32(child, "reg", ®); + ret = of_property_read_u32(child, "reg_offset", ®); if (ret || reg < 1 || reg > led_data->priv->cdef->channels) { dev_err(dev, "Child node %s does not have a valid reg property\n", -- 2.7.4