From d30df5769eb1c8df9a4df3068096e77a76f0bac5 Mon Sep 17 00:00:00 2001 From: Simon Pilgrim Date: Thu, 15 Mar 2018 15:12:12 +0000 Subject: [PATCH] [X86][Btver2] Remove JAny resource, and map system/microcoded instructions to JALU pipes Simplifies throughput to the issue width (1/2) instead of permitting any pipe (1/6) llvm-svn: 327632 --- llvm/lib/Target/X86/X86ScheduleBtVer2.td | 8 +-- llvm/test/CodeGen/X86/mmx-schedule.ll | 2 +- llvm/test/CodeGen/X86/schedule-x86_32.ll | 42 ++++++------ llvm/test/CodeGen/X86/schedule-x86_64.ll | 106 +++++++++++++++---------------- llvm/test/CodeGen/X86/sse3-schedule.ll | 4 +- llvm/test/CodeGen/X86/x87-schedule.ll | 92 +++++++++++++-------------- 6 files changed, 125 insertions(+), 129 deletions(-) diff --git a/llvm/lib/Target/X86/X86ScheduleBtVer2.td b/llvm/lib/Target/X86/X86ScheduleBtVer2.td index f027261..854ea4d 100644 --- a/llvm/lib/Target/X86/X86ScheduleBtVer2.td +++ b/llvm/lib/Target/X86/X86ScheduleBtVer2.td @@ -38,9 +38,6 @@ def JSAGU : ProcResource<1>; // Integer Pipe3: SAGU (also handles 3-operand LEA) def JFPU0 : ProcResource<1>; // Vector/FPU Pipe0: VALU0/VIMUL/FPA def JFPU1 : ProcResource<1>; // Vector/FPU Pipe1: VALU1/STC/FPM -// Any pipe - FIXME we need this until we can discriminate between int/fpu load/store/moves properly -def JAny : ProcResGroup<[JALU0, JALU1, JLAGU, JSAGU, JFPU0, JFPU1]>; - // Integer Pipe Scheduler def JALU01 : ProcResGroup<[JALU0, JALU1]> { let BufferSize=20; @@ -239,11 +236,10 @@ defm : JWriteResIntPair; //////////////////////////////////////////////////////////////////////////////// // Special case scheduling classes. -// FIXME: pipe for system/microcode? //////////////////////////////////////////////////////////////////////////////// -def : WriteRes { let Latency = 100; } -def : WriteRes { let Latency = 100; } +def : WriteRes { let Latency = 100; } +def : WriteRes { let Latency = 100; } def : WriteRes; def : WriteRes; diff --git a/llvm/test/CodeGen/X86/mmx-schedule.ll b/llvm/test/CodeGen/X86/mmx-schedule.ll index fbc2bba..e6bf7eb 100644 --- a/llvm/test/CodeGen/X86/mmx-schedule.ll +++ b/llvm/test/CodeGen/X86/mmx-schedule.ll @@ -566,7 +566,7 @@ define void @test_emms() optsize { ; ; BTVER2-LABEL: test_emms: ; BTVER2: # %bb.0: -; BTVER2-NEXT: emms # sched: [100:0.17] +; BTVER2-NEXT: emms # sched: [100:0.50] ; BTVER2-NEXT: retq # sched: [4:1.00] ; ; ZNVER1-LABEL: test_emms: diff --git a/llvm/test/CodeGen/X86/schedule-x86_32.ll b/llvm/test/CodeGen/X86/schedule-x86_32.ll index 19c4041..061e233 100644 --- a/llvm/test/CodeGen/X86/schedule-x86_32.ll +++ b/llvm/test/CodeGen/X86/schedule-x86_32.ll @@ -80,7 +80,7 @@ define i8 @test_aaa(i8 %a0) optsize { ; BTVER2: # %bb.0: ; BTVER2-NEXT: movb {{[0-9]+}}(%esp), %al # sched: [5:1.00] ; BTVER2-NEXT: #APP -; BTVER2-NEXT: aaa # sched: [100:0.17] +; BTVER2-NEXT: aaa # sched: [100:0.50] ; BTVER2-NEXT: #NO_APP ; BTVER2-NEXT: retl # sched: [4:1.00] ; @@ -164,7 +164,7 @@ define i8 @test_aad(i16 %a0) optsize { ; BTVER2: # %bb.0: ; BTVER2-NEXT: movzwl {{[0-9]+}}(%esp), %eax # sched: [4:1.00] ; BTVER2-NEXT: #APP -; BTVER2-NEXT: aad # sched: [100:0.17] +; BTVER2-NEXT: aad # sched: [100:0.50] ; BTVER2-NEXT: #NO_APP ; BTVER2-NEXT: retl # sched: [4:1.00] ; @@ -248,7 +248,7 @@ define i16 @test_aam(i8 %a0) optsize { ; BTVER2: # %bb.0: ; BTVER2-NEXT: movb {{[0-9]+}}(%esp), %al # sched: [5:1.00] ; BTVER2-NEXT: #APP -; BTVER2-NEXT: aam # sched: [100:0.17] +; BTVER2-NEXT: aam # sched: [100:0.50] ; BTVER2-NEXT: #NO_APP ; BTVER2-NEXT: retl # sched: [4:1.00] ; @@ -332,7 +332,7 @@ define i8 @test_aas(i8 %a0) optsize { ; BTVER2: # %bb.0: ; BTVER2-NEXT: movb {{[0-9]+}}(%esp), %al # sched: [5:1.00] ; BTVER2-NEXT: #APP -; BTVER2-NEXT: aas # sched: [100:0.17] +; BTVER2-NEXT: aas # sched: [100:0.50] ; BTVER2-NEXT: #NO_APP ; BTVER2-NEXT: retl # sched: [4:1.00] ; @@ -425,7 +425,7 @@ define void @test_arpl(i16 %a0, i16 *%a1) optsize { ; BTVER2-NEXT: movzwl {{[0-9]+}}(%esp), %eax # sched: [4:1.00] ; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:1.00] ; BTVER2-NEXT: #APP -; BTVER2-NEXT: arpl %ax, (%ecx) # sched: [100:0.17] +; BTVER2-NEXT: arpl %ax, (%ecx) # sched: [100:0.50] ; BTVER2-NEXT: #NO_APP ; BTVER2-NEXT: retl # sched: [4:1.00] ; @@ -580,8 +580,8 @@ define void @test_bound(i16 %a0, i16 *%a1, i32 %a2, i32 *%a3) optsize { ; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %edx # sched: [5:1.00] ; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %esi # sched: [5:1.00] ; BTVER2-NEXT: #APP -; BTVER2-NEXT: bound %ax, (%esi) # sched: [100:0.17] -; BTVER2-NEXT: bound %ecx, (%edx) # sched: [100:0.17] +; BTVER2-NEXT: bound %ax, (%esi) # sched: [100:0.50] +; BTVER2-NEXT: bound %ecx, (%edx) # sched: [100:0.50] ; BTVER2-NEXT: #NO_APP ; BTVER2-NEXT: popl %esi # sched: [5:1.00] ; BTVER2-NEXT: retl # sched: [4:1.00] @@ -674,7 +674,7 @@ define i8 @test_daa(i8 %a0) optsize { ; BTVER2: # %bb.0: ; BTVER2-NEXT: movb {{[0-9]+}}(%esp), %al # sched: [5:1.00] ; BTVER2-NEXT: #APP -; BTVER2-NEXT: daa # sched: [100:0.17] +; BTVER2-NEXT: daa # sched: [100:0.50] ; BTVER2-NEXT: #NO_APP ; BTVER2-NEXT: retl # sched: [4:1.00] ; @@ -758,7 +758,7 @@ define i8 @test_das(i8 %a0) optsize { ; BTVER2: # %bb.0: ; BTVER2-NEXT: movb {{[0-9]+}}(%esp), %al # sched: [5:1.00] ; BTVER2-NEXT: #APP -; BTVER2-NEXT: das # sched: [100:0.17] +; BTVER2-NEXT: das # sched: [100:0.50] ; BTVER2-NEXT: #NO_APP ; BTVER2-NEXT: retl # sched: [4:1.00] ; @@ -1247,7 +1247,7 @@ define void @test_into() optsize { ; BTVER2-LABEL: test_into: ; BTVER2: # %bb.0: ; BTVER2-NEXT: #APP -; BTVER2-NEXT: into # sched: [100:0.17] +; BTVER2-NEXT: into # sched: [100:0.50] ; BTVER2-NEXT: #NO_APP ; BTVER2-NEXT: retl # sched: [4:1.00] ; @@ -1569,17 +1569,17 @@ define void @test_pop_push() optsize { ; BTVER2-LABEL: test_pop_push: ; BTVER2: # %bb.0: ; BTVER2-NEXT: #APP -; BTVER2-NEXT: popl %ds # sched: [100:0.17] -; BTVER2-NEXT: popl %es # sched: [100:0.17] -; BTVER2-NEXT: popl %ss # sched: [100:0.17] -; BTVER2-NEXT: popl %fs # sched: [100:0.17] -; BTVER2-NEXT: popl %gs # sched: [100:0.17] -; BTVER2-NEXT: pushl %cs # sched: [100:0.17] -; BTVER2-NEXT: pushl %ds # sched: [100:0.17] -; BTVER2-NEXT: pushl %es # sched: [100:0.17] -; BTVER2-NEXT: pushl %ss # sched: [100:0.17] -; BTVER2-NEXT: pushl %fs # sched: [100:0.17] -; BTVER2-NEXT: pushl %gs # sched: [100:0.17] +; BTVER2-NEXT: popl %ds # sched: [100:0.50] +; BTVER2-NEXT: popl %es # sched: [100:0.50] +; BTVER2-NEXT: popl %ss # sched: [100:0.50] +; BTVER2-NEXT: popl %fs # sched: [100:0.50] +; BTVER2-NEXT: popl %gs # sched: [100:0.50] +; BTVER2-NEXT: pushl %cs # sched: [100:0.50] +; BTVER2-NEXT: pushl %ds # sched: [100:0.50] +; BTVER2-NEXT: pushl %es # sched: [100:0.50] +; BTVER2-NEXT: pushl %ss # sched: [100:0.50] +; BTVER2-NEXT: pushl %fs # sched: [100:0.50] +; BTVER2-NEXT: pushl %gs # sched: [100:0.50] ; BTVER2-NEXT: #NO_APP ; BTVER2-NEXT: retl # sched: [4:1.00] ; diff --git a/llvm/test/CodeGen/X86/schedule-x86_64.ll b/llvm/test/CodeGen/X86/schedule-x86_64.ll index 8511d09..17cb286 100644 --- a/llvm/test/CodeGen/X86/schedule-x86_64.ll +++ b/llvm/test/CodeGen/X86/schedule-x86_64.ll @@ -4282,10 +4282,10 @@ define void @test_cmps() optsize { ; BTVER2-LABEL: test_cmps: ; BTVER2: # %bb.0: ; BTVER2-NEXT: #APP -; BTVER2-NEXT: cmpsb %es:(%rdi), (%rsi) # sched: [100:0.17] -; BTVER2-NEXT: cmpsw %es:(%rdi), (%rsi) # sched: [100:0.17] -; BTVER2-NEXT: cmpsl %es:(%rdi), (%rsi) # sched: [100:0.17] -; BTVER2-NEXT: cmpsq %es:(%rdi), (%rsi) # sched: [100:0.17] +; BTVER2-NEXT: cmpsb %es:(%rdi), (%rsi) # sched: [100:0.50] +; BTVER2-NEXT: cmpsw %es:(%rdi), (%rsi) # sched: [100:0.50] +; BTVER2-NEXT: cmpsl %es:(%rdi), (%rsi) # sched: [100:0.50] +; BTVER2-NEXT: cmpsq %es:(%rdi), (%rsi) # sched: [100:0.50] ; BTVER2-NEXT: #NO_APP ; BTVER2-NEXT: retq # sched: [4:1.00] ; @@ -4778,7 +4778,7 @@ define void @test_cpuid() optsize { ; BTVER2-LABEL: test_cpuid: ; BTVER2: # %bb.0: ; BTVER2-NEXT: #APP -; BTVER2-NEXT: cpuid # sched: [100:0.17] +; BTVER2-NEXT: cpuid # sched: [100:0.50] ; BTVER2-NEXT: #NO_APP ; BTVER2-NEXT: retq # sched: [4:1.00] ; @@ -5358,7 +5358,7 @@ define void @test_enter() optsize { ; BTVER2: # %bb.0: ; BTVER2-NEXT: #APP ; BTVER2-NEXT: enter $7, $4095 # imm = 0xFFF -; BTVER2-NEXT: # sched: [100:0.17] +; BTVER2-NEXT: # sched: [100:0.50] ; BTVER2-NEXT: #NO_APP ; BTVER2-NEXT: retq # sched: [4:1.00] ; @@ -6210,12 +6210,12 @@ define void @test_in() optsize { ; BTVER2-LABEL: test_in: ; BTVER2: # %bb.0: ; BTVER2-NEXT: #APP -; BTVER2-NEXT: inb $7, %al # sched: [100:0.17] -; BTVER2-NEXT: inw $7, %ax # sched: [100:0.17] -; BTVER2-NEXT: inl $7, %eax # sched: [100:0.17] -; BTVER2-NEXT: inb %dx, %al # sched: [100:0.17] -; BTVER2-NEXT: inw %dx, %ax # sched: [100:0.17] -; BTVER2-NEXT: inl %dx, %eax # sched: [100:0.17] +; BTVER2-NEXT: inb $7, %al # sched: [100:0.50] +; BTVER2-NEXT: inw $7, %ax # sched: [100:0.50] +; BTVER2-NEXT: inl $7, %eax # sched: [100:0.50] +; BTVER2-NEXT: inb %dx, %al # sched: [100:0.50] +; BTVER2-NEXT: inw %dx, %ax # sched: [100:0.50] +; BTVER2-NEXT: inl %dx, %eax # sched: [100:0.50] ; BTVER2-NEXT: #NO_APP ; BTVER2-NEXT: retq # sched: [4:1.00] ; @@ -6643,9 +6643,9 @@ define void @test_ins() optsize { ; BTVER2-LABEL: test_ins: ; BTVER2: # %bb.0: ; BTVER2-NEXT: #APP -; BTVER2-NEXT: insb %dx, %es:(%rdi) # sched: [100:0.17] -; BTVER2-NEXT: insw %dx, %es:(%rdi) # sched: [100:0.17] -; BTVER2-NEXT: insl %dx, %es:(%rdi) # sched: [100:0.17] +; BTVER2-NEXT: insb %dx, %es:(%rdi) # sched: [100:0.50] +; BTVER2-NEXT: insw %dx, %es:(%rdi) # sched: [100:0.50] +; BTVER2-NEXT: insl %dx, %es:(%rdi) # sched: [100:0.50] ; BTVER2-NEXT: #NO_APP ; BTVER2-NEXT: retq # sched: [4:1.00] ; @@ -6721,7 +6721,7 @@ define void @test_int() optsize { ; BTVER2-LABEL: test_int: ; BTVER2: # %bb.0: ; BTVER2-NEXT: #APP -; BTVER2-NEXT: int $7 # sched: [100:0.17] +; BTVER2-NEXT: int $7 # sched: [100:0.50] ; BTVER2-NEXT: #NO_APP ; BTVER2-NEXT: retq # sched: [4:1.00] ; @@ -6803,8 +6803,8 @@ define void @test_invlpg_invlpga(i8 *%a0) optsize { ; BTVER2-LABEL: test_invlpg_invlpga: ; BTVER2: # %bb.0: ; BTVER2-NEXT: #APP -; BTVER2-NEXT: invlpg (%rdi) # sched: [100:0.17] -; BTVER2-NEXT: invlpga %rax, %ecx # sched: [100:0.17] +; BTVER2-NEXT: invlpg (%rdi) # sched: [100:0.50] +; BTVER2-NEXT: invlpga %rax, %ecx # sched: [100:0.50] ; BTVER2-NEXT: #NO_APP ; BTVER2-NEXT: retq # sched: [4:1.00] ; @@ -7539,10 +7539,10 @@ define void @test_lods() optsize { ; BTVER2-LABEL: test_lods: ; BTVER2: # %bb.0: ; BTVER2-NEXT: #APP -; BTVER2-NEXT: lodsb (%rsi), %al # sched: [100:0.17] -; BTVER2-NEXT: lodsw (%rsi), %ax # sched: [100:0.17] -; BTVER2-NEXT: lodsl (%rsi), %eax # sched: [100:0.17] -; BTVER2-NEXT: lodsq (%rsi), %rax # sched: [100:0.17] +; BTVER2-NEXT: lodsb (%rsi), %al # sched: [100:0.50] +; BTVER2-NEXT: lodsw (%rsi), %ax # sched: [100:0.50] +; BTVER2-NEXT: lodsl (%rsi), %eax # sched: [100:0.50] +; BTVER2-NEXT: lodsq (%rsi), %rax # sched: [100:0.50] ; BTVER2-NEXT: #NO_APP ; BTVER2-NEXT: retq # sched: [4:1.00] ; @@ -7833,10 +7833,10 @@ define void @test_movs() optsize { ; BTVER2-LABEL: test_movs: ; BTVER2: # %bb.0: ; BTVER2-NEXT: #APP -; BTVER2-NEXT: movsb (%rsi), %es:(%rdi) # sched: [100:0.17] -; BTVER2-NEXT: movsw (%rsi), %es:(%rdi) # sched: [100:0.17] -; BTVER2-NEXT: movsl (%rsi), %es:(%rdi) # sched: [100:0.17] -; BTVER2-NEXT: movsq (%rsi), %es:(%rdi) # sched: [100:0.17] +; BTVER2-NEXT: movsb (%rsi), %es:(%rdi) # sched: [100:0.50] +; BTVER2-NEXT: movsw (%rsi), %es:(%rdi) # sched: [100:0.50] +; BTVER2-NEXT: movsl (%rsi), %es:(%rdi) # sched: [100:0.50] +; BTVER2-NEXT: movsq (%rsi), %es:(%rdi) # sched: [100:0.50] ; BTVER2-NEXT: #NO_APP ; BTVER2-NEXT: retq # sched: [4:1.00] ; @@ -9322,12 +9322,12 @@ define void @test_out() optsize { ; BTVER2-LABEL: test_out: ; BTVER2: # %bb.0: ; BTVER2-NEXT: #APP -; BTVER2-NEXT: outb %al, $7 # sched: [100:0.17] -; BTVER2-NEXT: outw %ax, $7 # sched: [100:0.17] -; BTVER2-NEXT: outl %eax, $7 # sched: [100:0.17] -; BTVER2-NEXT: outb %al, %dx # sched: [100:0.17] -; BTVER2-NEXT: outw %ax, %dx # sched: [100:0.17] -; BTVER2-NEXT: outl %eax, %dx # sched: [100:0.17] +; BTVER2-NEXT: outb %al, $7 # sched: [100:0.50] +; BTVER2-NEXT: outw %ax, $7 # sched: [100:0.50] +; BTVER2-NEXT: outl %eax, $7 # sched: [100:0.50] +; BTVER2-NEXT: outb %al, %dx # sched: [100:0.50] +; BTVER2-NEXT: outw %ax, %dx # sched: [100:0.50] +; BTVER2-NEXT: outl %eax, %dx # sched: [100:0.50] ; BTVER2-NEXT: #NO_APP ; BTVER2-NEXT: retq # sched: [4:1.00] ; @@ -9422,9 +9422,9 @@ define void @test_outs() optsize { ; BTVER2-LABEL: test_outs: ; BTVER2: # %bb.0: ; BTVER2-NEXT: #APP -; BTVER2-NEXT: outsb (%rsi), %dx # sched: [100:0.17] -; BTVER2-NEXT: outsw (%rsi), %dx # sched: [100:0.17] -; BTVER2-NEXT: outsl (%rsi), %dx # sched: [100:0.17] +; BTVER2-NEXT: outsb (%rsi), %dx # sched: [100:0.50] +; BTVER2-NEXT: outsw (%rsi), %dx # sched: [100:0.50] +; BTVER2-NEXT: outsl (%rsi), %dx # sched: [100:0.50] ; BTVER2-NEXT: #NO_APP ; BTVER2-NEXT: retq # sched: [4:1.00] ; @@ -9598,10 +9598,10 @@ define void @test_pop_push() optsize { ; BTVER2-LABEL: test_pop_push: ; BTVER2: # %bb.0: ; BTVER2-NEXT: #APP -; BTVER2-NEXT: popq %fs # sched: [100:0.17] -; BTVER2-NEXT: popq %gs # sched: [100:0.17] -; BTVER2-NEXT: pushq %fs # sched: [100:0.17] -; BTVER2-NEXT: pushq %gs # sched: [100:0.17] +; BTVER2-NEXT: popq %fs # sched: [100:0.50] +; BTVER2-NEXT: popq %gs # sched: [100:0.50] +; BTVER2-NEXT: pushq %fs # sched: [100:0.50] +; BTVER2-NEXT: pushq %gs # sched: [100:0.50] ; BTVER2-NEXT: #NO_APP ; BTVER2-NEXT: retq # sched: [4:1.00] ; @@ -10769,8 +10769,8 @@ define void @test_rdmsr_wrmsr() optsize { ; BTVER2-LABEL: test_rdmsr_wrmsr: ; BTVER2: # %bb.0: ; BTVER2-NEXT: #APP -; BTVER2-NEXT: rdmsr # sched: [100:0.17] -; BTVER2-NEXT: wrmsr # sched: [100:0.17] +; BTVER2-NEXT: rdmsr # sched: [100:0.50] +; BTVER2-NEXT: wrmsr # sched: [100:0.50] ; BTVER2-NEXT: #NO_APP ; BTVER2-NEXT: retq # sched: [4:1.00] ; @@ -10845,7 +10845,7 @@ define void @test_rdpmc() optsize { ; BTVER2-LABEL: test_rdpmc: ; BTVER2: # %bb.0: ; BTVER2-NEXT: #APP -; BTVER2-NEXT: rdpmc # sched: [100:0.17] +; BTVER2-NEXT: rdpmc # sched: [100:0.50] ; BTVER2-NEXT: #NO_APP ; BTVER2-NEXT: retq # sched: [4:1.00] ; @@ -10927,8 +10927,8 @@ define void @test_rdtsc_rdtscp() optsize { ; BTVER2-LABEL: test_rdtsc_rdtscp: ; BTVER2: # %bb.0: ; BTVER2-NEXT: #APP -; BTVER2-NEXT: rdtsc # sched: [100:0.17] -; BTVER2-NEXT: rdtscp # sched: [100:0.17] +; BTVER2-NEXT: rdtsc # sched: [100:0.50] +; BTVER2-NEXT: rdtscp # sched: [100:0.50] ; BTVER2-NEXT: #NO_APP ; BTVER2-NEXT: retq # sched: [4:1.00] ; @@ -13500,10 +13500,10 @@ define void @test_scas() optsize { ; BTVER2-LABEL: test_scas: ; BTVER2: # %bb.0: ; BTVER2-NEXT: #APP -; BTVER2-NEXT: scasb %es:(%rdi), %al # sched: [100:0.17] -; BTVER2-NEXT: scasw %es:(%rdi), %ax # sched: [100:0.17] -; BTVER2-NEXT: scasl %es:(%rdi), %eax # sched: [100:0.17] -; BTVER2-NEXT: scasq %es:(%rdi), %rax # sched: [100:0.17] +; BTVER2-NEXT: scasb %es:(%rdi), %al # sched: [100:0.50] +; BTVER2-NEXT: scasw %es:(%rdi), %ax # sched: [100:0.50] +; BTVER2-NEXT: scasl %es:(%rdi), %eax # sched: [100:0.50] +; BTVER2-NEXT: scasq %es:(%rdi), %rax # sched: [100:0.50] ; BTVER2-NEXT: #NO_APP ; BTVER2-NEXT: retq # sched: [4:1.00] ; @@ -14502,10 +14502,10 @@ define void @test_stos() optsize { ; BTVER2-LABEL: test_stos: ; BTVER2: # %bb.0: ; BTVER2-NEXT: #APP -; BTVER2-NEXT: stosb %al, %es:(%rdi) # sched: [100:0.17] -; BTVER2-NEXT: stosw %ax, %es:(%rdi) # sched: [100:0.17] -; BTVER2-NEXT: stosl %eax, %es:(%rdi) # sched: [100:0.17] -; BTVER2-NEXT: stosq %rax, %es:(%rdi) # sched: [100:0.17] +; BTVER2-NEXT: stosb %al, %es:(%rdi) # sched: [100:0.50] +; BTVER2-NEXT: stosw %ax, %es:(%rdi) # sched: [100:0.50] +; BTVER2-NEXT: stosl %eax, %es:(%rdi) # sched: [100:0.50] +; BTVER2-NEXT: stosq %rax, %es:(%rdi) # sched: [100:0.50] ; BTVER2-NEXT: #NO_APP ; BTVER2-NEXT: retq # sched: [4:1.00] ; @@ -15769,7 +15769,7 @@ define void @test_ud2() optsize { ; BTVER2-LABEL: test_ud2: ; BTVER2: # %bb.0: ; BTVER2-NEXT: #APP -; BTVER2-NEXT: ud2 # sched: [100:0.17] +; BTVER2-NEXT: ud2 # sched: [100:0.50] ; BTVER2-NEXT: #NO_APP ; BTVER2-NEXT: retq # sched: [4:1.00] ; diff --git a/llvm/test/CodeGen/X86/sse3-schedule.ll b/llvm/test/CodeGen/X86/sse3-schedule.ll index 1b1e765..dc23cc6 100644 --- a/llvm/test/CodeGen/X86/sse3-schedule.ll +++ b/llvm/test/CodeGen/X86/sse3-schedule.ll @@ -531,7 +531,7 @@ define void @test_monitor(i8* %a0, i32 %a1, i32 %a2) { ; BTVER2: # %bb.0: ; BTVER2-NEXT: leaq (%rdi), %rax # sched: [1:0.50] ; BTVER2-NEXT: movl %esi, %ecx # sched: [1:0.50] -; BTVER2-NEXT: monitor # sched: [100:0.17] +; BTVER2-NEXT: monitor # sched: [100:0.50] ; BTVER2-NEXT: retq # sched: [4:1.00] ; ; ZNVER1-LABEL: test_monitor: @@ -843,7 +843,7 @@ define void @test_mwait(i32 %a0, i32 %a1) { ; BTVER2: # %bb.0: ; BTVER2-NEXT: movl %edi, %ecx # sched: [1:0.50] ; BTVER2-NEXT: movl %esi, %eax # sched: [1:0.50] -; BTVER2-NEXT: mwait # sched: [100:0.17] +; BTVER2-NEXT: mwait # sched: [100:0.50] ; BTVER2-NEXT: retq # sched: [4:1.00] ; ; ZNVER1-LABEL: test_mwait: diff --git a/llvm/test/CodeGen/X86/x87-schedule.ll b/llvm/test/CodeGen/X86/x87-schedule.ll index b8c319c..53e3663 100644 --- a/llvm/test/CodeGen/X86/x87-schedule.ll +++ b/llvm/test/CodeGen/X86/x87-schedule.ll @@ -71,7 +71,7 @@ define void @test_f2xm1() optsize { ; BTVER2-LABEL: test_f2xm1: ; BTVER2: # %bb.0: ; BTVER2-NEXT: #APP -; BTVER2-NEXT: f2xm1 # sched: [100:0.17] +; BTVER2-NEXT: f2xm1 # sched: [100:0.50] ; BTVER2-NEXT: #NO_APP ; BTVER2-NEXT: retl # sched: [4:1.00] ; @@ -484,8 +484,8 @@ define void @test_fbld_fbstp(i8* %a0) optsize { ; BTVER2: # %bb.0: ; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:1.00] ; BTVER2-NEXT: #APP -; BTVER2-NEXT: fbld (%eax) # sched: [100:0.17] -; BTVER2-NEXT: fbstp (%eax) # sched: [100:0.17] +; BTVER2-NEXT: fbld (%eax) # sched: [100:0.50] +; BTVER2-NEXT: fbstp (%eax) # sched: [100:0.50] ; BTVER2-NEXT: #NO_APP ; BTVER2-NEXT: retl # sched: [4:1.00] ; @@ -643,8 +643,8 @@ define void @test_fclex() optsize { ; BTVER2-LABEL: test_fclex: ; BTVER2: # %bb.0: ; BTVER2-NEXT: #APP -; BTVER2-NEXT: wait # sched: [100:0.17] -; BTVER2-NEXT: fnclex # sched: [100:0.17] +; BTVER2-NEXT: wait # sched: [100:0.50] +; BTVER2-NEXT: fnclex # sched: [100:0.50] ; BTVER2-NEXT: #NO_APP ; BTVER2-NEXT: retl # sched: [4:1.00] ; @@ -719,7 +719,7 @@ define void @test_fnclex() optsize { ; BTVER2-LABEL: test_fnclex: ; BTVER2: # %bb.0: ; BTVER2-NEXT: #APP -; BTVER2-NEXT: fnclex # sched: [100:0.17] +; BTVER2-NEXT: fnclex # sched: [100:0.50] ; BTVER2-NEXT: #NO_APP ; BTVER2-NEXT: retl # sched: [4:1.00] ; @@ -1115,7 +1115,7 @@ define void @test_fcomp_fcompp(float *%a0, double *%a1) optsize { ; BTVER2-NEXT: fcomp %st(3) # sched: [3:1.00] ; BTVER2-NEXT: fcomps (%ecx) # sched: [8:1.00] ; BTVER2-NEXT: fcompl (%eax) # sched: [8:1.00] -; BTVER2-NEXT: fcompp # sched: [100:0.17] +; BTVER2-NEXT: fcompp # sched: [100:0.50] ; BTVER2-NEXT: #NO_APP ; BTVER2-NEXT: retl # sched: [4:1.00] ; @@ -1279,7 +1279,7 @@ define void @test_fcos() optsize { ; BTVER2-LABEL: test_fcos: ; BTVER2: # %bb.0: ; BTVER2-NEXT: #APP -; BTVER2-NEXT: fcos # sched: [100:0.17] +; BTVER2-NEXT: fcos # sched: [100:0.50] ; BTVER2-NEXT: #NO_APP ; BTVER2-NEXT: retl # sched: [4:1.00] ; @@ -1353,7 +1353,7 @@ define void @test_fdecstp() optsize { ; BTVER2-LABEL: test_fdecstp: ; BTVER2: # %bb.0: ; BTVER2-NEXT: #APP -; BTVER2-NEXT: fdecstp # sched: [100:0.17] +; BTVER2-NEXT: fdecstp # sched: [100:0.50] ; BTVER2-NEXT: #NO_APP ; BTVER2-NEXT: retl # sched: [4:1.00] ; @@ -1923,7 +1923,7 @@ define void @test_ffree() optsize { ; BTVER2-LABEL: test_ffree: ; BTVER2: # %bb.0: ; BTVER2-NEXT: #APP -; BTVER2-NEXT: ffree %st(0) # sched: [100:0.17] +; BTVER2-NEXT: ffree %st(0) # sched: [100:0.50] ; BTVER2-NEXT: #NO_APP ; BTVER2-NEXT: retl # sched: [4:1.00] ; @@ -2245,7 +2245,7 @@ define void @test_fincstp() optsize { ; BTVER2-LABEL: test_fincstp: ; BTVER2: # %bb.0: ; BTVER2-NEXT: #APP -; BTVER2-NEXT: fincstp # sched: [100:0.17] +; BTVER2-NEXT: fincstp # sched: [100:0.50] ; BTVER2-NEXT: #NO_APP ; BTVER2-NEXT: retl # sched: [4:1.00] ; @@ -2327,8 +2327,8 @@ define void @test_finit() optsize { ; BTVER2-LABEL: test_finit: ; BTVER2: # %bb.0: ; BTVER2-NEXT: #APP -; BTVER2-NEXT: wait # sched: [100:0.17] -; BTVER2-NEXT: fninit # sched: [100:0.17] +; BTVER2-NEXT: wait # sched: [100:0.50] +; BTVER2-NEXT: fninit # sched: [100:0.50] ; BTVER2-NEXT: #NO_APP ; BTVER2-NEXT: retl # sched: [4:1.00] ; @@ -2403,7 +2403,7 @@ define void @test_fninit() optsize { ; BTVER2-LABEL: test_fninit: ; BTVER2: # %bb.0: ; BTVER2-NEXT: #APP -; BTVER2-NEXT: fninit # sched: [100:0.17] +; BTVER2-NEXT: fninit # sched: [100:0.50] ; BTVER2-NEXT: #NO_APP ; BTVER2-NEXT: retl # sched: [4:1.00] ; @@ -2803,7 +2803,7 @@ define void @test_fldcw_fldenv(i8* %a0) optsize { ; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:1.00] ; BTVER2-NEXT: #APP ; BTVER2-NEXT: fldcw (%eax) # sched: [5:1.00] -; BTVER2-NEXT: fldenv (%eax) # sched: [100:0.17] +; BTVER2-NEXT: fldenv (%eax) # sched: [100:0.50] ; BTVER2-NEXT: #NO_APP ; BTVER2-NEXT: retl # sched: [4:1.00] ; @@ -2920,10 +2920,10 @@ define void @test_fld1_fldl2e_fldl2t_fldlg2_fldln2_fldpi_fldz() optsize { ; BTVER2: # %bb.0: ; BTVER2-NEXT: #APP ; BTVER2-NEXT: fld1 # sched: [1:?] -; BTVER2-NEXT: fldl2e # sched: [100:0.17] -; BTVER2-NEXT: fldl2t # sched: [100:0.17] -; BTVER2-NEXT: fldln2 # sched: [100:0.17] -; BTVER2-NEXT: fldpi # sched: [100:0.17] +; BTVER2-NEXT: fldl2e # sched: [100:0.50] +; BTVER2-NEXT: fldl2t # sched: [100:0.50] +; BTVER2-NEXT: fldln2 # sched: [100:0.50] +; BTVER2-NEXT: fldpi # sched: [100:0.50] ; BTVER2-NEXT: fldz # sched: [1:?] ; BTVER2-NEXT: #NO_APP ; BTVER2-NEXT: retl # sched: [4:1.00] @@ -3251,7 +3251,7 @@ define void @test_fnop() optsize { ; BTVER2-LABEL: test_fnop: ; BTVER2: # %bb.0: ; BTVER2-NEXT: #APP -; BTVER2-NEXT: fnop # sched: [100:0.17] +; BTVER2-NEXT: fnop # sched: [100:0.50] ; BTVER2-NEXT: #NO_APP ; BTVER2-NEXT: retl # sched: [4:1.00] ; @@ -3325,7 +3325,7 @@ define void @test_fpatan() optsize { ; BTVER2-LABEL: test_fpatan: ; BTVER2: # %bb.0: ; BTVER2-NEXT: #APP -; BTVER2-NEXT: fpatan # sched: [100:0.17] +; BTVER2-NEXT: fpatan # sched: [100:0.50] ; BTVER2-NEXT: #NO_APP ; BTVER2-NEXT: retl # sched: [4:1.00] ; @@ -3407,8 +3407,8 @@ define void @test_fprem_fprem1() optsize { ; BTVER2-LABEL: test_fprem_fprem1: ; BTVER2: # %bb.0: ; BTVER2-NEXT: #APP -; BTVER2-NEXT: fprem # sched: [100:0.17] -; BTVER2-NEXT: fprem1 # sched: [100:0.17] +; BTVER2-NEXT: fprem # sched: [100:0.50] +; BTVER2-NEXT: fprem1 # sched: [100:0.50] ; BTVER2-NEXT: #NO_APP ; BTVER2-NEXT: retl # sched: [4:1.00] ; @@ -3483,7 +3483,7 @@ define void @test_fptan() optsize { ; BTVER2-LABEL: test_fptan: ; BTVER2: # %bb.0: ; BTVER2-NEXT: #APP -; BTVER2-NEXT: fptan # sched: [100:0.17] +; BTVER2-NEXT: fptan # sched: [100:0.50] ; BTVER2-NEXT: #NO_APP ; BTVER2-NEXT: retl # sched: [4:1.00] ; @@ -3557,7 +3557,7 @@ define void @test_frndint() optsize { ; BTVER2-LABEL: test_frndint: ; BTVER2: # %bb.0: ; BTVER2-NEXT: #APP -; BTVER2-NEXT: frndint # sched: [100:0.17] +; BTVER2-NEXT: frndint # sched: [100:0.50] ; BTVER2-NEXT: #NO_APP ; BTVER2-NEXT: retl # sched: [4:1.00] ; @@ -3640,7 +3640,7 @@ define void @test_frstor(i8* %a0) optsize { ; BTVER2: # %bb.0: ; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:1.00] ; BTVER2-NEXT: #APP -; BTVER2-NEXT: frstor (%eax) # sched: [100:0.17] +; BTVER2-NEXT: frstor (%eax) # sched: [100:0.50] ; BTVER2-NEXT: #NO_APP ; BTVER2-NEXT: retl # sched: [4:1.00] ; @@ -3732,8 +3732,8 @@ define void @test_fsave(i8* %a0) optsize { ; BTVER2: # %bb.0: ; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:1.00] ; BTVER2-NEXT: #APP -; BTVER2-NEXT: wait # sched: [100:0.17] -; BTVER2-NEXT: fnsave (%eax) # sched: [100:0.17] +; BTVER2-NEXT: wait # sched: [100:0.50] +; BTVER2-NEXT: fnsave (%eax) # sched: [100:0.50] ; BTVER2-NEXT: #NO_APP ; BTVER2-NEXT: retl # sched: [4:1.00] ; @@ -3818,7 +3818,7 @@ define void @test_fnsave(i8* %a0) optsize { ; BTVER2: # %bb.0: ; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:1.00] ; BTVER2-NEXT: #APP -; BTVER2-NEXT: fnsave (%eax) # sched: [100:0.17] +; BTVER2-NEXT: fnsave (%eax) # sched: [100:0.50] ; BTVER2-NEXT: #NO_APP ; BTVER2-NEXT: retl # sched: [4:1.00] ; @@ -3893,7 +3893,7 @@ define void @test_fscale() optsize { ; BTVER2-LABEL: test_fscale: ; BTVER2: # %bb.0: ; BTVER2-NEXT: #APP -; BTVER2-NEXT: fscale # sched: [100:0.17] +; BTVER2-NEXT: fscale # sched: [100:0.50] ; BTVER2-NEXT: #NO_APP ; BTVER2-NEXT: retl # sched: [4:1.00] ; @@ -3967,7 +3967,7 @@ define void @test_fsin() optsize { ; BTVER2-LABEL: test_fsin: ; BTVER2: # %bb.0: ; BTVER2-NEXT: #APP -; BTVER2-NEXT: fsin # sched: [100:0.17] +; BTVER2-NEXT: fsin # sched: [100:0.50] ; BTVER2-NEXT: #NO_APP ; BTVER2-NEXT: retl # sched: [4:1.00] ; @@ -4041,7 +4041,7 @@ define void @test_fsincos() optsize { ; BTVER2-LABEL: test_fsincos: ; BTVER2: # %bb.0: ; BTVER2-NEXT: #APP -; BTVER2-NEXT: fsincos # sched: [100:0.17] +; BTVER2-NEXT: fsincos # sched: [100:0.50] ; BTVER2-NEXT: #NO_APP ; BTVER2-NEXT: retl # sched: [4:1.00] ; @@ -4402,12 +4402,12 @@ define void @test_fstcw_fstenv_fstsw(i8* %a0) optsize { ; BTVER2: # %bb.0: ; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:1.00] ; BTVER2-NEXT: #APP -; BTVER2-NEXT: wait # sched: [100:0.17] +; BTVER2-NEXT: wait # sched: [100:0.50] ; BTVER2-NEXT: fnstcw (%eax) # sched: [1:0.50] -; BTVER2-NEXT: wait # sched: [100:0.17] -; BTVER2-NEXT: fnstenv (%eax) # sched: [100:0.17] -; BTVER2-NEXT: wait # sched: [100:0.17] -; BTVER2-NEXT: fnstsw (%eax) # sched: [100:0.17] +; BTVER2-NEXT: wait # sched: [100:0.50] +; BTVER2-NEXT: fnstenv (%eax) # sched: [100:0.50] +; BTVER2-NEXT: wait # sched: [100:0.50] +; BTVER2-NEXT: fnstsw (%eax) # sched: [100:0.50] ; BTVER2-NEXT: #NO_APP ; BTVER2-NEXT: retl # sched: [4:1.00] ; @@ -4513,8 +4513,8 @@ define void @test_fnstcw_fnstenv_fnstsw(i8* %a0) optsize { ; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:1.00] ; BTVER2-NEXT: #APP ; BTVER2-NEXT: fnstcw (%eax) # sched: [1:0.50] -; BTVER2-NEXT: fnstenv (%eax) # sched: [100:0.17] -; BTVER2-NEXT: fnstsw (%eax) # sched: [100:0.17] +; BTVER2-NEXT: fnstenv (%eax) # sched: [100:0.50] +; BTVER2-NEXT: fnstsw (%eax) # sched: [100:0.50] ; BTVER2-NEXT: #NO_APP ; BTVER2-NEXT: retl # sched: [4:1.00] ; @@ -5359,7 +5359,7 @@ define void @test_fwait() optsize { ; BTVER2-LABEL: test_fwait: ; BTVER2: # %bb.0: ; BTVER2-NEXT: #APP -; BTVER2-NEXT: wait # sched: [100:0.17] +; BTVER2-NEXT: wait # sched: [100:0.50] ; BTVER2-NEXT: #NO_APP ; BTVER2-NEXT: retl # sched: [4:1.00] ; @@ -5433,7 +5433,7 @@ define void @test_fxam() optsize { ; BTVER2-LABEL: test_fxam: ; BTVER2: # %bb.0: ; BTVER2-NEXT: #APP -; BTVER2-NEXT: fxam # sched: [100:0.17] +; BTVER2-NEXT: fxam # sched: [100:0.50] ; BTVER2-NEXT: #NO_APP ; BTVER2-NEXT: retl # sched: [4:1.00] ; @@ -5608,8 +5608,8 @@ define void @test_fxrstor_fxsave(i8* %a0) optsize { ; BTVER2: # %bb.0: ; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:1.00] ; BTVER2-NEXT: #APP -; BTVER2-NEXT: fxrstor (%eax) # sched: [100:0.17] -; BTVER2-NEXT: fxsave (%eax) # sched: [100:0.17] +; BTVER2-NEXT: fxrstor (%eax) # sched: [100:0.50] +; BTVER2-NEXT: fxsave (%eax) # sched: [100:0.50] ; BTVER2-NEXT: #NO_APP ; BTVER2-NEXT: retl # sched: [4:1.00] ; @@ -5685,7 +5685,7 @@ define void @test_fxtract() optsize { ; BTVER2-LABEL: test_fxtract: ; BTVER2: # %bb.0: ; BTVER2-NEXT: #APP -; BTVER2-NEXT: fxtract # sched: [100:0.17] +; BTVER2-NEXT: fxtract # sched: [100:0.50] ; BTVER2-NEXT: #NO_APP ; BTVER2-NEXT: retl # sched: [4:1.00] ; @@ -5759,7 +5759,7 @@ define void @test_fyl2x() optsize { ; BTVER2-LABEL: test_fyl2x: ; BTVER2: # %bb.0: ; BTVER2-NEXT: #APP -; BTVER2-NEXT: fyl2x # sched: [100:0.17] +; BTVER2-NEXT: fyl2x # sched: [100:0.50] ; BTVER2-NEXT: #NO_APP ; BTVER2-NEXT: retl # sched: [4:1.00] ; @@ -5833,7 +5833,7 @@ define void @test_fyl2xp1() optsize { ; BTVER2-LABEL: test_fyl2xp1: ; BTVER2: # %bb.0: ; BTVER2-NEXT: #APP -; BTVER2-NEXT: fyl2xp1 # sched: [100:0.17] +; BTVER2-NEXT: fyl2xp1 # sched: [100:0.50] ; BTVER2-NEXT: #NO_APP ; BTVER2-NEXT: retl # sched: [4:1.00] ; -- 2.7.4