From d16bd0a24563d5f3e64255885b7c70a6fba9e87a Mon Sep 17 00:00:00 2001 From: Hyeongseok Oh Date: Fri, 7 Apr 2017 10:33:54 +0900 Subject: [PATCH] Use _TARGET_ARMARCH_ Chagne _TARGET_ARM_ and _TARGET_ARM64_ to _TARGET_ARMARCH_ --- src/jit/gentree.cpp | 2 +- src/jit/lower.cpp | 2 +- src/jit/target.h | 1 - 3 files changed, 2 insertions(+), 3 deletions(-) diff --git a/src/jit/gentree.cpp b/src/jit/gentree.cpp index 1d125b4..54382d8 100644 --- a/src/jit/gentree.cpp +++ b/src/jit/gentree.cpp @@ -5524,7 +5524,7 @@ unsigned Compiler::gtSetEvalOrder(GenTree* tree) } #ifdef FEATURE_READYTORUN_COMPILER -#if defined(_TARGET_ARM64_) || defined(_TARGET_ARM_) +#if defined(_TARGET_ARMARCH_) if (tree->gtCall.IsR2RRelativeIndir()) { ftreg |= RBM_R2R_INDIRECT_PARAM; diff --git a/src/jit/lower.cpp b/src/jit/lower.cpp index 3235305..035f094 100644 --- a/src/jit/lower.cpp +++ b/src/jit/lower.cpp @@ -2542,7 +2542,7 @@ GenTree* Lowering::LowerDirectCall(GenTreeCall* call) GenTree* indir = Ind(cellAddr); #ifdef FEATURE_READYTORUN_COMPILER -#if defined(_TARGET_ARM64_) || defined(_TARGET_ARM_) +#if defined(_TARGET_ARMARCH_) // For arm64, we dispatch code same as VSD using X11 for indirection cell address, // which ZapIndirectHelperThunk expects. if (call->IsR2RRelativeIndir()) diff --git a/src/jit/target.h b/src/jit/target.h index 7221e26..c207256 100644 --- a/src/jit/target.h +++ b/src/jit/target.h @@ -1379,7 +1379,6 @@ typedef unsigned short regPairNoSmall; // arm: need 12 bits // R2R indirect call. Use the same registers as VSD #define REG_R2R_INDIRECT_PARAM REG_R4 #define RBM_R2R_INDIRECT_PARAM RBM_R4 - #define PREDICT_REG_RER_INDIRECT_PARAM PREDICT_REG_R4 // Registers used by PInvoke frame setup #define REG_PINVOKE_FRAME REG_R4 -- 2.7.4