From d04dceb5ff1668e6e4bb5177f9f619f5e5fffa82 Mon Sep 17 00:00:00 2001 From: Uros Bizjak Date: Mon, 1 Dec 2008 14:48:52 +0100 Subject: [PATCH] re PR middle-end/37908 (atomic NAND op generate wrong code; __sync_nand_and_fetch, __sync_fetch_and_nand) PR middle-end/37908 * config/alpha/alpha.c (alpha_split_atomic_op): Properly handle NAND case by calculating ~(new_reg & val) instead of (~new_reg & val). * config/alpha/sync.md (sync_nand): Change insn RTX to (not:I48MODE (and:I48MODE (...))). (sync_old_nand): Ditto. (sync_new_nand): Ditto. From-SVN: r142313 --- gcc/ChangeLog | 12 +++++++++++- gcc/config/alpha/alpha.c | 7 ++++++- gcc/config/alpha/sync.md | 18 ++++++++++-------- 3 files changed, 27 insertions(+), 10 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 1bc19eb..82da5df 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,13 @@ +2008-12-01 Uros Bizjak + + PR middle-end/37908 + * config/alpha/alpha.c (alpha_split_atomic_op): Properly handle NAND + case by calculating ~(new_reg & val) instead of (~new_reg & val). + * config/alpha/sync.md (sync_nand): Change insn RTX + to (not:I48MODE (and:I48MODE (...))). + (sync_old_nand): Ditto. + (sync_new_nand): Ditto. + 2008-12-01 Nick Clifton * config/stormy16/stormy16.md (CARRY_REG): New constant. @@ -365,7 +375,7 @@ 2008-11-21 Uros Bizjak PR middle-end/37908 - * config/ia64/ia64.c (ia64_expand_atomic_ope): Properly handle NAND + * config/ia64/ia64.c (ia64_expand_atomic_op): Properly handle NAND case by calculating ~(new_reg & val) instead of (~new_reg & val). * config/ia64/sync.md (sync_nand): Change insn RTX to (not:IMODE (and:IMODE (...))). diff --git a/gcc/config/alpha/alpha.c b/gcc/config/alpha/alpha.c index 3d546be..d119487 100644 --- a/gcc/config/alpha/alpha.c +++ b/gcc/config/alpha/alpha.c @@ -4466,7 +4466,12 @@ alpha_split_atomic_op (enum rtx_code code, rtx mem, rtx val, emit_load_locked (mode, before, mem); if (code == NOT) - x = gen_rtx_AND (mode, gen_rtx_NOT (mode, before), val); + { + x = gen_rtx_AND (mode, before, val); + emit_insn (gen_rtx_SET (VOIDmode, val, x)); + + x = gen_rtx_NOT (mode, val); + } else x = gen_rtx_fmt_ee (code, mode, before, val); if (after) diff --git a/gcc/config/alpha/sync.md b/gcc/config/alpha/sync.md index 5c0d284..fe8301f 100644 --- a/gcc/config/alpha/sync.md +++ b/gcc/config/alpha/sync.md @@ -89,8 +89,9 @@ (define_insn_and_split "sync_nand" [(set (match_operand:I48MODE 0 "memory_operand" "+m") (unspec:I48MODE - [(and:I48MODE (not:I48MODE (match_dup 0)) - (match_operand:I48MODE 1 "register_operand" "r"))] + [(not:I48MODE + (and:I48MODE (match_dup 0) + (match_operand:I48MODE 1 "register_operand" "r")))] UNSPEC_ATOMIC)) (clobber (match_scratch:I48MODE 2 "=&r"))] "" @@ -129,8 +130,9 @@ (match_operand:I48MODE 1 "memory_operand" "+m")) (set (match_dup 1) (unspec:I48MODE - [(and:I48MODE (not:I48MODE (match_dup 1)) - (match_operand:I48MODE 2 "register_operand" "r"))] + [(not:I48MODE + (and:I48MODE (match_dup 1) + (match_operand:I48MODE 2 "register_operand" "r")))] UNSPEC_ATOMIC)) (clobber (match_scratch:I48MODE 3 "=&r"))] "" @@ -167,12 +169,12 @@ (define_insn_and_split "sync_new_nand" [(set (match_operand:I48MODE 0 "register_operand" "=&r") - (and:I48MODE - (not:I48MODE (match_operand:I48MODE 1 "memory_operand" "+m")) - (match_operand:I48MODE 2 "register_operand" "r"))) + (not:I48MODE + (and:I48MODE (match_operand:I48MODE 1 "memory_operand" "+m") + (match_operand:I48MODE 2 "register_operand" "r")))) (set (match_dup 1) (unspec:I48MODE - [(and:I48MODE (not:I48MODE (match_dup 1)) (match_dup 2))] + [(not:I48MODE (and:I48MODE (match_dup 1) (match_dup 2)))] UNSPEC_ATOMIC)) (clobber (match_scratch:I48MODE 3 "=&r"))] "" -- 2.7.4