From d045815a5712afbeb8d2c76d8b624c91cfda777c Mon Sep 17 00:00:00 2001 From: Sergey Fedorov Date: Fri, 20 Dec 2013 10:33:11 +0400 Subject: [PATCH] target-arm: use c13_context field for CONTEXTIDR Use c13_context field instead of c13_fcse for CONTEXTIDR register definition. Signed-off-by: Sergey Fedorov Reviewed-by: Peter Crosthwaite Reviewed-by: Peter Maydell Message-id: 1387521191-15350-1-git-send-email-s.fedorov@samsung.com Signed-off-by: Peter Maydell --- target-arm/helper.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target-arm/helper.c b/target-arm/helper.c index 9afec28..be52c1f 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -397,7 +397,7 @@ static const ARMCPRegInfo cp_reginfo[] = { .access = PL1_RW, .fieldoffset = offsetof(CPUARMState, cp15.c13_fcse), .resetvalue = 0, .writefn = fcse_write, .raw_writefn = raw_write, }, { .name = "CONTEXTIDR", .cp = 15, .crn = 13, .crm = 0, .opc1 = 0, .opc2 = 1, - .access = PL1_RW, .fieldoffset = offsetof(CPUARMState, cp15.c13_fcse), + .access = PL1_RW, .fieldoffset = offsetof(CPUARMState, cp15.c13_context), .resetvalue = 0, .writefn = contextidr_write, .raw_writefn = raw_write, }, /* ??? This covers not just the impdef TLB lockdown registers but also * some v7VMSA registers relating to TEX remap, so it is overly broad. -- 2.7.4