From d0336b1e3f5d5cd211ce3f920554ee569b1db79a Mon Sep 17 00:00:00 2001
From: Sanjay Patel <spatel@rotateright.com>
Date: Fri, 3 May 2019 15:09:53 +0000
Subject: [PATCH] [x86] add tests for fneg with undefs; NFC

This was originally part of D61419.

llvm-svn: 359896
---
 llvm/test/CodeGen/X86/vec_fneg.ll | 68 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 68 insertions(+)

diff --git a/llvm/test/CodeGen/X86/vec_fneg.ll b/llvm/test/CodeGen/X86/vec_fneg.ll
index f0c9899..3b811d8 100644
--- a/llvm/test/CodeGen/X86/vec_fneg.ll
+++ b/llvm/test/CodeGen/X86/vec_fneg.ll
@@ -21,6 +21,74 @@ define <4 x float> @t1(<4 x float> %Q) nounwind {
   ret <4 x float> %tmp
 }
 
+; Possibly misplaced test, but since we're checking undef scenarios...
+
+define float @scalar_fsub_neg0_undef(float %x) nounwind {
+; X32-SSE1-LABEL: scalar_fsub_neg0_undef:
+; X32-SSE1:       # %bb.0:
+; X32-SSE1-NEXT:    pushl %eax
+; X32-SSE1-NEXT:    xorps {{\.LCPI.*}}, %xmm0
+; X32-SSE1-NEXT:    movss %xmm0, (%esp)
+; X32-SSE1-NEXT:    flds (%esp)
+; X32-SSE1-NEXT:    popl %eax
+; X32-SSE1-NEXT:    retl
+;
+; X32-SSE2-LABEL: scalar_fsub_neg0_undef:
+; X32-SSE2:       # %bb.0:
+; X32-SSE2-NEXT:    pushl %eax
+; X32-SSE2-NEXT:    movss %xmm0, (%esp)
+; X32-SSE2-NEXT:    flds (%esp)
+; X32-SSE2-NEXT:    popl %eax
+; X32-SSE2-NEXT:    retl
+;
+; X64-SSE1-LABEL: scalar_fsub_neg0_undef:
+; X64-SSE1:       # %bb.0:
+; X64-SSE1-NEXT:    xorps {{.*}}(%rip), %xmm0
+; X64-SSE1-NEXT:    retq
+;
+; X64-SSE2-LABEL: scalar_fsub_neg0_undef:
+; X64-SSE2:       # %bb.0:
+; X64-SSE2-NEXT:    retq
+  %r = fsub float -0.0, undef
+  ret float %r
+}
+
+define <4 x float> @fsub_neg0_undef(<4 x float> %Q) nounwind {
+; X32-SSE1-LABEL: fsub_neg0_undef:
+; X32-SSE1:       # %bb.0:
+; X32-SSE1-NEXT:    xorps {{\.LCPI.*}}, %xmm0
+; X32-SSE1-NEXT:    retl
+;
+; X32-SSE2-LABEL: fsub_neg0_undef:
+; X32-SSE2:       # %bb.0:
+; X32-SSE2-NEXT:    retl
+;
+; X64-SSE1-LABEL: fsub_neg0_undef:
+; X64-SSE1:       # %bb.0:
+; X64-SSE1-NEXT:    xorps {{.*}}(%rip), %xmm0
+; X64-SSE1-NEXT:    retq
+;
+; X64-SSE2-LABEL: fsub_neg0_undef:
+; X64-SSE2:       # %bb.0:
+; X64-SSE2-NEXT:    retq
+  %tmp = fsub <4 x float> < float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00 >, undef
+  ret <4 x float> %tmp
+}
+
+define <4 x float> @fsub_neg0_undef_elts_undef(<4 x float> %x) {
+; X32-SSE-LABEL: fsub_neg0_undef_elts_undef:
+; X32-SSE:       # %bb.0:
+; X32-SSE-NEXT:    movaps {{.*#+}} xmm0 = <NaN,u,u,NaN>
+; X32-SSE-NEXT:    retl
+;
+; X64-SSE-LABEL: fsub_neg0_undef_elts_undef:
+; X64-SSE:       # %bb.0:
+; X64-SSE-NEXT:    movaps {{.*#+}} xmm0 = <NaN,u,u,NaN>
+; X64-SSE-NEXT:    retq
+  %r = fsub <4 x float> <float -0.0, float undef, float undef, float -0.0>, undef
+  ret <4 x float> %r
+}
+
 ; This test verifies that we generate an FP subtraction because "0.0 - x" is not an fneg.
 define <4 x float> @t2(<4 x float> %Q) nounwind {
 ; X32-SSE-LABEL: t2:
-- 
2.7.4