From cfde0275e4afe7e48c4f4f9b97f1c85894e47d2f Mon Sep 17 00:00:00 2001 From: Alyssa Rosenzweig Date: Tue, 22 Mar 2022 22:30:11 -0400 Subject: [PATCH] pan/bi: Model Valhall-style A(CMP)XCHG Handled consistently with computational atomics. Signed-off-by: Alyssa Rosenzweig Part-of: --- src/panfrost/bifrost/ISA.xml | 2 ++ src/panfrost/bifrost/bir.c | 4 ++-- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/src/panfrost/bifrost/ISA.xml b/src/panfrost/bifrost/ISA.xml index d64b4c1..c4a8c94 100644 --- a/src/panfrost/bifrost/ISA.xml +++ b/src/panfrost/bifrost/ISA.xml @@ -8253,6 +8253,8 @@ aand aor axor + axchg + acmpxchg diff --git a/src/panfrost/bifrost/bir.c b/src/panfrost/bifrost/bir.c index 45b34ba..86e42fa 100644 --- a/src/panfrost/bifrost/bir.c +++ b/src/panfrost/bifrost/bir.c @@ -86,9 +86,9 @@ bi_count_staging_registers(const bi_instr *ins) unsigned bi_count_read_registers(const bi_instr *ins, unsigned s) { - /* ATOM reads 1 but writes 2 */ + /* ATOM reads 1 but writes 2. Exception for ACMPXCHG */ if (s == 0 && ins->op == BI_OPCODE_ATOM_RETURN_I32) - return 1; + return (ins->atom_opc == BI_ATOM_OPC_ACMPXCHG) ? 2 : 1; else if (s == 0 && bi_opcode_props[ins->op].sr_read) return bi_count_staging_registers(ins); else if (s == 4 && ins->op == BI_OPCODE_BLEND) -- 2.7.4