From cf0a9c20a41a9758389a8a4399b2578b06170aa3 Mon Sep 17 00:00:00 2001 From: Janis Johnson Date: Mon, 27 Jun 2011 18:38:00 +0000 Subject: [PATCH] target-supports.exp (add_options_for_arm_fp16): Renamed from add_options_for_arm_neon_fp16. * lib/target-supports.exp (add_options_for_arm_fp16): Renamed from add_options_for_arm_neon_fp16. (check_effective_target_arm_fp16_ok_nocache): Renamed from check_effective_target_arm_neon_fp16_ok_nocache. Check -mfpu and -mfloat-abi options from current multilib. Do not require neon support. (check_effective_target_arm_fp16_ok): Renamed from check_effecitve_target_arm_neon_fp16_ok. * g++.dg/ext/arm-fp16/arm-fp16-ops-5.C: Use new names for arm_neon_fp16_ok and arm_fp16. * g++.dg/ext/arm-fp16/arm-fp16-ops-6.C: Likewise. * gcc.dg/torture/arm-fp16-ops-5.c: Likewise. * gcc.dg/torture/arm-fp16-ops-6.c: Likewise. * gcc.target/arm/fp16-compile-vcvt.c: Likewise. From-SVN: r175545 --- gcc/testsuite/ChangeLog | 17 ++++++ gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-5.C | 4 +- gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-6.C | 4 +- gcc/testsuite/gcc.dg/torture/arm-fp16-ops-5.c | 4 +- gcc/testsuite/gcc.dg/torture/arm-fp16-ops-6.c | 4 +- gcc/testsuite/gcc.target/arm/fp16-compile-vcvt.c | 4 +- gcc/testsuite/lib/target-supports.exp | 66 ++++++++++++---------- 7 files changed, 64 insertions(+), 39 deletions(-) diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 97ad07a..d288bcb 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,20 @@ +2011-06-27 Janis Johnson + + * lib/target-supports.exp (add_options_for_arm_fp16): Renamed + from add_options_for_arm_neon_fp16. + (check_effective_target_arm_fp16_ok_nocache): Renamed from + check_effective_target_arm_neon_fp16_ok_nocache. + Check -mfpu and -mfloat-abi options from current multilib. + Do not require neon support. + (check_effective_target_arm_fp16_ok): Renamed from + check_effecitve_target_arm_neon_fp16_ok. + * g++.dg/ext/arm-fp16/arm-fp16-ops-5.C: Use new names for + arm_neon_fp16_ok and arm_fp16. + * g++.dg/ext/arm-fp16/arm-fp16-ops-6.C: Likewise. + * gcc.dg/torture/arm-fp16-ops-5.c: Likewise. + * gcc.dg/torture/arm-fp16-ops-6.c: Likewise. + * gcc.target/arm/fp16-compile-vcvt.c: Likewise. + 2011-06-27 Jakub Jelinek * gcc.dg/builtin-assume-aligned-1.c: New test. diff --git a/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-5.C b/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-5.C index b7cf529..92bc8a9 100644 --- a/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-5.C +++ b/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-5.C @@ -1,8 +1,8 @@ /* Test various operators on __fp16 and mixed __fp16/float operands. */ /* { dg-do compile { target arm*-*-* } } */ -/* { dg-require-effective-target arm_neon_fp16_ok } */ +/* { dg-require-effective-target arm_fp16_ok } */ /* { dg-options "-mfp16-format=ieee" } */ -/* { dg-add-options arm_neon_fp16 } */ +/* { dg-add-options arm_fp16 } */ #include "arm-fp16-ops.h" diff --git a/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-6.C b/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-6.C index d051fc7..ae40b1e 100644 --- a/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-6.C +++ b/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-6.C @@ -1,8 +1,8 @@ /* Test various operators on __fp16 and mixed __fp16/float operands. */ /* { dg-do compile { target arm*-*-* } } */ -/* { dg-require-effective-target arm_neon_fp16_ok } */ +/* { dg-require-effective-target arm_fp16_ok } */ /* { dg-options "-mfp16-format=ieee -ffast-math" } */ -/* { dg-add-options arm_neon_fp16 } */ +/* { dg-add-options arm_fp16 } */ #include "arm-fp16-ops.h" diff --git a/gcc/testsuite/gcc.dg/torture/arm-fp16-ops-5.c b/gcc/testsuite/gcc.dg/torture/arm-fp16-ops-5.c index b7cf529..92bc8a9 100644 --- a/gcc/testsuite/gcc.dg/torture/arm-fp16-ops-5.c +++ b/gcc/testsuite/gcc.dg/torture/arm-fp16-ops-5.c @@ -1,8 +1,8 @@ /* Test various operators on __fp16 and mixed __fp16/float operands. */ /* { dg-do compile { target arm*-*-* } } */ -/* { dg-require-effective-target arm_neon_fp16_ok } */ +/* { dg-require-effective-target arm_fp16_ok } */ /* { dg-options "-mfp16-format=ieee" } */ -/* { dg-add-options arm_neon_fp16 } */ +/* { dg-add-options arm_fp16 } */ #include "arm-fp16-ops.h" diff --git a/gcc/testsuite/gcc.dg/torture/arm-fp16-ops-6.c b/gcc/testsuite/gcc.dg/torture/arm-fp16-ops-6.c index d051fc7..ae40b1e 100644 --- a/gcc/testsuite/gcc.dg/torture/arm-fp16-ops-6.c +++ b/gcc/testsuite/gcc.dg/torture/arm-fp16-ops-6.c @@ -1,8 +1,8 @@ /* Test various operators on __fp16 and mixed __fp16/float operands. */ /* { dg-do compile { target arm*-*-* } } */ -/* { dg-require-effective-target arm_neon_fp16_ok } */ +/* { dg-require-effective-target arm_fp16_ok } */ /* { dg-options "-mfp16-format=ieee -ffast-math" } */ -/* { dg-add-options arm_neon_fp16 } */ +/* { dg-add-options arm_fp16 } */ #include "arm-fp16-ops.h" diff --git a/gcc/testsuite/gcc.target/arm/fp16-compile-vcvt.c b/gcc/testsuite/gcc.target/arm/fp16-compile-vcvt.c index 15614c5..e40e1a3 100644 --- a/gcc/testsuite/gcc.target/arm/fp16-compile-vcvt.c +++ b/gcc/testsuite/gcc.target/arm/fp16-compile-vcvt.c @@ -1,7 +1,7 @@ /* { dg-do compile } */ -/* { dg-require-effective-target arm_neon_fp16_ok } */ +/* { dg-require-effective-target arm_fp16_ok } */ /* { dg-options "-mfp16-format=ieee" } */ -/* { dg-add-options arm_neon_fp16 } */ +/* { dg-add-options arm_fp16 } */ /* Test generation of VFP __fp16 instructions. */ diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index c69847a..8a0e36f 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -1947,45 +1947,53 @@ proc check_effective_target_arm_neon_ok { } { # or -mfloat-abi=hard, but if one is already specified by the # multilib, use it. -proc add_options_for_arm_neon_fp16 { flags } { - if { ! [check_effective_target_arm_neon_fp16_ok] } { +proc add_options_for_arm_fp16 { flags } { + if { ! [check_effective_target_arm_fp16_ok] } { return "$flags" } - global et_arm_neon_fp16_flags - return "$flags $et_arm_neon_fp16_flags" + global et_arm_fp16_flags + return "$flags $et_arm_fp16_flags" } -# Return 1 if this is an ARM target supporting -mfpu=neon-fp16 -# -mfloat-abi=softfp or equivalent options. Skip multilibs that are -# incompatible with these options. Also set et_arm_neon_flags to the -# best options to add. +# Return 1 if this is an ARM target that can support a VFP fp16 variant. +# Skip multilibs that are incompatible with these options and set +# et_arm_fp16_flags to the best options to add. -proc check_effective_target_arm_neon_fp16_ok_nocache { } { - global et_arm_neon_fp16_flags - set et_arm_neon_fp16_flags "" - if { [check_effective_target_arm32] } { - if [check-flags [list "" { *-*-* } { "-mfpu=*" } { "-mfpu=neon-fp16*" } ]] { - return 0 - } - # Always add -mfpu=neon-fp16, since there is no preprocessor - # macro for FP16 support. - foreach flags {"-mfpu=neon-fp16" "-mfpu=neon-fp16 -mfloat-abi=softfp"} { - if { [check_no_compiler_messages_nocache arm_neon_fp16_ok object { - #include "arm_neon.h" - int dummy; - } "$flags"] } { - set et_arm_neon_fp16_flags $flags - return 1 - } - } +proc check_effective_target_arm_fp16_ok_nocache { } { + global et_arm_fp16_flags + set et_arm_fp16_flags "" + if { ! [check_effective_target_arm32] } { + return 0; + } + if [check-flags [list "" { *-*-* } { "-mfpu=*" } { "-mfpu=*fp16*" "-mfpu=*fpv[4-9]*" "-mfpu=*fpv[1-9][0-9]*" } ]] { + # Multilib flags would override -mfpu. + return 0 + } + if [check-flags [list "" { *-*-* } { "-mfloat-abi=soft" } { "" } ]] { + # Must generate floating-point instructions. + return 0 + } + if [check-flags [list "" { *-*-* } { "-mfpu=*" } { "" } ]] { + # The existing -mfpu value is OK; use it, but add softfp. + set et_arm_fp16_flags "-mfloat-abi=softfp" + return 1; + } + # Add -mfpu for a VFP fp16 variant since there is no preprocessor + # macro to check for this support. + set flags "-mfpu=vfpv4 -mfloat-abi=softfp" + if { [check_no_compiler_messages_nocache arm_fp16_ok assembly { + int dummy; + } "$flags"] } { + set et_arm_fp16_flags "$flags" + return 1 } return 0 } -proc check_effective_target_arm_neon_fp16_ok { } { - return [check_cached_effective_target arm_neon_fp16_ok \ - check_effective_target_arm_neon_fp16_ok_nocache] +proc check_effective_target_arm_fp16_ok { } { + return [check_cached_effective_target arm_fp16_ok \ + check_effective_target_arm_fp16_ok_nocache] } # Return 1 is this is an ARM target where -mthumb causes Thumb-1 to be -- 2.7.4