From cd1e2f632532d04c67a17820cb25826f8b0febac Mon Sep 17 00:00:00 2001 From: Marcus Comstedt Date: Fri, 19 Mar 2021 20:49:04 +0100 Subject: [PATCH] RISC-V: Add riscv{32,64}be with big endian as default gcc/ * common/config/riscv/riscv-common.c (TARGET_DEFAULT_TARGET_FLAGS): Set default endianness. * config.gcc (riscv32be-*, riscv64be-*): Set TARGET_BIG_ENDIAN_DEFAULT to 1. * config/riscv/elf.h (LINK_SPEC): Change -melf* value depending on default endianness. * config/riscv/freebsd.h (LINK_SPEC): Likewise. * config/riscv/linux.h (LINK_SPEC): Likewise. * config/riscv/riscv.c (TARGET_DEFAULT_TARGET_FLAGS): Set default endianness. * config/riscv/riscv.h (DEFAULT_ENDIAN_SPEC): New macro. --- gcc/common/config/riscv/riscv-common.c | 5 +++++ gcc/config.gcc | 15 +++++++++++++++ gcc/config/riscv/elf.h | 2 +- gcc/config/riscv/freebsd.h | 2 +- gcc/config/riscv/linux.h | 2 +- gcc/config/riscv/riscv.c | 5 +++++ gcc/config/riscv/riscv.h | 6 ++++++ 7 files changed, 34 insertions(+), 3 deletions(-) diff --git a/gcc/common/config/riscv/riscv-common.c b/gcc/common/config/riscv/riscv-common.c index 6bbe25d..34b74e5 100644 --- a/gcc/common/config/riscv/riscv-common.c +++ b/gcc/common/config/riscv/riscv-common.c @@ -32,6 +32,11 @@ along with GCC; see the file COPYING3. If not see #include "config/riscv/riscv-protos.h" #include "config/riscv/riscv-subset.h" +#ifdef TARGET_BIG_ENDIAN_DEFAULT +#undef TARGET_DEFAULT_TARGET_FLAGS +#define TARGET_DEFAULT_TARGET_FLAGS (MASK_BIG_ENDIAN) +#endif + /* Type for implied ISA info. */ struct riscv_implied_info_t { diff --git a/gcc/config.gcc b/gcc/config.gcc index 9cecc14..ed6203b 100644 --- a/gcc/config.gcc +++ b/gcc/config.gcc @@ -2468,6 +2468,11 @@ riscv*-*-linux*) tmake_file="${tmake_file} riscv/t-riscv riscv/t-linux" gnu_ld=yes gas=yes + case $target in + riscv32be-*|riscv64be-*) + tm_defines="${tm_defines} TARGET_BIG_ENDIAN_DEFAULT=1" + ;; + esac # Force .init_array support. The configure script cannot always # automatically detect that GAS supports it, yet we require it. gcc_cv_initfini_array=yes @@ -2491,6 +2496,11 @@ riscv*-*-elf* | riscv*-*-rtems*) tmake_file="${tmake_file} riscv/t-riscv" gnu_ld=yes gas=yes + case $target in + riscv32be-*|riscv64be-*) + tm_defines="${tm_defines} TARGET_BIG_ENDIAN_DEFAULT=1" + ;; + esac # Force .init_array support. The configure script cannot always # automatically detect that GAS supports it, yet we require it. gcc_cv_initfini_array=yes @@ -2500,6 +2510,11 @@ riscv*-*-freebsd*) tmake_file="${tmake_file} riscv/t-riscv" gnu_ld=yes gas=yes + case $target in + riscv32be-*|riscv64be-*) + tm_defines="${tm_defines} TARGET_BIG_ENDIAN_DEFAULT=1" + ;; + esac # Force .init_array support. The configure script cannot always # automatically detect that GAS supports it, yet we require it. gcc_cv_initfini_array=yes diff --git a/gcc/config/riscv/elf.h b/gcc/config/riscv/elf.h index 973efda..7e65e49 100644 --- a/gcc/config/riscv/elf.h +++ b/gcc/config/riscv/elf.h @@ -18,7 +18,7 @@ along with GCC; see the file COPYING3. If not see . */ #define LINK_SPEC "\ --melf" XLEN_SPEC "lriscv \ +-melf" XLEN_SPEC DEFAULT_ENDIAN_SPEC "riscv \ %{mno-relax:--no-relax} \ %{mbig-endian:-EB} \ %{mlittle-endian:-EL} \ diff --git a/gcc/config/riscv/freebsd.h b/gcc/config/riscv/freebsd.h index f3aca9f..6018e7b 100644 --- a/gcc/config/riscv/freebsd.h +++ b/gcc/config/riscv/freebsd.h @@ -40,7 +40,7 @@ along with GCC; see the file COPYING3. If not see #undef LINK_SPEC #define LINK_SPEC " \ - -melf" XLEN_SPEC "lriscv \ + -melf" XLEN_SPEC DEFAULT_ENDIAN_SPEC "riscv \ %{p:%nconsider using `-pg' instead of `-p' with gprof (1)} \ %{v:-V} \ %{assert*} %{R*} %{rpath*} %{defsym*} \ diff --git a/gcc/config/riscv/linux.h b/gcc/config/riscv/linux.h index e74f5d3..fce5b89 100644 --- a/gcc/config/riscv/linux.h +++ b/gcc/config/riscv/linux.h @@ -58,7 +58,7 @@ along with GCC; see the file COPYING3. If not see "%{mabi=ilp32:_ilp32}" #define LINK_SPEC "\ --melf" XLEN_SPEC "lriscv" LD_EMUL_SUFFIX " \ +-melf" XLEN_SPEC DEFAULT_ENDIAN_SPEC "riscv" LD_EMUL_SUFFIX " \ %{mno-relax:--no-relax} \ %{mbig-endian:-EB} \ %{mlittle-endian:-EL} \ diff --git a/gcc/config/riscv/riscv.c b/gcc/config/riscv/riscv.c index de8308c..99b8438 100644 --- a/gcc/config/riscv/riscv.c +++ b/gcc/config/riscv/riscv.c @@ -5526,6 +5526,11 @@ riscv_asan_shadow_offset (void) #undef TARGET_ASAN_SHADOW_OFFSET #define TARGET_ASAN_SHADOW_OFFSET riscv_asan_shadow_offset +#ifdef TARGET_BIG_ENDIAN_DEFAULT +#undef TARGET_DEFAULT_TARGET_FLAGS +#define TARGET_DEFAULT_TARGET_FLAGS (MASK_BIG_ENDIAN) +#endif + struct gcc_target targetm = TARGET_INITIALIZER; #include "gt-riscv.h" diff --git a/gcc/config/riscv/riscv.h b/gcc/config/riscv/riscv.h index 0b667d2..3cc3e86 100644 --- a/gcc/config/riscv/riscv.h +++ b/gcc/config/riscv/riscv.h @@ -30,6 +30,12 @@ along with GCC; see the file COPYING3. If not see /* Target CPU versions for D. */ #define TARGET_D_CPU_VERSIONS riscv_d_target_versions +#ifdef TARGET_BIG_ENDIAN_DEFAULT +#define DEFAULT_ENDIAN_SPEC "b" +#else +#define DEFAULT_ENDIAN_SPEC "l" +#endif + /* Default target_flags if no switches are specified */ #ifndef TARGET_DEFAULT -- 2.7.4