From ccf5b07b04696bc44c84c89dc3428ca261d58e43 Mon Sep 17 00:00:00 2001 From: Jian Cao Date: Tue, 19 Mar 2019 19:26:04 +0800 Subject: [PATCH] media: add codec support for SM1 [1/1] PD#SWPL-2867 Problem: bringup codec for SM1. Solution: add the register ops for SM1 Verify: Verified on SM1-AC200 Change-Id: I31db8f0b5816d67664e8161b3dc73574909afe31 Signed-off-by: Jian Cao --- drivers/amlogic/media/common/arch/registers/register_ops_m8.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/amlogic/media/common/arch/registers/register_ops_m8.c b/drivers/amlogic/media/common/arch/registers/register_ops_m8.c index 2d51a44..d8372c8 100644 --- a/drivers/amlogic/media/common/arch/registers/register_ops_m8.c +++ b/drivers/amlogic/media/common/arch/registers/register_ops_m8.c @@ -32,6 +32,7 @@ MESON_CPU_MAJOR_ID_G12A, \ MESON_CPU_MAJOR_ID_G12B, \ MESON_CPU_MAJOR_ID_TL1, \ + MESON_CPU_MAJOR_ID_SM1, \ 0} #define REGISTER_FOR_GXCPU {\ MESON_CPU_MAJOR_ID_GXBB, \ @@ -44,6 +45,7 @@ MESON_CPU_MAJOR_ID_G12A, \ MESON_CPU_MAJOR_ID_G12B, \ MESON_CPU_MAJOR_ID_TL1, \ + MESON_CPU_MAJOR_ID_SM1, \ 0} int codec_apb_read(unsigned int reg) { -- 2.7.4