From cc5b6a0e897c6a1946e340c3f0b62e5ca47796f1 Mon Sep 17 00:00:00 2001 From: Samuel Pitoiset Date: Mon, 18 Jan 2021 16:02:56 +0100 Subject: [PATCH] radv: enable TC-compat HTILE with D32S8 and MSAA on GFX9+ Only GFX8 has some depth/stencil resolve failures. Signed-off-by: Samuel Pitoiset Reviewed-by: Bas Nieuwenhuizen Part-of: --- src/amd/vulkan/radv_image.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c index 068dac8..5d3d026 100644 --- a/src/amd/vulkan/radv_image.c +++ b/src/amd/vulkan/radv_image.c @@ -96,7 +96,8 @@ radv_use_tc_compat_htile_for_image(struct radv_device *device, /* FIXME: for some reason TC compat with 2/4/8 samples breaks some cts * tests - disable for now. */ - if (pCreateInfo->samples >= 2 && format == VK_FORMAT_D32_SFLOAT_S8_UINT) + if (device->physical_device->rad_info.chip_class < GFX9 && + pCreateInfo->samples >= 2 && format == VK_FORMAT_D32_SFLOAT_S8_UINT) return false; /* GFX9 supports both 32-bit and 16-bit depth surfaces, while GFX8 only -- 2.7.4