From cc4c0e512a65d03ea6768dd7f72f6e428f512707 Mon Sep 17 00:00:00 2001 From: Aart Bik Date: Mon, 12 Jun 2023 11:50:48 -0700 Subject: [PATCH] [mlir][sparse][gpu] fixed whitespace in tbgen Reviewed By: K-Wu Differential Revision: https://reviews.llvm.org/D152739 --- mlir/include/mlir/Dialect/GPU/IR/GPUOps.td | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/mlir/include/mlir/Dialect/GPU/IR/GPUOps.td b/mlir/include/mlir/Dialect/GPU/IR/GPUOps.td index 280039e..d7b9854 100644 --- a/mlir/include/mlir/Dialect/GPU/IR/GPUOps.td +++ b/mlir/include/mlir/Dialect/GPU/IR/GPUOps.td @@ -1775,7 +1775,7 @@ def GPU_CreateCsrOp : GPU_Op<"create_csr", [GPU_AsyncOpInterface]> { def GPU_Create2To4SpMatOp : GPU_Op<"create_2to4_spmat", [GPU_AsyncOpInterface]> { let summary = "Create sparse matrix with 2:4 sparsity operation"; let description = [{ - The `gpu.create_2to4_spmat` operation initializes a sparse matrix in dense + The `gpu.create_2to4_spmat` operation initializes a sparse matrix in dense format with 2:4 sparsity. The buffers must already be copied from the host to the device prior to using this operation. The operation returns a handle to the sparse @@ -1994,8 +1994,8 @@ def GPU_SpMMBufferSizeOp : GPU_Op<"spmm_buffer_size", [GPU_AsyncOpInterface]> { GPU_SparseDnTensorHandle:$dnmatB, GPU_SparseDnTensorHandle:$dnmatC, TypeAttr:$computeType); - let results = (outs Res]>>:$bufferSzs, + let results = (outs Res]>>:$bufferSzs, Optional:$asyncToken); let builders = [OpBuilder<(ins -- 2.7.4