From cc469659304c3f2bf2bb4c6f4fe9484a7a2e0e69 Mon Sep 17 00:00:00 2001
From: Lukasz Majewski <l.majewski@samsung.com>
Date: Thu, 12 May 2016 12:52:03 +0200
Subject: [PATCH] TPL: TM2: clock: exynos: Add clock stubs for TM2 target

Those stubs are protected by CONFIG_TPL_TM2

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
---
 arch/arm/mach-exynos/clock.c | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/arch/arm/mach-exynos/clock.c b/arch/arm/mach-exynos/clock.c
index 3d31f9d..8a8d085 100644
--- a/arch/arm/mach-exynos/clock.c
+++ b/arch/arm/mach-exynos/clock.c
@@ -6,6 +6,7 @@
  */
 
 #include <common.h>
+#ifndef CONFIG_TPL_TM2
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/clk.h>
@@ -1772,3 +1773,22 @@ int set_epll_clk(unsigned long rate)
 
 	return 0;
 }
+#else
+unsigned long clock_get_periph_rate(int peripheral)
+{
+	/* PWM clock's parent is the SCLK_BUS_PLL (800MHz) divided by */
+	/* 12 => ACLK_PERIC_66 MHz is produced */
+	return 67000000;
+}
+
+#define PERIPH_ID_PWM0 132
+unsigned long get_pwm_clk(void)
+{
+	return clock_get_periph_rate(PERIPH_ID_PWM0);
+}
+
+unsigned long get_mmc_clk(int dev_index)
+{
+	return 100000000;
+}
+#endif /* CONFIG_TPL_TM2 */
-- 
2.7.4