From cc2f5a8adbc7ab1fdb7d9bcf4ea9838c73e82dfe Mon Sep 17 00:00:00 2001 From: Stephane Eranian Date: Fri, 5 Apr 2013 16:49:41 +0200 Subject: [PATCH] perf: Fix comments in PERF_MEM_LVL bitmask This small patch fixes a mistake in the comments for the PERF_MEM_LVL_* events. The L2, L3 bits simply represent cache levels, not hits or misses. That is encoded in PERF_MEM_LVL_MISS/PERF_MEM_LVL_HIT. Signed-off-by: Stephane Eranian Cc: peterz@infradead.org Cc: jolsa@redhat.com Link: http://lkml.kernel.org/r/20130405144941.GA30503@quad Signed-off-by: Ingo Molnar --- include/uapi/linux/perf_event.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/uapi/linux/perf_event.h b/include/uapi/linux/perf_event.h index 964a450..fb104e5 100644 --- a/include/uapi/linux/perf_event.h +++ b/include/uapi/linux/perf_event.h @@ -645,8 +645,8 @@ union perf_mem_data_src { #define PERF_MEM_LVL_MISS 0x04 /* miss level */ #define PERF_MEM_LVL_L1 0x08 /* L1 */ #define PERF_MEM_LVL_LFB 0x10 /* Line Fill Buffer */ -#define PERF_MEM_LVL_L2 0x20 /* L2 hit */ -#define PERF_MEM_LVL_L3 0x40 /* L3 hit */ +#define PERF_MEM_LVL_L2 0x20 /* L2 */ +#define PERF_MEM_LVL_L3 0x40 /* L3 */ #define PERF_MEM_LVL_LOC_RAM 0x80 /* Local DRAM */ #define PERF_MEM_LVL_REM_RAM1 0x100 /* Remote DRAM (1 hop) */ #define PERF_MEM_LVL_REM_RAM2 0x200 /* Remote DRAM (2 hops) */ -- 2.7.4