From cb4f2d7537686e6b0bfad0bc433d1cbd68a7eb08 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 11 Jan 2016 20:40:28 +0900 Subject: [PATCH] ARM: dts: Allow simultaneous usage exynos-rng and s5p-sss drivers on exynos5 The s5p-sss crypto HW acceleration driver supports only AES algorithms thus it accesses only registers from feeder (offset 0x0, length 0x100) and AES (offset 0x200, length 0x100) blocks of Security SubSystem (SSS). The exynos-rng Pseudo Random Number Generator driver accesses only PRNG block at offset 0x400 (length 0x100). Narrow the size of memory mapped by s5p-sss driver so both drivers can be loaded at the same time. Signed-off-by: Krzysztof Kozlowski --- arch/arm/boot/dts/exynos5250.dtsi | 2 +- arch/arm/boot/dts/exynos5420.dtsi | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi index 33e2d5f..2344034 100644 --- a/arch/arm/boot/dts/exynos5250.dtsi +++ b/arch/arm/boot/dts/exynos5250.dtsi @@ -807,7 +807,7 @@ sss@10830000 { compatible = "samsung,exynos4210-secss"; - reg = <0x10830000 0x10000>; + reg = <0x10830000 0x300>; interrupts = <0 112 0>; clocks = <&clock CLK_SSS>; clock-names = "secss"; diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index 48a0a55..7c8a606 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -859,7 +859,7 @@ sss: sss@10830000 { compatible = "samsung,exynos4210-secss"; - reg = <0x10830000 0x10000>; + reg = <0x10830000 0x300>; interrupts = <0 112 0>; clocks = <&clock CLK_SSS>; clock-names = "secss"; -- 2.7.4