From cac9773dccd95cd442d2852b7ced0a8a311504f6 Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Wed, 23 Mar 2022 09:28:46 -0700 Subject: [PATCH] [SelectionDAG] Don't create entries in ValueMap in ComputePHILiveOutRegInfo Instead of using operator[], use DenseMap::find to prevent default constructing an entry if it isn't already in the map. Also simplify a condition to check for 0 instead of a virtual register. I'm pretty sure we can only get 0 or a virtual register out of the value map. --- llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp b/llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp index b494551..e39ad73 100644 --- a/llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp @@ -445,9 +445,14 @@ void FunctionLoweringInfo::ComputePHILiveOutRegInfo(const PHINode *PN) { IntVT = TLI->getTypeToTransformTo(PN->getContext(), IntVT); unsigned BitWidth = IntVT.getSizeInBits(); - Register DestReg = ValueMap[PN]; - if (!Register::isVirtualRegister(DestReg)) + auto It = ValueMap.find(PN); + if (It == ValueMap.end()) return; + + Register DestReg = It->second; + if (DestReg == 0) + return + assert(Register::isVirtualRegister(DestReg) && "Expected a virtual reg"); LiveOutRegInfo.grow(DestReg); LiveOutInfo &DestLOI = LiveOutRegInfo[DestReg]; -- 2.7.4