From c96e214b9ca7739737cf257baf32ff819854027d Mon Sep 17 00:00:00 2001 From: Stanislav Mekhanoshin Date: Fri, 12 Feb 2021 12:30:52 -0800 Subject: [PATCH] [AMDGPU] Fix Windows build A trivial fix, 64 bit constant is 1ull, not 1ul on Windows. Fixed build broken by c0d7a8bc6241. --- llvm/lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/llvm/lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp b/llvm/lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp index faf63fd..e0ca60b 100644 --- a/llvm/lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp +++ b/llvm/lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp @@ -292,7 +292,7 @@ void SIMCCodeEmitter::encodeInstruction(const MCInst &MI, raw_ostream &OS, // unused op_sel_hi bits if corresponding operands do not exist. // accvgpr_read/write are different, however. These are VOP3P, MAI, have // src0, but do not use op_sel. - Encoding |= (1ul << 14) | (1ul << 59) | (1ul << 60); + Encoding |= (1ull << 14) | (1ull << 59) | (1ull << 60); break; default: break; -- 2.7.4