From c9083dd34a9f0b39ee343d6f3d115b42e2034bfe Mon Sep 17 00:00:00 2001 From: Vladimir Zapolskiy Date: Thu, 3 Mar 2016 06:52:58 +0200 Subject: [PATCH] usb: udc: lpc32xx: remove direct access to clock controller registers Direct access to clock control registers can be safely removed, the task of clock management is done by platform clock driver based on common clock framework. Signed-off-by: Vladimir Zapolskiy Signed-off-by: Felipe Balbi --- drivers/usb/gadget/udc/lpc32xx_udc.c | 29 ----------------------------- 1 file changed, 29 deletions(-) diff --git a/drivers/usb/gadget/udc/lpc32xx_udc.c b/drivers/usb/gadget/udc/lpc32xx_udc.c index bb8737a..2b8f21f 100644 --- a/drivers/usb/gadget/udc/lpc32xx_udc.c +++ b/drivers/usb/gadget/udc/lpc32xx_udc.c @@ -49,7 +49,6 @@ #endif #include -#include /* * USB device configuration structure @@ -210,16 +209,6 @@ static inline struct lpc32xx_udc *to_udc(struct usb_gadget *g) #define UDCA_BUFF_SIZE (128) -/* TODO: When the clock framework is introduced in LPC32xx, IO_ADDRESS will - * be replaced with an inremap()ed pointer - * */ -#define USB_CTRL IO_ADDRESS(LPC32XX_CLK_PM_BASE + 0x64) - -/* USB_CTRL bit defines */ -#define USB_SLAVE_HCLK_EN (1 << 24) -#define USB_HOST_NEED_CLK_EN (1 << 21) -#define USB_DEV_NEED_CLK_EN (1 << 22) - /********************************************************************** * USB device controller register offsets **********************************************************************/ @@ -639,9 +628,6 @@ static void isp1301_udc_configure(struct lpc32xx_udc *udc) i2c_smbus_write_byte_data(udc->isp1301_i2c_client, ISP1301_I2C_INTERRUPT_RISING, INT_VBUS_VLD); - /* Enable usb_need_clk clock after transceiver is initialized */ - writel((readl(USB_CTRL) | USB_DEV_NEED_CLK_EN), USB_CTRL); - dev_info(udc->dev, "ISP1301 Vendor ID : 0x%04x\n", i2c_smbus_read_word_data(udc->isp1301_i2c_client, 0x00)); dev_info(udc->dev, "ISP1301 Product ID : 0x%04x\n", @@ -983,11 +969,6 @@ static void udc_clk_set(struct lpc32xx_udc *udc, int enable) /* 48MHz PLL up */ clk_prepare_enable(udc->usb_pll_clk); - - /* Enable the USB device clock */ - writel(readl(USB_CTRL) | USB_DEV_NEED_CLK_EN, - USB_CTRL); - clk_prepare_enable(udc->usb_otg_clk); } else { if (!udc->clocked) @@ -999,11 +980,6 @@ static void udc_clk_set(struct lpc32xx_udc *udc, int enable) /* 48MHz PLL dpwn */ clk_disable_unprepare(udc->usb_pll_clk); - - /* Disable the USB device clock */ - writel(readl(USB_CTRL) & ~USB_DEV_NEED_CLK_EN, - USB_CTRL); - clk_disable_unprepare(udc->usb_otg_clk); } } @@ -3125,9 +3101,6 @@ static int lpc32xx_udc_probe(struct platform_device *pdev) goto io_map_fail; } - /* Enable AHB slave USB clock, needed for further USB clock control */ - writel(USB_SLAVE_HCLK_EN | (1 << 19), USB_CTRL); - /* Get required clocks */ udc->usb_pll_clk = clk_get(&pdev->dev, "ck_pll5"); if (IS_ERR(udc->usb_pll_clk)) { @@ -3161,8 +3134,6 @@ static int lpc32xx_udc_probe(struct platform_device *pdev) goto pll_set_fail; } - writel(readl(USB_CTRL) | USB_DEV_NEED_CLK_EN, USB_CTRL); - /* Enable USB device clock */ retval = clk_prepare_enable(udc->usb_slv_clk); if (retval < 0) { -- 2.7.4