From c8fa52561e9e51c3bff68762f58f37bff6c7a5b3 Mon Sep 17 00:00:00 2001 From: Simon Pilgrim Date: Fri, 31 Mar 2023 20:54:22 +0100 Subject: [PATCH] [X86] vector-compare-all_of.ll - add AVX1OR2 check-prefix and make AVX a common check-prefix --- llvm/test/CodeGen/X86/vector-compare-all_of.ll | 260 +++++++++---------------- 1 file changed, 89 insertions(+), 171 deletions(-) diff --git a/llvm/test/CodeGen/X86/vector-compare-all_of.ll b/llvm/test/CodeGen/X86/vector-compare-all_of.ll index e8a3dff..6d8d68d 100644 --- a/llvm/test/CodeGen/X86/vector-compare-all_of.ll +++ b/llvm/test/CodeGen/X86/vector-compare-all_of.ll @@ -1,9 +1,9 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2 ; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse4.2 | FileCheck %s --check-prefixes=SSE,SSE42 -; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1 -; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2 -; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx512f,+avx512bw,+avx512vl | FileCheck %s --check-prefixes=AVX512 +; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1OR2,AVX1 +; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX1OR2,AVX2 +; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx512f,+avx512bw,+avx512vl | FileCheck %s --check-prefixes=AVX,AVX512 define i64 @test_v2f64_sext(<2 x double> %a0, <2 x double> %a1) { ; SSE-LABEL: test_v2f64_sext: @@ -25,16 +25,6 @@ define i64 @test_v2f64_sext(<2 x double> %a0, <2 x double> %a1) { ; AVX-NEXT: sete %al ; AVX-NEXT: negq %rax ; AVX-NEXT: retq -; -; AVX512-LABEL: test_v2f64_sext: -; AVX512: # %bb.0: -; AVX512-NEXT: vcmpltpd %xmm0, %xmm1, %xmm0 -; AVX512-NEXT: vmovmskpd %xmm0, %ecx -; AVX512-NEXT: xorl %eax, %eax -; AVX512-NEXT: cmpl $3, %ecx -; AVX512-NEXT: sete %al -; AVX512-NEXT: negq %rax -; AVX512-NEXT: retq %c = fcmp ogt <2 x double> %a0, %a1 %s = sext <2 x i1> %c to <2 x i64> %1 = shufflevector <2 x i64> %s, <2 x i64> undef, <2 x i32> @@ -66,17 +56,6 @@ define i64 @test_v4f64_sext(<4 x double> %a0, <4 x double> %a1) { ; AVX-NEXT: negq %rax ; AVX-NEXT: vzeroupper ; AVX-NEXT: retq -; -; AVX512-LABEL: test_v4f64_sext: -; AVX512: # %bb.0: -; AVX512-NEXT: vcmpltpd %ymm0, %ymm1, %ymm0 -; AVX512-NEXT: vmovmskpd %ymm0, %ecx -; AVX512-NEXT: xorl %eax, %eax -; AVX512-NEXT: cmpl $15, %ecx -; AVX512-NEXT: sete %al -; AVX512-NEXT: negq %rax -; AVX512-NEXT: vzeroupper -; AVX512-NEXT: retq %c = fcmp ogt <4 x double> %a0, %a1 %s = sext <4 x i1> %c to <4 x i64> %1 = shufflevector <4 x i64> %s, <4 x i64> undef, <4 x i32> @@ -100,18 +79,18 @@ define i64 @test_v4f64_legal_sext(<4 x double> %a0, <4 x double> %a1) { ; SSE-NEXT: negq %rax ; SSE-NEXT: retq ; -; AVX-LABEL: test_v4f64_legal_sext: -; AVX: # %bb.0: -; AVX-NEXT: vcmpltpd %ymm0, %ymm1, %ymm0 -; AVX-NEXT: vextractf128 $1, %ymm0, %xmm1 -; AVX-NEXT: vpackssdw %xmm1, %xmm0, %xmm0 -; AVX-NEXT: vmovmskps %xmm0, %ecx -; AVX-NEXT: xorl %eax, %eax -; AVX-NEXT: cmpl $15, %ecx -; AVX-NEXT: sete %al -; AVX-NEXT: negq %rax -; AVX-NEXT: vzeroupper -; AVX-NEXT: retq +; AVX1OR2-LABEL: test_v4f64_legal_sext: +; AVX1OR2: # %bb.0: +; AVX1OR2-NEXT: vcmpltpd %ymm0, %ymm1, %ymm0 +; AVX1OR2-NEXT: vextractf128 $1, %ymm0, %xmm1 +; AVX1OR2-NEXT: vpackssdw %xmm1, %xmm0, %xmm0 +; AVX1OR2-NEXT: vmovmskps %xmm0, %ecx +; AVX1OR2-NEXT: xorl %eax, %eax +; AVX1OR2-NEXT: cmpl $15, %ecx +; AVX1OR2-NEXT: sete %al +; AVX1OR2-NEXT: negq %rax +; AVX1OR2-NEXT: vzeroupper +; AVX1OR2-NEXT: retq ; ; AVX512-LABEL: test_v4f64_legal_sext: ; AVX512: # %bb.0: @@ -156,16 +135,6 @@ define i32 @test_v4f32_sext(<4 x float> %a0, <4 x float> %a1) { ; AVX-NEXT: sete %al ; AVX-NEXT: negl %eax ; AVX-NEXT: retq -; -; AVX512-LABEL: test_v4f32_sext: -; AVX512: # %bb.0: -; AVX512-NEXT: vcmpltps %xmm0, %xmm1, %xmm0 -; AVX512-NEXT: vmovmskps %xmm0, %ecx -; AVX512-NEXT: xorl %eax, %eax -; AVX512-NEXT: cmpl $15, %ecx -; AVX512-NEXT: sete %al -; AVX512-NEXT: negl %eax -; AVX512-NEXT: retq %c = fcmp ogt <4 x float> %a0, %a1 %s = sext <4 x i1> %c to <4 x i32> %1 = shufflevector <4 x i32> %s, <4 x i32> undef, <4 x i32> @@ -199,17 +168,6 @@ define i32 @test_v8f32_sext(<8 x float> %a0, <8 x float> %a1) { ; AVX-NEXT: negl %eax ; AVX-NEXT: vzeroupper ; AVX-NEXT: retq -; -; AVX512-LABEL: test_v8f32_sext: -; AVX512: # %bb.0: -; AVX512-NEXT: vcmpltps %ymm0, %ymm1, %ymm0 -; AVX512-NEXT: vmovmskps %ymm0, %ecx -; AVX512-NEXT: xorl %eax, %eax -; AVX512-NEXT: cmpl $255, %ecx -; AVX512-NEXT: sete %al -; AVX512-NEXT: negl %eax -; AVX512-NEXT: vzeroupper -; AVX512-NEXT: retq %c = fcmp ogt <8 x float> %a0, %a1 %s = sext <8 x i1> %c to <8 x i32> %1 = shufflevector <8 x i32> %s, <8 x i32> undef, <8 x i32> @@ -235,18 +193,18 @@ define i32 @test_v8f32_legal_sext(<8 x float> %a0, <8 x float> %a1) { ; SSE-NEXT: negl %eax ; SSE-NEXT: retq ; -; AVX-LABEL: test_v8f32_legal_sext: -; AVX: # %bb.0: -; AVX-NEXT: vcmpltps %ymm0, %ymm1, %ymm0 -; AVX-NEXT: vextractf128 $1, %ymm0, %xmm1 -; AVX-NEXT: vpackssdw %xmm1, %xmm0, %xmm0 -; AVX-NEXT: vpmovmskb %xmm0, %ecx -; AVX-NEXT: xorl %eax, %eax -; AVX-NEXT: cmpl $65535, %ecx # imm = 0xFFFF -; AVX-NEXT: sete %al -; AVX-NEXT: negl %eax -; AVX-NEXT: vzeroupper -; AVX-NEXT: retq +; AVX1OR2-LABEL: test_v8f32_legal_sext: +; AVX1OR2: # %bb.0: +; AVX1OR2-NEXT: vcmpltps %ymm0, %ymm1, %ymm0 +; AVX1OR2-NEXT: vextractf128 $1, %ymm0, %xmm1 +; AVX1OR2-NEXT: vpackssdw %xmm1, %xmm0, %xmm0 +; AVX1OR2-NEXT: vpmovmskb %xmm0, %ecx +; AVX1OR2-NEXT: xorl %eax, %eax +; AVX1OR2-NEXT: cmpl $65535, %ecx # imm = 0xFFFF +; AVX1OR2-NEXT: sete %al +; AVX1OR2-NEXT: negl %eax +; AVX1OR2-NEXT: vzeroupper +; AVX1OR2-NEXT: retq ; ; AVX512-LABEL: test_v8f32_legal_sext: ; AVX512: # %bb.0: @@ -310,16 +268,6 @@ define i64 @test_v2i64_sext(<2 x i64> %a0, <2 x i64> %a1) { ; AVX-NEXT: sete %al ; AVX-NEXT: negq %rax ; AVX-NEXT: retq -; -; AVX512-LABEL: test_v2i64_sext: -; AVX512: # %bb.0: -; AVX512-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm0 -; AVX512-NEXT: vmovmskpd %xmm0, %ecx -; AVX512-NEXT: xorl %eax, %eax -; AVX512-NEXT: cmpl $3, %ecx -; AVX512-NEXT: sete %al -; AVX512-NEXT: negq %rax -; AVX512-NEXT: retq %c = icmp sgt <2 x i64> %a0, %a1 %s = sext <2 x i1> %c to <2 x i64> %1 = shufflevector <2 x i64> %s, <2 x i64> undef, <2 x i32> @@ -525,16 +473,6 @@ define i32 @test_v4i32_sext(<4 x i32> %a0, <4 x i32> %a1) { ; AVX-NEXT: sete %al ; AVX-NEXT: negl %eax ; AVX-NEXT: retq -; -; AVX512-LABEL: test_v4i32_sext: -; AVX512: # %bb.0: -; AVX512-NEXT: vpcmpgtd %xmm1, %xmm0, %xmm0 -; AVX512-NEXT: vmovmskps %xmm0, %ecx -; AVX512-NEXT: xorl %eax, %eax -; AVX512-NEXT: cmpl $15, %ecx -; AVX512-NEXT: sete %al -; AVX512-NEXT: negl %eax -; AVX512-NEXT: retq %c = icmp sgt <4 x i32> %a0, %a1 %s = sext <4 x i1> %c to <4 x i32> %1 = shufflevector <4 x i32> %s, <4 x i32> undef, <4 x i32> @@ -693,17 +631,6 @@ define i16 @test_v8i16_sext(<8 x i16> %a0, <8 x i16> %a1) { ; AVX-NEXT: negl %eax ; AVX-NEXT: # kill: def $ax killed $ax killed $eax ; AVX-NEXT: retq -; -; AVX512-LABEL: test_v8i16_sext: -; AVX512: # %bb.0: -; AVX512-NEXT: vpcmpgtw %xmm1, %xmm0, %xmm0 -; AVX512-NEXT: vpmovmskb %xmm0, %ecx -; AVX512-NEXT: xorl %eax, %eax -; AVX512-NEXT: cmpl $65535, %ecx # imm = 0xFFFF -; AVX512-NEXT: sete %al -; AVX512-NEXT: negl %eax -; AVX512-NEXT: # kill: def $ax killed $ax killed $eax -; AVX512-NEXT: retq %c = icmp sgt <8 x i16> %a0, %a1 %s = sext <8 x i1> %c to <8 x i16> %1 = shufflevector <8 x i16> %s, <8 x i16> undef, <8 x i32> @@ -870,15 +797,6 @@ define i8 @test_v16i8_sext(<16 x i8> %a0, <16 x i8> %a1) { ; AVX-NEXT: sete %al ; AVX-NEXT: negb %al ; AVX-NEXT: retq -; -; AVX512-LABEL: test_v16i8_sext: -; AVX512: # %bb.0: -; AVX512-NEXT: vpcmpgtb %xmm1, %xmm0, %xmm0 -; AVX512-NEXT: vpmovmskb %xmm0, %eax -; AVX512-NEXT: cmpl $65535, %eax # imm = 0xFFFF -; AVX512-NEXT: sete %al -; AVX512-NEXT: negb %al -; AVX512-NEXT: retq %c = icmp sgt <16 x i8> %a0, %a1 %s = sext <16 x i1> %c to <16 x i8> %1 = shufflevector <16 x i8> %s, <16 x i8> undef, <16 x i32> @@ -1020,13 +938,13 @@ define i1 @bool_reduction_v2f64(<2 x double> %x, <2 x double> %y) { ; SSE-NEXT: sete %al ; SSE-NEXT: retq ; -; AVX-LABEL: bool_reduction_v2f64: -; AVX: # %bb.0: -; AVX-NEXT: vcmpltpd %xmm0, %xmm1, %xmm0 -; AVX-NEXT: vmovmskpd %xmm0, %eax -; AVX-NEXT: cmpb $3, %al -; AVX-NEXT: sete %al -; AVX-NEXT: retq +; AVX1OR2-LABEL: bool_reduction_v2f64: +; AVX1OR2: # %bb.0: +; AVX1OR2-NEXT: vcmpltpd %xmm0, %xmm1, %xmm0 +; AVX1OR2-NEXT: vmovmskpd %xmm0, %eax +; AVX1OR2-NEXT: cmpb $3, %al +; AVX1OR2-NEXT: sete %al +; AVX1OR2-NEXT: retq ; ; AVX512-LABEL: bool_reduction_v2f64: ; AVX512: # %bb.0: @@ -1051,13 +969,13 @@ define i1 @bool_reduction_v4f32(<4 x float> %x, <4 x float> %y) { ; SSE-NEXT: sete %al ; SSE-NEXT: retq ; -; AVX-LABEL: bool_reduction_v4f32: -; AVX: # %bb.0: -; AVX-NEXT: vcmpeqps %xmm1, %xmm0, %xmm0 -; AVX-NEXT: vmovmskps %xmm0, %eax -; AVX-NEXT: cmpb $15, %al -; AVX-NEXT: sete %al -; AVX-NEXT: retq +; AVX1OR2-LABEL: bool_reduction_v4f32: +; AVX1OR2: # %bb.0: +; AVX1OR2-NEXT: vcmpeqps %xmm1, %xmm0, %xmm0 +; AVX1OR2-NEXT: vmovmskps %xmm0, %eax +; AVX1OR2-NEXT: cmpb $15, %al +; AVX1OR2-NEXT: sete %al +; AVX1OR2-NEXT: retq ; ; AVX512-LABEL: bool_reduction_v4f32: ; AVX512: # %bb.0: @@ -1086,14 +1004,14 @@ define i1 @bool_reduction_v4f64(<4 x double> %x, <4 x double> %y) { ; SSE-NEXT: sete %al ; SSE-NEXT: retq ; -; AVX-LABEL: bool_reduction_v4f64: -; AVX: # %bb.0: -; AVX-NEXT: vcmplepd %ymm0, %ymm1, %ymm0 -; AVX-NEXT: vmovmskpd %ymm0, %eax -; AVX-NEXT: cmpb $15, %al -; AVX-NEXT: sete %al -; AVX-NEXT: vzeroupper -; AVX-NEXT: retq +; AVX1OR2-LABEL: bool_reduction_v4f64: +; AVX1OR2: # %bb.0: +; AVX1OR2-NEXT: vcmplepd %ymm0, %ymm1, %ymm0 +; AVX1OR2-NEXT: vmovmskpd %ymm0, %eax +; AVX1OR2-NEXT: cmpb $15, %al +; AVX1OR2-NEXT: sete %al +; AVX1OR2-NEXT: vzeroupper +; AVX1OR2-NEXT: retq ; ; AVX512-LABEL: bool_reduction_v4f64: ; AVX512: # %bb.0: @@ -1124,14 +1042,14 @@ define i1 @bool_reduction_v8f32(<8 x float> %x, <8 x float> %y) { ; SSE-NEXT: sete %al ; SSE-NEXT: retq ; -; AVX-LABEL: bool_reduction_v8f32: -; AVX: # %bb.0: -; AVX-NEXT: vcmpneqps %ymm1, %ymm0, %ymm0 -; AVX-NEXT: vmovmskps %ymm0, %eax -; AVX-NEXT: cmpb $-1, %al -; AVX-NEXT: sete %al -; AVX-NEXT: vzeroupper -; AVX-NEXT: retq +; AVX1OR2-LABEL: bool_reduction_v8f32: +; AVX1OR2: # %bb.0: +; AVX1OR2-NEXT: vcmpneqps %ymm1, %ymm0, %ymm0 +; AVX1OR2-NEXT: vmovmskps %ymm0, %eax +; AVX1OR2-NEXT: cmpb $-1, %al +; AVX1OR2-NEXT: sete %al +; AVX1OR2-NEXT: vzeroupper +; AVX1OR2-NEXT: retq ; ; AVX512-LABEL: bool_reduction_v8f32: ; AVX512: # %bb.0: @@ -1173,14 +1091,14 @@ define i1 @bool_reduction_v2i64(<2 x i64> %x, <2 x i64> %y) { ; SSE42-NEXT: sete %al ; SSE42-NEXT: retq ; -; AVX-LABEL: bool_reduction_v2i64: -; AVX: # %bb.0: -; AVX-NEXT: vpcmpeqq %xmm1, %xmm0, %xmm0 -; AVX-NEXT: vmovmskpd %xmm0, %eax -; AVX-NEXT: xorl $3, %eax -; AVX-NEXT: cmpb $3, %al -; AVX-NEXT: sete %al -; AVX-NEXT: retq +; AVX1OR2-LABEL: bool_reduction_v2i64: +; AVX1OR2: # %bb.0: +; AVX1OR2-NEXT: vpcmpeqq %xmm1, %xmm0, %xmm0 +; AVX1OR2-NEXT: vmovmskpd %xmm0, %eax +; AVX1OR2-NEXT: xorl $3, %eax +; AVX1OR2-NEXT: cmpb $3, %al +; AVX1OR2-NEXT: sete %al +; AVX1OR2-NEXT: retq ; ; AVX512-LABEL: bool_reduction_v2i64: ; AVX512: # %bb.0: @@ -1218,15 +1136,15 @@ define i1 @bool_reduction_v4i32(<4 x i32> %x, <4 x i32> %y) { ; SSE42-NEXT: sete %al ; SSE42-NEXT: retq ; -; AVX-LABEL: bool_reduction_v4i32: -; AVX: # %bb.0: -; AVX-NEXT: vpminud %xmm1, %xmm0, %xmm1 -; AVX-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0 -; AVX-NEXT: vmovmskps %xmm0, %eax -; AVX-NEXT: xorl $15, %eax -; AVX-NEXT: cmpb $15, %al -; AVX-NEXT: sete %al -; AVX-NEXT: retq +; AVX1OR2-LABEL: bool_reduction_v4i32: +; AVX1OR2: # %bb.0: +; AVX1OR2-NEXT: vpminud %xmm1, %xmm0, %xmm1 +; AVX1OR2-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0 +; AVX1OR2-NEXT: vmovmskps %xmm0, %eax +; AVX1OR2-NEXT: xorl $15, %eax +; AVX1OR2-NEXT: cmpb $15, %al +; AVX1OR2-NEXT: sete %al +; AVX1OR2-NEXT: retq ; ; AVX512-LABEL: bool_reduction_v4i32: ; AVX512: # %bb.0: @@ -1254,14 +1172,14 @@ define i1 @bool_reduction_v8i16(<8 x i16> %x, <8 x i16> %y) { ; SSE-NEXT: sete %al ; SSE-NEXT: retq ; -; AVX-LABEL: bool_reduction_v8i16: -; AVX: # %bb.0: -; AVX-NEXT: vpcmpgtw %xmm0, %xmm1, %xmm0 -; AVX-NEXT: vpacksswb %xmm0, %xmm0, %xmm0 -; AVX-NEXT: vpmovmskb %xmm0, %eax -; AVX-NEXT: cmpb $-1, %al -; AVX-NEXT: sete %al -; AVX-NEXT: retq +; AVX1OR2-LABEL: bool_reduction_v8i16: +; AVX1OR2: # %bb.0: +; AVX1OR2-NEXT: vpcmpgtw %xmm0, %xmm1, %xmm0 +; AVX1OR2-NEXT: vpacksswb %xmm0, %xmm0, %xmm0 +; AVX1OR2-NEXT: vpmovmskb %xmm0, %eax +; AVX1OR2-NEXT: cmpb $-1, %al +; AVX1OR2-NEXT: sete %al +; AVX1OR2-NEXT: retq ; ; AVX512-LABEL: bool_reduction_v8i16: ; AVX512: # %bb.0: @@ -1290,13 +1208,13 @@ define i1 @bool_reduction_v16i8(<16 x i8> %x, <16 x i8> %y) { ; SSE-NEXT: sete %al ; SSE-NEXT: retq ; -; AVX-LABEL: bool_reduction_v16i8: -; AVX: # %bb.0: -; AVX-NEXT: vpcmpgtb %xmm1, %xmm0, %xmm0 -; AVX-NEXT: vpmovmskb %xmm0, %eax -; AVX-NEXT: cmpw $-1, %ax -; AVX-NEXT: sete %al -; AVX-NEXT: retq +; AVX1OR2-LABEL: bool_reduction_v16i8: +; AVX1OR2: # %bb.0: +; AVX1OR2-NEXT: vpcmpgtb %xmm1, %xmm0, %xmm0 +; AVX1OR2-NEXT: vpmovmskb %xmm0, %eax +; AVX1OR2-NEXT: cmpw $-1, %ax +; AVX1OR2-NEXT: sete %al +; AVX1OR2-NEXT: retq ; ; AVX512-LABEL: bool_reduction_v16i8: ; AVX512: # %bb.0: -- 2.7.4