From c8bf7d80f97d97a68a338994cbcbc6aa20071e71 Mon Sep 17 00:00:00 2001 From: Lei Yang Date: Fri, 14 Jun 2019 17:32:27 +0800 Subject: [PATCH] hdmirx: add packet analysis of hdr10plus [1/1] PD#SWPL-9686 Problem: hdmirx cannot support HDR10plus Solution: add packet analysis of hdr10plus. Verify: tm2_ab311. Change-Id: Ic98c3fa57ce6da3262285febc587fb2cac2be0fa Signed-off-by: Lei Yang --- .../amlogic/media/vin/tvin/hdmirx/hdmi_rx_drv.c | 63 ++++++++++++++-------- .../amlogic/media/vin/tvin/hdmirx/hdmi_rx_drv.h | 4 +- .../media/vin/tvin/hdmirx/hdmi_rx_pktinfo.c | 60 ++++++++++++++------- .../media/vin/tvin/hdmirx/hdmi_rx_pktinfo.h | 26 ++++++--- .../media/vin/tvin/hdmirx/hdmi_rx_wrapper.c | 9 ++++ drivers/amlogic/media/vin/tvin/tvin_global.h | 47 ++++++++++++++++ 6 files changed, 163 insertions(+), 46 deletions(-) diff --git a/drivers/amlogic/media/vin/tvin/hdmirx/hdmi_rx_drv.c b/drivers/amlogic/media/vin/tvin/hdmirx/hdmi_rx_drv.c index b135114..9b4fc29 100644 --- a/drivers/amlogic/media/vin/tvin/hdmirx/hdmi_rx_drv.c +++ b/drivers/amlogic/media/vin/tvin/hdmirx/hdmi_rx_drv.c @@ -727,11 +727,45 @@ int hdmirx_hw_get_3d_structure(void) */ void hdmirx_get_vsi_info(struct tvin_sig_property_s *prop) { - rx_get_vsi_info(); + static uint8_t last_vsi_state; + uint8_t vsi_state = rx_get_vsi_info(); - prop->trans_fmt = TVIN_TFMT_2D; - prop->dolby_vision = false; - if (hdmirx_hw_get_3d_structure() == 1) { + if (last_vsi_state != vsi_state) { + if (log_level & PACKET_LOG) { + rx_pr("!!!vsi state = %d\n", vsi_state); + rx_pr("1:4K3D 2:DV10 3:DV15 4:HDR10+\n"); + } + prop->trans_fmt = TVIN_TFMT_2D; + prop->dolby_vision = false; + prop->hdr10p_info.hdr10p_on = false; + last_vsi_state = vsi_state; + } + + switch (vsi_state) { + case E_VSI_HDR10PLUS: + prop->hdr10p_info.hdr10p_on = rx.vs_info_details.hdr10plus; + memcpy(&(prop->hdr10p_info.hdr10p_data), + &(rx_pkt.vs_info), + sizeof(struct tvin_hdr10p_data_s)); + break; + case E_VSI_DV10: + case E_VSI_DV15: + prop->dolby_vision = rx.vs_info_details.dolby_vision; + prop->low_latency = rx.vs_info_details.low_latency; + if ((rx.vs_info_details.dolby_vision == true) && + (rx.vs_info_details.dolby_timeout <= + dv_nopacket_timeout) && + (rx.vs_info_details.dolby_timeout != 0)) { + rx.vs_info_details.dolby_timeout--; + if (rx.vs_info_details.dolby_timeout == 0) { + rx.vs_info_details.dolby_vision = false; + rx_pr("dv10 timeout\n"); + } + } + break; + case E_VSI_4K3D: + case E_VSI_VSI21: + if (hdmirx_hw_get_3d_structure() == 1) { if (rx.vs_info_details._3d_structure == 0x1) { /* field alternative */ prop->trans_fmt = TVIN_TFMT_3D_FA; @@ -772,23 +806,10 @@ void hdmirx_get_vsi_info(struct tvin_sig_property_s *prop) break; } } - } else { - prop->dolby_vision = rx.vs_info_details.dolby_vision; - prop->low_latency = rx.vs_info_details.low_latency; - if ((rx.vs_info_details.dolby_vision == true) && - (rx.vs_info_details.dolby_timeout <= - dv_nopacket_timeout) && - (rx.vs_info_details.dolby_timeout != 0)) { - rx.vs_info_details.dolby_timeout--; - if (rx.vs_info_details.dolby_timeout == 0) { - rx.vs_info_details.dolby_vision = false; - rx_pr("dv type 0x18 timeout\n"); - } - } - if (log_level & VSI_LOG) { - rx_pr("prop->dolby_vision:%d\n", prop->dolby_vision); - rx_pr("prop->low_latency:%d\n", prop->low_latency); - } + } + break; + default: + break; } } /* diff --git a/drivers/amlogic/media/vin/tvin/hdmirx/hdmi_rx_drv.h b/drivers/amlogic/media/vin/tvin/hdmirx/hdmi_rx_drv.h index 0a9afd8..c10c01d 100644 --- a/drivers/amlogic/media/vin/tvin/hdmirx/hdmi_rx_drv.h +++ b/drivers/amlogic/media/vin/tvin/hdmirx/hdmi_rx_drv.h @@ -34,7 +34,7 @@ #include "hdmi_rx_edid.h" -#define RX_VER0 "ver.2019-05-07" +#define RX_VER0 "ver.2019-06-14" /* * * @@ -45,6 +45,7 @@ /* * * + * */ #define RX_VER2 "ver.2019/07/18" @@ -325,6 +326,7 @@ struct vsi_info_s { unsigned int dolby_timeout; unsigned int eff_tmax_pq; bool allm_mode; + bool hdr10plus; }; #define CHANNEL_STATUS_SIZE 24 diff --git a/drivers/amlogic/media/vin/tvin/hdmirx/hdmi_rx_pktinfo.c b/drivers/amlogic/media/vin/tvin/hdmirx/hdmi_rx_pktinfo.c index c3db51d..5d3afa4 100644 --- a/drivers/amlogic/media/vin/tvin/hdmirx/hdmi_rx_pktinfo.c +++ b/drivers/amlogic/media/vin/tvin/hdmirx/hdmi_rx_pktinfo.c @@ -515,7 +515,7 @@ static void rx_pktdump_vsi(void *pdata) rx_pr("ieee: 0x%x\n", pktdata->ieee); rx_pr("3d vdfmt: 0x%x\n", pktdata->sbpkt.vsi.vdfmt); - if (pktdata->length == E_DV_LENGTH_24) { + if (pktdata->length == E_PKT_LENGTH_24) { /*dobly version v0 pkt*/ } else { @@ -1351,21 +1351,25 @@ static int vsi_handler(struct hdmi_rx_ctrl *ctx) * stop: 0x05,0x04 * */ -void rx_get_vsi_info(void) +uint8_t rx_get_vsi_info(void) { struct vsi_infoframe_st *pkt; + uint8_t ret = E_VSI_NULL; unsigned int tmp; pkt = (struct vsi_infoframe_st *)&(rx_pkt.vs_info); - rx.vs_info_details._3d_structure = 0; rx.vs_info_details._3d_ext_data = 0; rx.vs_info_details.low_latency = false; rx.vs_info_details.backlt_md_bit = false; /* rx.vs_info_details.dolby_timeout = 0xffff; */ - if ((pkt->length == E_DV_LENGTH_27) && - (pkt->ieee == 0x00d046)) { - /* dolby1.5 */ + switch (pkt->ieee) { + case IEEE_DV15: + /* dolbyvision 1.5 */ + ret = E_VSI_DV15; + if (pkt->length != E_PKT_LENGTH_27) + if (log_level & PACKET_LOG) + rx_pr("vsi dv15 length err\n"); tmp = pkt->sbpkt.payload.data[0] & _BIT(1); rx.vs_info_details.dolby_vision = tmp ? true : false; tmp = pkt->sbpkt.payload.data[0] & _BIT(0); @@ -1377,28 +1381,43 @@ void rx_get_vsi_info(void) (pkt->sbpkt.payload.data[0] & 0xf00); rx.vs_info_details.eff_tmax_pq = tmp; } - } else if (pkt->ieee == 0x000c03) { - /* dobly10 */ - if (pkt->length == E_DV_LENGTH_24) { + break; + case IEEE_VSI21: + /* hdmi2.1 */ + ret = E_VSI_VSI21; + tmp = pkt->sbpkt.payload.data[0] & _BIT(9); + rx.vs_info_details.allm_mode = tmp ? true : false; + break; + case IEEE_HDR10PLUS: + /* HDR10+ */ + ret = E_VSI_HDR10PLUS; + if ((pkt->length != E_PKT_LENGTH_27) || + (pkt->pkttype != 0x01) || + (pkt->ver_st.version != 0x01) || + (((pkt->sbpkt.payload.data[1] >> 6) & 0x03) != 0x01)) + if (log_level & PACKET_LOG) + rx_pr("vsi hdr10+ length err\n"); + /* consider hdr10+ is true when IEEE matched */ + rx.vs_info_details.hdr10plus = true; + break; + case IEEE_VSI14: + /* dolbyvision1.0 */ + ret = E_VSI_4K3D; + if (pkt->length == E_PKT_LENGTH_24) { rx.vs_info_details.dolby_vision = true; if ((pkt->sbpkt.payload.data[0] & 0xffff) == 0) { rx.vs_info_details.dolby_timeout = dv_nopacket_timeout; pkt->sbpkt.payload.data[0] = 0xffff; } - } else if ((pkt->length == E_DV_LENGTH_5) && + } else if ((pkt->length == E_PKT_LENGTH_5) && (pkt->sbpkt.payload.data[0] & 0xffff)) { rx.vs_info_details.dolby_vision = false; - } else if ((pkt->length == E_DV_LENGTH_4) && + } else if ((pkt->length == E_PKT_LENGTH_4) && ((pkt->sbpkt.payload.data[0] & 0xff) == 0)) { rx.vs_info_details.dolby_vision = false; - } - } else if (pkt->ieee == 0xd85dc4) { - /*TODO:hdmi2.1 spec vsi packet*/ - tmp = pkt->sbpkt.payload.data[0] & _BIT(9); - rx.vs_info_details.allm_mode = tmp ? true : false; - } else { - /*3d VSI*/ + } else { + /* 3d VSI*/ if (pkt->sbpkt.vsi_3Dext.vdfmt == VSI_FORMAT_3D_FORMAT) { rx.vs_info_details._3d_structure = pkt->sbpkt.vsi_3Dext.threeD_st; @@ -1411,6 +1430,11 @@ void rx_get_vsi_info(void) } rx.vs_info_details.dolby_vision = false; } + break; + default: + break; + } + return ret; } #if 0 diff --git a/drivers/amlogic/media/vin/tvin/hdmirx/hdmi_rx_pktinfo.h b/drivers/amlogic/media/vin/tvin/hdmirx/hdmi_rx_pktinfo.h index 8a7f020..40adf36 100644 --- a/drivers/amlogic/media/vin/tvin/hdmirx/hdmi_rx_pktinfo.h +++ b/drivers/amlogic/media/vin/tvin/hdmirx/hdmi_rx_pktinfo.h @@ -28,11 +28,25 @@ #define K_FLAG_TAB_END 0xa0a05f5f -enum dolbyvision_lenGth_e { - E_DV_LENGTH_4 = 0x04, - E_DV_LENGTH_5 = 0x05, - E_DV_LENGTH_24 = 0x18, - E_DV_LENGTH_27 = 0x1B +#define IEEE_VSI14 0x000c03 +#define IEEE_DV15 0x00d046 +#define IEEE_VSI21 0xc45dd8 +#define IEEE_HDR10PLUS 0x90848b + +enum vsi_state_e { + E_VSI_NULL, + E_VSI_4K3D, + E_VSI_DV10, + E_VSI_DV15, + E_VSI_HDR10PLUS, + E_VSI_VSI21 +}; + +enum pkt_length_e { + E_PKT_LENGTH_4 = 0x04, + E_PKT_LENGTH_5 = 0x05, + E_PKT_LENGTH_24 = 0x18, + E_PKT_LENGTH_27 = 0x1B }; enum pkt_decode_type { @@ -1004,7 +1018,7 @@ extern void rx_pkt_check_content(void); extern void rx_pkt_set_fifo_pri(uint32_t pri); extern uint32_t rx_pkt_get_fifo_pri(void); -extern void rx_get_vsi_info(void); +extern uint8_t rx_get_vsi_info(void); /*please ignore checksum byte*/ extern void rx_pkt_get_audif_ex(void *pktinfo); diff --git a/drivers/amlogic/media/vin/tvin/hdmirx/hdmi_rx_wrapper.c b/drivers/amlogic/media/vin/tvin/hdmirx/hdmi_rx_wrapper.c index f2cf00f..cbae377 100644 --- a/drivers/amlogic/media/vin/tvin/hdmirx/hdmi_rx_wrapper.c +++ b/drivers/amlogic/media/vin/tvin/hdmirx/hdmi_rx_wrapper.c @@ -2664,6 +2664,15 @@ static void dump_video_status(void) rx.no_signal, rx.state); rx_pr("skip frame=%d\n", rx.skip); rx_pr("avmute_skip:0x%x\n", rx.avmute_skip); + + rx_pr("****vs_info_details:*****\n"); + rx_pr("hdr10plus = %d\n", rx.vs_info_details.hdr10plus); + rx_pr("allm_mode = %d\n", rx.vs_info_details.allm_mode); + rx_pr("dolby_vision = %d\n", rx.vs_info_details.dolby_vision); + rx_pr("dv ll = %d\n", rx.vs_info_details.low_latency); + + rx_pr("DRM = %d\n", rx_pkt_chk_attach_drm()); + rx_pr("phy addr: %#x,%#x,port: %d, up phy addr:%#x\n", hdmirx_rd_top(TOP_EDID_RAM_OVR1_DATA), hdmirx_rd_top(TOP_EDID_RAM_OVR2_DATA), diff --git a/drivers/amlogic/media/vin/tvin/tvin_global.h b/drivers/amlogic/media/vin/tvin/tvin_global.h index ef3e7b7..409d070 100644 --- a/drivers/amlogic/media/vin/tvin/tvin_global.h +++ b/drivers/amlogic/media/vin/tvin/tvin_global.h @@ -448,6 +448,52 @@ struct tvin_hdr_info_s { unsigned int hdr_check_cnt; }; +struct tvin_hdr10p_data_s { + uint32_t vsif_hb; + uint32_t vsif_ieee_code; + struct pb4_st { + uint8_t rvd:1; + uint8_t max_lumin:5; + uint8_t app_ver:2; + } __packed pb4_st; + uint8_t average_maxrgb; + uint8_t distrib_valus0; + uint8_t distrib_valus1; + uint8_t distrib_valus2; + uint8_t distrib_valus3; + uint8_t distrib_valus4; + uint8_t distrib_valus5; + uint8_t distrib_valus6; + uint8_t distrib_valus7; + uint8_t distrib_valus8; + struct pb15_18_st { + uint32_t knee_point_x_9_6:4; + uint32_t num_bezier_curve_anchors:4; + uint32_t knee_point_y_9_8:2; + uint32_t knee_point_x_5_0:6; + uint32_t knee_point_y_7_0:8; + uint32_t bezier_curve_anchors0:8; + } __packed pb15_18_st; + uint8_t bezier_curve_anchors1; + uint8_t bezier_curve_anchors2; + uint8_t bezier_curve_anchors3; + uint8_t bezier_curve_anchors4; + uint8_t bezier_curve_anchors5; + uint8_t bezier_curve_anchors6; + uint8_t bezier_curve_anchors7; + uint8_t bezier_curve_anchors8; + struct pb27_st { + uint8_t rvd:6; + uint8_t no_delay_flag:1; + uint8_t overlay_flag:1; + } __packed pb27_st; +} __packed; + +struct tvin_hdr10plus_info_s { + bool hdr10p_on; + struct tvin_hdr10p_data_s hdr10p_data; +}; + enum tvin_cn_type_e { GRAPHICS, PHOTO, @@ -489,6 +535,7 @@ struct tvin_sig_property_s { uint8_t fps; unsigned int skip_vf_num;/*skip pre vframe num*/ struct tvin_latency_s latency; + struct tvin_hdr10plus_info_s hdr10p_info; }; #define TVAFE_VF_POOL_SIZE 6 /* 8 */ -- 2.7.4